* RE: [PATCH 2/2] PCI: lock each enable/disable num_vfs operation in sysfs
From: Tantilov, Emil S @ 2017-01-04 16:00 UTC (permalink / raw)
To: Gavin Shan
Cc: linux-pci@vger.kernel.org, intel-wired-lan@lists.osuosl.org,
Duyck, Alexander H, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org
In-Reply-To: <20170104021531.GA567@gwshan>
>-----Original Message-----
>From: Gavin Shan [mailto:gwshan@linux.vnet.ibm.com]
>Sent: Tuesday, January 03, 2017 6:16 PM
>To: Tantilov, Emil S <emil.s.tantilov@intel.com>
>Cc: linux-pci@vger.kernel.org; intel-wired-lan@lists.osuosl.org; Duyck,
>Alexander H <alexander.h.duyck@intel.com>; netdev@vger.kernel.org; linux-
>kernel@vger.kernel.org
>Subject: Re: [PATCH 2/2] PCI: lock each enable/disable num_vfs operation in
>sysfs
>
>On Tue, Jan 03, 2017 at 04:48:31PM -0800, Emil Tantilov wrote:
>>Enabling/disabling SRIOV via sysfs by echo-ing multiple values
>>simultaneously:
>>
>>echo 63 > /sys/class/net/ethX/device/sriov_numvfs&
>>echo 63 > /sys/class/net/ethX/device/sriov_numvfs
>>
>>sleep 5
>>
>>echo 0 > /sys/class/net/ethX/device/sriov_numvfs&
>>echo 0 > /sys/class/net/ethX/device/sriov_numvfs
>>
>>Results in the following bug:
>>
>>kernel BUG at drivers/pci/iov.c:495!
>>invalid opcode: 0000 [#1] SMP
>>CPU: 1 PID: 8050 Comm: bash Tainted: G W 4.9.0-rc7-net-next #2092
>>RIP: 0010:[<ffffffff813b1647>]
>> [<ffffffff813b1647>] pci_iov_release+0x57/0x60
>>
>>Call Trace:
>> [<ffffffff81391726>] pci_release_dev+0x26/0x70
>> [<ffffffff8155be6e>] device_release+0x3e/0xb0
>> [<ffffffff81365ee7>] kobject_cleanup+0x67/0x180
>> [<ffffffff81365d9d>] kobject_put+0x2d/0x60
>> [<ffffffff8155bc27>] put_device+0x17/0x20
>> [<ffffffff8139c08a>] pci_dev_put+0x1a/0x20
>> [<ffffffff8139cb6b>] pci_get_dev_by_id+0x5b/0x90
>> [<ffffffff8139cca5>] pci_get_subsys+0x35/0x40
>> [<ffffffff8139ccc8>] pci_get_device+0x18/0x20
>> [<ffffffff8139ccfb>] pci_get_domain_bus_and_slot+0x2b/0x60
>> [<ffffffff813b09e7>] pci_iov_remove_virtfn+0x57/0x180
>> [<ffffffff813b0b95>] pci_disable_sriov+0x65/0x140
>> [<ffffffffa00a1af7>] ixgbe_disable_sriov+0xc7/0x1d0 [ixgbe]
>> [<ffffffffa00a1e9d>] ixgbe_pci_sriov_configure+0x3d/0x170 [ixgbe]
>> [<ffffffff8139d28c>] sriov_numvfs_store+0xdc/0x130
>>...
>>RIP [<ffffffff813b1647>] pci_iov_release+0x57/0x60
>>
>>Use the existing mutex lock to protect each enable/disable operation.
>>
>>CC: Alexander Duyck <alexander.h.duyck@intel.com>
>>Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
>
>Emil, It's going to change semantics of pci_enable_sriov() and pci_disable_sriov().
>They can be invoked when writing to the sysfs entry, or loading PF's
>driver. With the change applied, the lock (pf->sriov->lock) isn't acquired and released
>in the PF's driver loading path.
The enablement of SRIOV on driver load is done via deprecated module parameter.
Perhaps we can just remove it, although there are probably still people that use it
and may not be happy if we get rid of it.
>I think the reasonable way would be adding a flag in "struct sriov", to
>indicate someone is accessing the IOV capability through sysfs file. With this, the
>code returns with "-EBUSY" immediately for contenders. With it, nothing is going
>to be changed in PF's driver loading path.
Flag is what I initially had in mind, but did not want to add extra locking if we
can make use of the existing.
>Also, there are some minor comments as below and I guess most of them won't
>be applied if you take my suggestion eventually. However, I'm trying to make
>the comments complete.
Thanks a lot for reviewing!
>
>>---
>> drivers/pci/pci-sysfs.c | 24 +++++++++++++++++-------
>> 1 file changed, 17 insertions(+), 7 deletions(-)
>>
>>diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
>>index 0666287..5b54cf5 100644
>>--- a/drivers/pci/pci-sysfs.c
>>+++ b/drivers/pci/pci-sysfs.c
>>@@ -472,7 +472,9 @@ static ssize_t sriov_numvfs_store(struct device *dev,
>> const char *buf, size_t count)
>> {
>> struct pci_dev *pdev = to_pci_dev(dev);
>>+ struct pci_sriov *iov = pdev->sriov;
>> int ret;
>>+
>
>Unnecessary change.
>
>> u16 num_vfs;
>>
>> ret = kstrtou16(buf, 0, &num_vfs);
>>@@ -482,38 +484,46 @@ static ssize_t sriov_numvfs_store(struct device
>*dev,
>> if (num_vfs > pci_sriov_get_totalvfs(pdev))
>> return -ERANGE;
>>
>>+ mutex_lock(&iov->dev->sriov->lock);
>>+
>> if (num_vfs == pdev->sriov->num_VFs)
>>- return count; /* no change */
>>+ goto exit;
>>
>> /* is PF driver loaded w/callback */
>> if (!pdev->driver || !pdev->driver->sriov_configure) {
>> dev_info(&pdev->dev, "Driver doesn't support SRIOV
>configuration via sysfs\n");
>>- return -ENOSYS;
>>+ ret = -EINVAL;
>>+ goto exit;
>
>Why we need change the error code here?
checkpatch was complaining about the use of the ENOSYS error code being specific
and even though it was not my patch introducing it I had to change it to shut it up.
>> }
>>
>> if (num_vfs == 0) {
>> /* disable VFs */
>> ret = pdev->driver->sriov_configure(pdev, 0);
>>- if (ret < 0)
>>- return ret;
>>- return count;
>>+ goto exit;
>> }
>>
>> /* enable VFs */
>> if (pdev->sriov->num_VFs) {
>> dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
>> pdev->sriov->num_VFs, num_vfs);
>>- return -EBUSY;
>>+ ret = -EBUSY;
>>+ goto exit;
>> }
>>
>> ret = pdev->driver->sriov_configure(pdev, num_vfs);
>> if (ret < 0)
>>- return ret;
>>+ goto exit;
>>
>> if (ret != num_vfs)
>> dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
>> num_vfs, ret);
>>
>>+exit:
>>+ mutex_unlock(&iov->dev->sriov->lock);
>>+
>>+ if (ret < 0)
>>+ return ret;
>>+
>> return count;
>
>The code might be clearer if @ret is returned here. In that case, We need
>set it properly in error paths.
I played with different ways to handle this and this seemed the least intrusive.
Thanks,
Emil
^ permalink raw reply
* Re: [PATCH net-next 2/2] tools: psock_tpacket: verify that packet was received on lo before counting it
From: Willem de Bruijn @ 2017-01-04 16:07 UTC (permalink / raw)
To: Sowmini Varadhan
Cc: linux-kselftest, Network Development, Daniel Borkmann,
Willem de Bruijn, David Miller, shuah
In-Reply-To: <20170104151346.GE9641@oracle.com>
On Wed, Jan 4, 2017 at 10:13 AM, Sowmini Varadhan
<sowmini.varadhan@oracle.com> wrote:
> On (01/04/17 10:03), Willem de Bruijn wrote:
>>
>> This approach is less restrictive. It still allows incorrect packets
>> to be enqueued in the time between the socket call and attaching the
>> bpf filter. Also, if packets are restricted to a single packet, using
>> bind with sll_ifindex is simpler.
>
> Do you want me to change this to first set up pfsocket() with
> proto 0, then set up filter, and then bind_ring() to the desired
> ifindex with ETH_P_ALL?
Please do. Then the patch is just a one-line change to
the third argument of the socket call. Thanks!
^ permalink raw reply
* Re: [PATCH] phy state machine: failsafe leave invalid RUNNING state
From: Zefir Kurtisi @ 2017-01-04 16:10 UTC (permalink / raw)
To: Florian Fainelli, netdev; +Cc: andrew
In-Reply-To: <16a741c1-7005-b1df-f2e6-afdbe9d086c8@gmail.com>
On 01/04/2017 04:30 PM, Florian Fainelli wrote:
>
>
> On 01/04/2017 07:27 AM, Zefir Kurtisi wrote:
>> On 01/04/2017 04:13 PM, Florian Fainelli wrote:
>>>
>>>
>>> On 01/04/2017 07:04 AM, Zefir Kurtisi wrote:
>>>> While in RUNNING state, phy_state_machine() checks for link changes by
>>>> comparing phydev->link before and after calling phy_read_status().
>>>> This works as long as it is guaranteed that phydev->link is never
>>>> changed outside the phy_state_machine().
>>>>
>>>> If in some setups this happens, it causes the state machine to miss
>>>> a link loss and remain RUNNING despite phydev->link being 0.
>>>>
>>>> This has been observed running a dsa setup with a process continuously
>>>> polling the link states over ethtool each second (SNMPD RFC-1213
>>>> agent). Disconnecting the link on a phy followed by a ETHTOOL_GSET
>>>> causes dsa_slave_get_settings() / dsa_slave_get_link_ksettings() to
>>>> call phy_read_status() and with that modify the link status - and
>>>> with that bricking the phy state machine.
>>>
>>> That's the interesting part of the analysis, how does this brick the PHY
>>> state machine? Is the PHY driver changing the link status in the
>>> read_status callback that it implements?
>>>
>> phydev->read_status points to genphy_read_status(), where the first call goes to
>> genphy_update_link() which updates the link status.
>>
>> Thereafter phy_state_machine():RUNNING won't be able to detect the link loss
>> anymore unless the link state changes again.
>>
>>
>> I was trying to figure out if there is a rule that forbids changing phydev->link
>> from outside the state machine, but found several places where it happens (either
>> directly, or over genphy_read_status() or over genphy_update_link()).
>>
>> Curious how this did not show up before, since within the dsa setup it is very
>> easy to trigger:
>> a) physically disconnect link
>> b) within one second run ethtool ethX
>
> You need to be more specific here about what "the dsa setup" is, drivers
> involved, which ports of the switch you are seeing this with (user
> facing, CPU port, DSA port?) etc.
>
I am working on top of LEDE and with that at kernel 4.4.21 - alas I checked the
related source files and believe the effect should be reproducible with HEAD.
The setup is as follows:
mv88e6321:
* ports 0+1 connected to fibre-optics transceivers at fixed 100 Mbps
* port 4 is CPU port
* custom phy driver (replacement for marvell.ko) only populated with
* .config_init to
* set fixed speed for ports 0+1 (when in FO mode)
* run genphy_config_init() for all other modes (here: CPU port)
* .config_aneg=genphy_config_aneg, .read_status=genphy_read_status
To my understanding, the exact setup is irrelevant - to reproduce the issue it is
enough to have a means of running genphy_update_link() (as done in e.g.
mediatek/mtk_eth_soc.c, dsa/slave.c), or genphy_read_status() (as done in e.g.
hisilicon/hns/hns_enet.c) or phy_read_status() (as done in e.g.
ethernet/ti/netcp_ethss.c, ethernet/aeroflex/greth.c, etc.). In the observed
drivers it is mostly implemented in the ETHTOOL_GSET execution path.
Once you get the link state updated outside the phy state machine, it remains in
invalid RUNNING. To prevent that invalid state, to my understanding upper layer
drivers (Ethernet, dsa) must not modify link-states in any case (including calling
the functions noted above), or we need the proposed fail-safe mechanism to prevent
getting stuck.
Thanks,
Zefir
^ permalink raw reply
* Re: [PATCH net-next 2/2] tools: psock_tpacket: verify that packet was received on lo before counting it
From: Sowmini Varadhan @ 2017-01-04 16:12 UTC (permalink / raw)
To: Willem de Bruijn
Cc: linux-kselftest, Network Development, Daniel Borkmann,
Willem de Bruijn, David Miller, shuah
In-Reply-To: <CAF=yD-+7Lj=boiJy6BPPJA-+-MrWqDd38-OFPcsWurUXkrwtzA@mail.gmail.com>
On (01/04/17 11:07), Willem de Bruijn wrote:
>
> Please do. Then the patch is just a one-line change to
> the third argument of the socket call. Thanks!
ok but it's going to be more than a one-line change. Today you
have
sock = pfsocket(version);
memset(&ring, 0, sizeof(ring));
setup_ring(sock, &ring, version, type);
mmap_ring(sock, &ring);
bind_ring(sock, &ring);
walk_ring(sock, &ring);
And the pair_udp_setfilter() only gets set up out of
walk_ring. I think you want to move that up to be done before
bind_ring.
^ permalink raw reply
* Re: [PATCH] phy state machine: failsafe leave invalid RUNNING state
From: Andrew Lunn @ 2017-01-04 16:16 UTC (permalink / raw)
To: Zefir Kurtisi; +Cc: Florian Fainelli, netdev
In-Reply-To: <8521b51f-04f7-aeef-f862-bb150257cfa4@neratec.com>
> The setup is as follows:
> mv88e6321:
> * ports 0+1 connected to fibre-optics transceivers at fixed 100 Mbps
> * port 4 is CPU port
> * custom phy driver (replacement for marvell.ko) only populated with
> * .config_init to
> * set fixed speed for ports 0+1 (when in FO mode)
> * run genphy_config_init() for all other modes (here: CPU port)
> * .config_aneg=genphy_config_aneg, .read_status=genphy_read_status
Kicking off a side discussion:
Why do a custom PHY driver? What cannot you do with the current DSA
code? I've got boards with two FO ports, and using fixed-phy is all i
need to make them work on a 6352.
Andrew
^ permalink raw reply
* [PATCH v3 0/3] adding new glue driver dwmac-dwc-qos-eth
From: Joao Pinto @ 2017-01-04 16:22 UTC (permalink / raw)
To: davem; +Cc: lars.persson, niklass, swarren, treding, netdev, Joao Pinto
This patch set contains the porting of the synopsys/dwc_eth_qos.c driver
to the stmmac structure. This operation resulted in the creation of a new
platform glue driver called dwmac-dwc-qos-eth which was based in the
dwc_eth_qos as is.
dwmac-dwc-qos-eth inherited dwc_eth_qos DT bindings, to assure that current
and old users can continue to use it as before. We can see this driver as
being deprecated, since all new development will be done in stmmac.
Please check each patch for implementation details.
Joao Pinto (3):
stmmac: adding DT parameter for LPI tx clock gating
stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform
structure
stmmac: adding new glue driver dwmac-dwc-qos-eth
.../bindings/net/snps,dwc-qos-ethernet.txt | 3 +
Documentation/devicetree/bindings/net/stmmac.txt | 2 +
drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
drivers/net/ethernet/stmicro/stmmac/common.h | 3 +-
.../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 200 +++++++++++++++++++++
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +-
.../net/ethernet/stmicro/stmmac/dwmac1000_core.c | 5 +-
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 +
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +-
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 -
.../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 85 ++-------
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 65 ++++++-
include/linux/stmmac.h | 6 +
15 files changed, 315 insertions(+), 82 deletions(-)
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
--
2.9.3
^ permalink raw reply
* [PATCH v3 1/3] stmmac: adding DT parameter for LPI tx clock gating
From: Joao Pinto @ 2017-01-04 16:22 UTC (permalink / raw)
To: davem; +Cc: lars.persson, niklass, swarren, treding, netdev, Joao Pinto
In-Reply-To: <cover.1483546363.git.jpinto@synopsys.com>
This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating.
It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock
gating is needed by stmmac users also.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
changes v1 -> v3:
- Nothing changed, just to keep up patch set version
Documentation/devicetree/bindings/net/stmmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/common.h | 3 ++-
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 5 ++++-
drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 +
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +++++-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++-
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +++
include/linux/stmmac.h | 1 +
8 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
index 128da75..a0c749f 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -49,6 +49,8 @@ Optional properties:
- snps,force_sf_dma_mode Force DMA to use the Store and Forward
mode for both tx and rx. This flag is
ignored if force_thresh_dma_mode is set.
+- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
+ TX low-power mode
- snps,multicast-filter-bins: Number of multicast filter hash bins
supported by this device instance
- snps,perfect-filter-entries: Number of perfect filter entries supported
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index 6c96291..75e2666 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -476,7 +476,8 @@ struct stmmac_ops {
unsigned int reg_n);
void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
unsigned int reg_n);
- void (*set_eee_mode)(struct mac_device_info *hw);
+ void (*set_eee_mode)(struct mac_device_info *hw,
+ bool en_tx_lpi_clockgating);
void (*reset_eee_mode)(struct mac_device_info *hw);
void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
void (*set_eee_pls)(struct mac_device_info *hw, int link);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index be3c91c..a5ffca1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
return ret;
}
-static void dwmac1000_set_eee_mode(struct mac_device_info *hw)
+static void dwmac1000_set_eee_mode(struct mac_device_info *hw,
+ bool en_tx_lpi_clockgating)
{
void __iomem *ioaddr = hw->pcsr;
u32 value;
+ /*TODO - en_tx_lpi_clockgating treatment */
+
/* Enable the link status receive on RGMII, SGMII ore SMII
* receive path and instruct the transmit to enter in LPI
* state.
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 73d1dab..db45134 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -98,6 +98,7 @@ enum power_event {
#define GMAC4_LPI_TIMER_CTRL 0xd4
/* LPI control and status defines */
+#define GMAC4_LPI_CTRL_STATUS_LPITCSE BIT(21) /* LPI Tx Clock Stop Enable */
#define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */
#define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */
#define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index 02eab79..834f40f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,
GMAC_ADDR_LOW(reg_n));
}
-static void dwmac4_set_eee_mode(struct mac_device_info *hw)
+static void dwmac4_set_eee_mode(struct mac_device_info *hw,
+ bool en_tx_lpi_clockgating)
{
void __iomem *ioaddr = hw->pcsr;
u32 value;
@@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw)
value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
+ if (en_tx_lpi_clockgating)
+ value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;
+
writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index c97870f..f1a0afc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
/* Check and enter in LPI mode */
if ((priv->dirty_tx == priv->cur_tx) &&
(priv->tx_path_in_lpi_mode == false))
- priv->hw->mac->set_eee_mode(priv->hw);
+ priv->hw->mac->set_eee_mode(priv->hw,
+ priv->plat->en_tx_lpi_clockgating);
}
/**
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 082cd48..6064fcc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -249,6 +249,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
plat->force_sf_dma_mode =
of_property_read_bool(np, "snps,force_sf_dma_mode");
+ plat->en_tx_lpi_clockgating =
+ of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
+
/* Set the maxmtu to a default of JUMBO_LEN in case the
* parameter is not present in the device tree.
*/
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 266dab9..90fefde 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -143,5 +143,6 @@ struct plat_stmmacenet_data {
int has_gmac4;
bool tso_en;
int mac_port_sel_speed;
+ bool en_tx_lpi_clockgating;
};
#endif
--
2.9.3
^ permalink raw reply related
* [PATCH v3 2/3] stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure
From: Joao Pinto @ 2017-01-04 16:22 UTC (permalink / raw)
To: davem; +Cc: lars.persson, niklass, swarren, treding, netdev, Joao Pinto
In-Reply-To: <cover.1483546363.git.jpinto@synopsys.com>
This patch moves stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to the
plat_stmmacenet_data structure. It also moves these platform variables
initialization to stmmac_platform. This was done for two reasons:
a) If PCI is used, platform related code is being executed in stmmac_main
resulting in warnings that have no sense and conceptually was not right
b) stmmac as a synopsys reference ethernet driver stack will be hosting
more and more drivers to its structure like synopsys/dwc_eth_qos.c.
These drivers have their own DT bindings that are not compatible with
stmmac's. One of the most important are the clock names, and so they need
to be parsed in the glue logic and initialized there, and that is the main
reason why the clocks were passed to the platform structure.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
changes v2 -> v3:
- dwmac-socfpga glue driver was also using stmmac_rst from priv struct and
was causing a build error caught by kbuild robot
changes v1 -> v2:
- Nothing changed, just to keep up patch set version
.../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 --
.../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 82 ++++------------------
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 47 +++++++++++++
include/linux/stmmac.h | 5 ++
6 files changed, 70 insertions(+), 75 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
index 1f99702..17d4bba 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
@@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)
* mode. Create a copy of the core reset handle so it can be used by
* the driver later.
*/
- dwmac->stmmac_rst = stpriv->stmmac_rst;
+ dwmac->stmmac_rst = stpriv->plat->stmmac_rst;
ret = socfpga_dwmac_set_phy_mode(dwmac);
if (ret)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index eab04ae..bf8a83e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -106,9 +106,6 @@ struct stmmac_priv {
u32 msg_enable;
int wolopts;
int wol_irq;
- struct clk *stmmac_clk;
- struct clk *pclk;
- struct reset_control *stmmac_rst;
int clk_csr;
struct timer_list eee_ctrl_timer;
int lpi_irq;
@@ -120,8 +117,6 @@ struct stmmac_priv {
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_ops;
unsigned int default_addend;
- struct clk *clk_ptp_ref;
- unsigned int clk_ptp_rate;
u32 adv_ts;
int use_riwt;
int irq_wake;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 699ee1d..322e5c6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -712,7 +712,7 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,
static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
{
- unsigned long clk = clk_get_rate(priv->stmmac_clk);
+ unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
if (!clk)
return 0;
@@ -722,7 +722,7 @@ static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
{
- unsigned long clk = clk_get_rate(priv->stmmac_clk);
+ unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
if (!clk)
return 0;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index f1a0afc..6e6e9dc 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -158,7 +158,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
{
u32 clk_rate;
- clk_rate = clk_get_rate(priv->stmmac_clk);
+ clk_rate = clk_get_rate(priv->plat->stmmac_clk);
/* Platform provided default clk_csr would be assumed valid
* for all other cases except for the below mentioned ones.
@@ -607,7 +607,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
/* program Sub Second Increment reg */
sec_inc = priv->hw->ptp->config_sub_second_increment(
- priv->ptpaddr, priv->clk_ptp_rate,
+ priv->ptpaddr, priv->plat->clk_ptp_rate,
priv->plat->has_gmac4);
temp = div_u64(1000000000ULL, sec_inc);
@@ -617,7 +617,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
* where, freq_div_ratio = 1e9ns/sec_inc
*/
temp = (u64)(temp << 32);
- priv->default_addend = div_u64(temp, priv->clk_ptp_rate);
+ priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);
priv->hw->ptp->config_addend(priv->ptpaddr,
priv->default_addend);
@@ -645,18 +645,6 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp))
return -EOPNOTSUPP;
- /* Fall-back to main clock in case of no PTP ref is passed */
- priv->clk_ptp_ref = devm_clk_get(priv->device, "clk_ptp_ref");
- if (IS_ERR(priv->clk_ptp_ref)) {
- priv->clk_ptp_rate = clk_get_rate(priv->stmmac_clk);
- priv->clk_ptp_ref = NULL;
- netdev_dbg(priv->dev, "PTP uses main clock\n");
- } else {
- clk_prepare_enable(priv->clk_ptp_ref);
- priv->clk_ptp_rate = clk_get_rate(priv->clk_ptp_ref);
- netdev_dbg(priv->dev, "PTP rate %d\n", priv->clk_ptp_rate);
- }
-
priv->adv_ts = 0;
/* Check if adv_ts can be enabled for dwmac 4.x core */
if (priv->plat->has_gmac4 && priv->dma_cap.atime_stamp)
@@ -683,8 +671,8 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
static void stmmac_release_ptp(struct stmmac_priv *priv)
{
- if (priv->clk_ptp_ref)
- clk_disable_unprepare(priv->clk_ptp_ref);
+ if (priv->plat->clk_ptp_ref)
+ clk_disable_unprepare(priv->plat->clk_ptp_ref);
stmmac_ptp_unregister(priv);
}
@@ -3278,44 +3266,8 @@ int stmmac_dvr_probe(struct device *device,
if ((phyaddr >= 0) && (phyaddr <= 31))
priv->plat->phy_addr = phyaddr;
- priv->stmmac_clk = devm_clk_get(priv->device, STMMAC_RESOURCE_NAME);
- if (IS_ERR(priv->stmmac_clk)) {
- netdev_warn(priv->dev, "%s: warning: cannot get CSR clock\n",
- __func__);
- /* If failed to obtain stmmac_clk and specific clk_csr value
- * is NOT passed from the platform, probe fail.
- */
- if (!priv->plat->clk_csr) {
- ret = PTR_ERR(priv->stmmac_clk);
- goto error_clk_get;
- } else {
- priv->stmmac_clk = NULL;
- }
- }
- clk_prepare_enable(priv->stmmac_clk);
-
- priv->pclk = devm_clk_get(priv->device, "pclk");
- if (IS_ERR(priv->pclk)) {
- if (PTR_ERR(priv->pclk) == -EPROBE_DEFER) {
- ret = -EPROBE_DEFER;
- goto error_pclk_get;
- }
- priv->pclk = NULL;
- }
- clk_prepare_enable(priv->pclk);
-
- priv->stmmac_rst = devm_reset_control_get(priv->device,
- STMMAC_RESOURCE_NAME);
- if (IS_ERR(priv->stmmac_rst)) {
- if (PTR_ERR(priv->stmmac_rst) == -EPROBE_DEFER) {
- ret = -EPROBE_DEFER;
- goto error_hw_init;
- }
- dev_info(priv->device, "no reset control found\n");
- priv->stmmac_rst = NULL;
- }
- if (priv->stmmac_rst)
- reset_control_deassert(priv->stmmac_rst);
+ if (priv->plat->stmmac_rst)
+ reset_control_deassert(priv->plat->stmmac_rst);
/* Init MAC and get the capabilities */
ret = stmmac_hw_init(priv);
@@ -3406,10 +3358,6 @@ int stmmac_dvr_probe(struct device *device,
error_netdev_register:
netif_napi_del(&priv->napi);
error_hw_init:
- clk_disable_unprepare(priv->pclk);
-error_pclk_get:
- clk_disable_unprepare(priv->stmmac_clk);
-error_clk_get:
free_netdev(ndev);
return ret;
@@ -3435,10 +3383,10 @@ int stmmac_dvr_remove(struct device *dev)
stmmac_set_mac(priv->ioaddr, false);
netif_carrier_off(ndev);
unregister_netdev(ndev);
- if (priv->stmmac_rst)
- reset_control_assert(priv->stmmac_rst);
- clk_disable_unprepare(priv->pclk);
- clk_disable_unprepare(priv->stmmac_clk);
+ if (priv->plat->stmmac_rst)
+ reset_control_assert(priv->plat->stmmac_rst);
+ clk_disable_unprepare(priv->plat->pclk);
+ clk_disable_unprepare(priv->plat->stmmac_clk);
if (priv->hw->pcs != STMMAC_PCS_RGMII &&
priv->hw->pcs != STMMAC_PCS_TBI &&
priv->hw->pcs != STMMAC_PCS_RTBI)
@@ -3487,8 +3435,8 @@ int stmmac_suspend(struct device *dev)
stmmac_set_mac(priv->ioaddr, false);
pinctrl_pm_select_sleep_state(priv->device);
/* Disable clock in case of PWM is off */
- clk_disable(priv->pclk);
- clk_disable(priv->stmmac_clk);
+ clk_disable(priv->plat->pclk);
+ clk_disable(priv->plat->stmmac_clk);
}
spin_unlock_irqrestore(&priv->lock, flags);
@@ -3528,8 +3476,8 @@ int stmmac_resume(struct device *dev)
} else {
pinctrl_pm_select_default_state(priv->device);
/* enable the clk prevously disabled */
- clk_enable(priv->stmmac_clk);
- clk_enable(priv->pclk);
+ clk_enable(priv->plat->stmmac_clk);
+ clk_enable(priv->plat->pclk);
/* reset the phy so that it's ready */
if (priv->mii)
stmmac_mdio_reset(priv->mii);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 6064fcc..4e44f9c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -336,7 +336,54 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
plat->axi = stmmac_axi_setup(pdev);
+ /* clock setup */
+ plat->stmmac_clk = devm_clk_get(&pdev->dev,
+ STMMAC_RESOURCE_NAME);
+ if (IS_ERR(plat->stmmac_clk)) {
+ dev_warn(&pdev->dev, "Cannot get CSR clock\n");
+ plat->stmmac_clk = NULL;
+ }
+ clk_prepare_enable(plat->stmmac_clk);
+
+ plat->pclk = devm_clk_get(&pdev->dev, "pclk");
+ if (IS_ERR(plat->pclk)) {
+ if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
+ goto error_pclk_get;
+
+ plat->pclk = NULL;
+ }
+ clk_prepare_enable(plat->pclk);
+
+ /* Fall-back to main clock in case of no PTP ref is passed */
+ plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "clk_ptp_ref");
+ if (IS_ERR(plat->clk_ptp_ref)) {
+ plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
+ plat->clk_ptp_ref = NULL;
+ dev_warn(&pdev->dev, "PTP uses main clock\n");
+ } else {
+ clk_prepare_enable(plat->clk_ptp_ref);
+ plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
+ dev_info(&pdev->dev, "No reset control found\n");
+ }
+
+ plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
+ STMMAC_RESOURCE_NAME);
+ if (IS_ERR(plat->stmmac_rst)) {
+ if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
+ goto error_hw_init;
+
+ dev_info(&pdev->dev, "no reset control found\n");
+ plat->stmmac_rst = NULL;
+ }
+
return plat;
+
+error_hw_init:
+ clk_disable_unprepare(plat->pclk);
+error_pclk_get:
+ clk_disable_unprepare(plat->stmmac_clk);
+
+ return ERR_PTR(-EPROBE_DEFER);
}
/**
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 90fefde..e29e7b8 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -139,6 +139,11 @@ struct plat_stmmacenet_data {
int (*init)(struct platform_device *pdev, void *priv);
void (*exit)(struct platform_device *pdev, void *priv);
void *bsp_priv;
+ struct clk *stmmac_clk;
+ struct clk *pclk;
+ struct clk *clk_ptp_ref;
+ unsigned int clk_ptp_rate;
+ struct reset_control *stmmac_rst;
struct stmmac_axi *axi;
int has_gmac4;
bool tso_en;
--
2.9.3
^ permalink raw reply related
* [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth
From: Joao Pinto @ 2017-01-04 16:22 UTC (permalink / raw)
To: davem; +Cc: lars.persson, niklass, swarren, treding, netdev, Joao Pinto
In-Reply-To: <cover.1483546363.git.jpinto@synopsys.com>
This patch adds a new glue driver called dwmac-dwc-qos-eth which
was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
tweak was also added to stmmac_platform.
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
---
changes v2 -> v3:
- Nothing changed, just to keep up patch set version
changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)
.../bindings/net/snps,dwc-qos-ethernet.txt | 3 +
drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 200 +++++++++++++++++++++
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 15 +-
5 files changed, 225 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index d93f71c..21d27aa 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
@@ -1,5 +1,8 @@
* Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
+This binding is deprecated, but it continues to be supported, but new
+features should be preferably added to the stmmac binding document.
+
This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
IP block. The IP supports multiple options for bus type, clocking and reset
structure, and feature list. Consequently, a number of properties and list
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab66248..99594e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM
if STMMAC_PLATFORM
+config DWMAC_DWC_QOS_ETH
+ tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
+ select PHYLIB
+ select CRC32
+ select MII
+ depends on OF && HAS_DMA
+ help
+ Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
+
config DWMAC_GENERIC
tristate "Generic driver for DWMAC"
default STMMAC_PLATFORM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 8f83a86..700c603 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
+obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
stmmac-platform-objs:= stmmac_platform.o
dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
new file mode 100644
index 0000000..4532a7c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -0,0 +1,200 @@
+/*
+ * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
+ *
+ * Copyright (C) 2016 Joao Pinto <jpinto@synopsys.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/device.h>
+#include <linux/ethtool.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/of_net.h>
+#include <linux/mfd/syscon.h>
+#include <linux/platform_device.h>
+#include <linux/stmmac.h>
+
+#include "stmmac_platform.h"
+
+static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
+ struct plat_stmmacenet_data *plat_dat)
+{
+ struct device_node *np = pdev->dev.of_node;
+ u32 burst_map = 0;
+ u32 bit_index = 0;
+ u32 a_index = 0;
+
+ if (!plat_dat->axi) {
+ plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
+
+ if (!plat_dat->axi)
+ return -ENOMEM;
+ }
+
+ plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
+ if (of_property_read_u32(np, "snps,write-requests",
+ &plat_dat->axi->axi_wr_osr_lmt)) {
+ /**
+ * Since the register has a reset value of 1, if property
+ * is missing, default to 1.
+ */
+ plat_dat->axi->axi_wr_osr_lmt = 1;
+ } else {
+ /**
+ * If property exists, to keep the behavior from dwc_eth_qos,
+ * subtract one after parsing.
+ */
+ plat_dat->axi->axi_wr_osr_lmt--;
+ }
+
+ if (of_property_read_u32(np, "read,read-requests",
+ &plat_dat->axi->axi_rd_osr_lmt)) {
+ /**
+ * Since the register has a reset value of 1, if property
+ * is missing, default to 1.
+ */
+ plat_dat->axi->axi_rd_osr_lmt = 1;
+ } else {
+ /**
+ * If property exists, to keep the behavior from dwc_eth_qos,
+ * subtract one after parsing.
+ */
+ plat_dat->axi->axi_rd_osr_lmt--;
+ }
+ of_property_read_u32(np, "snps,burst-map", &burst_map);
+
+ /* converts burst-map bitmask to burst array */
+ for (bit_index = 0; bit_index < 7; bit_index++) {
+ if (burst_map & (1 << bit_index)) {
+ switch (bit_index) {
+ case 0:
+ plat_dat->axi->axi_blen[a_index] = 4; break;
+ case 1:
+ plat_dat->axi->axi_blen[a_index] = 8; break;
+ case 2:
+ plat_dat->axi->axi_blen[a_index] = 16; break;
+ case 3:
+ plat_dat->axi->axi_blen[a_index] = 32; break;
+ case 4:
+ plat_dat->axi->axi_blen[a_index] = 64; break;
+ case 5:
+ plat_dat->axi->axi_blen[a_index] = 128; break;
+ case 6:
+ plat_dat->axi->axi_blen[a_index] = 256; break;
+ default:
+ break;
+ }
+ a_index++;
+ }
+ }
+
+ /* dwc-qos needs GMAC4, AAL, TSO and PMT */
+ plat_dat->has_gmac4 = 1;
+ plat_dat->dma_cfg->aal = 1;
+ plat_dat->tso_en = 1;
+ plat_dat->pmt = 1;
+
+ return 0;
+}
+
+static int dwc_eth_dwmac_probe(struct platform_device *pdev)
+{
+ struct plat_stmmacenet_data *plat_dat;
+ struct stmmac_resources stmmac_res;
+ struct resource *res;
+ int ret;
+
+ /**
+ * Since stmmac_platform supports name IRQ only, basic platform
+ * resource initialization is done in the glue logic.
+ */
+ stmmac_res.irq = platform_get_irq(pdev, 0);
+ if (stmmac_res.irq < 0) {
+ if (stmmac_res.irq != -EPROBE_DEFER) {
+ dev_err(&pdev->dev,
+ "IRQ configuration information not found\n");
+ }
+ return stmmac_res.irq;
+ }
+ stmmac_res.wol_irq = stmmac_res.irq;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ stmmac_res.addr = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(stmmac_res.addr))
+ return PTR_ERR(stmmac_res.addr);
+
+ plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
+ if (IS_ERR(plat_dat))
+ return PTR_ERR(plat_dat);
+
+ plat_dat->stmmac_clk = devm_clk_get(&pdev->dev, "apb_pclk");
+ if (IS_ERR(plat_dat->stmmac_clk)) {
+ dev_err(&pdev->dev, "apb_pclk clock not found.\n");
+ ret = PTR_ERR(plat_dat->stmmac_clk);
+ plat_dat->stmmac_clk = NULL;
+ goto err_remove_config_dt;
+ }
+ clk_prepare_enable(plat_dat->stmmac_clk);
+
+ plat_dat->pclk = devm_clk_get(&pdev->dev, "phy_ref_clk");
+ if (IS_ERR(plat_dat->pclk)) {
+ dev_err(&pdev->dev, "phy_ref_clk clock not found.\n");
+ ret = PTR_ERR(plat_dat->pclk);
+ plat_dat->pclk = NULL;
+ goto err_out_clk_dis_phy;
+ }
+ clk_prepare_enable(plat_dat->pclk);
+
+ ret = dwc_eth_dwmac_config_dt(pdev, plat_dat);
+ if (ret)
+ goto err_out_clk_dis_aper;
+
+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ if (ret)
+ goto err_out_clk_dis_aper;
+
+ return 0;
+
+err_out_clk_dis_aper:
+ clk_disable_unprepare(plat_dat->pclk);
+err_out_clk_dis_phy:
+ clk_disable_unprepare(plat_dat->stmmac_clk);
+err_remove_config_dt:
+ stmmac_remove_config_dt(pdev, plat_dat);
+
+ return ret;
+}
+
+static int dwc_eth_dwmac_remove(struct platform_device *pdev)
+{
+ return stmmac_pltfr_remove(pdev);
+}
+
+static const struct of_device_id dwc_eth_dwmac_match[] = {
+ { .compatible = "snps,dwc-qos-ethernet-4.10", },
+ { }
+};
+MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
+
+static struct platform_driver dwc_eth_dwmac_driver = {
+ .probe = dwc_eth_dwmac_probe,
+ .remove = dwc_eth_dwmac_remove,
+ .driver = {
+ .name = "dwc-eth-dwmac",
+ .of_match_table = dwc_eth_dwmac_match,
+ },
+};
+module_platform_driver(dwc_eth_dwmac_driver);
+
+MODULE_AUTHOR("Joao Pinto <jpinto@synopsys.com>");
+MODULE_DESCRIPTION("Synopsys DWC Ethernet Quality-of-Service v4.10a driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 4e44f9c..00c0f8d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -181,10 +181,19 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
mdio = false;
}
- /* If snps,dwmac-mdio is passed from DT, always register the MDIO */
- for_each_child_of_node(np, plat->mdio_node) {
- if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio"))
+ /* exception for dwmac-dwc-qos-eth glue logic */
+ if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
+ plat->mdio_node = of_get_child_by_name(np, "mdio");
+ } else {
+ /**
+ * If snps,dwmac-mdio is passed from DT, always register
+ * the MDIO
+ */
+ for_each_child_of_node(np, plat->mdio_node) {
+ if (of_device_is_compatible(plat->mdio_node,
+ "snps,dwmac-mdio"))
break;
+ }
}
if (plat->mdio_node) {
--
2.9.3
^ permalink raw reply related
* Re: [PATCH net-next 2/2] tools: psock_tpacket: verify that packet was received on lo before counting it
From: Willem de Bruijn @ 2017-01-04 16:24 UTC (permalink / raw)
To: Sowmini Varadhan
Cc: linux-kselftest, Network Development, Daniel Borkmann,
Willem de Bruijn, David Miller, shuah
In-Reply-To: <20170104161220.GF9641@oracle.com>
On Wed, Jan 4, 2017 at 11:12 AM, Sowmini Varadhan
<sowmini.varadhan@oracle.com> wrote:
> On (01/04/17 11:07), Willem de Bruijn wrote:
>>
>> Please do. Then the patch is just a one-line change to
>> the third argument of the socket call. Thanks!
>
> ok but it's going to be more than a one-line change. Today you
> have
> sock = pfsocket(version);
> memset(&ring, 0, sizeof(ring));
> setup_ring(sock, &ring, version, type);
> mmap_ring(sock, &ring);
> bind_ring(sock, &ring);
> walk_ring(sock, &ring);
>
> And the pair_udp_setfilter() only gets set up out of
> walk_ring. I think you want to move that up to be done before
> bind_ring.
Oh, good point. It may require some more refactoring. Feel free to
leave it for me if you prefer.
^ permalink raw reply
* Re: [PATCH v3 1/3] stmmac: adding DT parameter for LPI tx clock gating
From: Niklas Cassel @ 2017-01-04 16:27 UTC (permalink / raw)
To: Joao Pinto, davem; +Cc: larper, swarren, treding, netdev
In-Reply-To: <6dc3480f471db4d125b6e3885ada2ff75f8a086e.1483546363.git.jpinto@synopsys.com>
Tested-by: Niklas Cassel <niklas.cassel@axis.com>
On 01/04/2017 05:22 PM, Joao Pinto wrote:
> This patch adds a new parameter to the stmmac DT: snps,en-tx-lpi-clockgating.
> It was ported from synopsys/dwc_eth_qos.c and it is useful if lpi tx clock
> gating is needed by stmmac users also.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> changes v1 -> v3:
> - Nothing changed, just to keep up patch set version
>
> Documentation/devicetree/bindings/net/stmmac.txt | 2 ++
> drivers/net/ethernet/stmicro/stmmac/common.h | 3 ++-
> drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | 5 ++++-
> drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 1 +
> drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 6 +++++-
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++-
> drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 3 +++
> include/linux/stmmac.h | 1 +
> 8 files changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/stmmac.txt b/Documentation/devicetree/bindings/net/stmmac.txt
> index 128da75..a0c749f 100644
> --- a/Documentation/devicetree/bindings/net/stmmac.txt
> +++ b/Documentation/devicetree/bindings/net/stmmac.txt
> @@ -49,6 +49,8 @@ Optional properties:
> - snps,force_sf_dma_mode Force DMA to use the Store and Forward
> mode for both tx and rx. This flag is
> ignored if force_thresh_dma_mode is set.
> +- snps,en-tx-lpi-clockgating Enable gating of the MAC TX clock during
> + TX low-power mode
> - snps,multicast-filter-bins: Number of multicast filter hash bins
> supported by this device instance
> - snps,perfect-filter-entries: Number of perfect filter entries supported
> diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
> index 6c96291..75e2666 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/common.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/common.h
> @@ -476,7 +476,8 @@ struct stmmac_ops {
> unsigned int reg_n);
> void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
> unsigned int reg_n);
> - void (*set_eee_mode)(struct mac_device_info *hw);
> + void (*set_eee_mode)(struct mac_device_info *hw,
> + bool en_tx_lpi_clockgating);
> void (*reset_eee_mode)(struct mac_device_info *hw);
> void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
> void (*set_eee_pls)(struct mac_device_info *hw, int link);
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
> index be3c91c..a5ffca1 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
> @@ -343,11 +343,14 @@ static int dwmac1000_irq_status(struct mac_device_info *hw,
> return ret;
> }
>
> -static void dwmac1000_set_eee_mode(struct mac_device_info *hw)
> +static void dwmac1000_set_eee_mode(struct mac_device_info *hw,
> + bool en_tx_lpi_clockgating)
> {
> void __iomem *ioaddr = hw->pcsr;
> u32 value;
>
> + /*TODO - en_tx_lpi_clockgating treatment */
> +
> /* Enable the link status receive on RGMII, SGMII ore SMII
> * receive path and instruct the transmit to enter in LPI
> * state.
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> index 73d1dab..db45134 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
> @@ -98,6 +98,7 @@ enum power_event {
> #define GMAC4_LPI_TIMER_CTRL 0xd4
>
> /* LPI control and status defines */
> +#define GMAC4_LPI_CTRL_STATUS_LPITCSE BIT(21) /* LPI Tx Clock Stop Enable */
> #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */
> #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */
> #define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> index 02eab79..834f40f 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
> @@ -137,7 +137,8 @@ static void dwmac4_get_umac_addr(struct mac_device_info *hw,
> GMAC_ADDR_LOW(reg_n));
> }
>
> -static void dwmac4_set_eee_mode(struct mac_device_info *hw)
> +static void dwmac4_set_eee_mode(struct mac_device_info *hw,
> + bool en_tx_lpi_clockgating)
> {
> void __iomem *ioaddr = hw->pcsr;
> u32 value;
> @@ -149,6 +150,9 @@ static void dwmac4_set_eee_mode(struct mac_device_info *hw)
> value = readl(ioaddr + GMAC4_LPI_CTRL_STATUS);
> value |= GMAC4_LPI_CTRL_STATUS_LPIEN | GMAC4_LPI_CTRL_STATUS_LPITXA;
>
> + if (en_tx_lpi_clockgating)
> + value |= GMAC4_LPI_CTRL_STATUS_LPITCSE;
> +
> writel(value, ioaddr + GMAC4_LPI_CTRL_STATUS);
> }
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index c97870f..f1a0afc 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -239,7 +239,8 @@ static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
> /* Check and enter in LPI mode */
> if ((priv->dirty_tx == priv->cur_tx) &&
> (priv->tx_path_in_lpi_mode == false))
> - priv->hw->mac->set_eee_mode(priv->hw);
> + priv->hw->mac->set_eee_mode(priv->hw,
> + priv->plat->en_tx_lpi_clockgating);
> }
>
> /**
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> index 082cd48..6064fcc 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> @@ -249,6 +249,9 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
> plat->force_sf_dma_mode =
> of_property_read_bool(np, "snps,force_sf_dma_mode");
>
> + plat->en_tx_lpi_clockgating =
> + of_property_read_bool(np, "snps,en-tx-lpi-clockgating");
> +
> /* Set the maxmtu to a default of JUMBO_LEN in case the
> * parameter is not present in the device tree.
> */
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index 266dab9..90fefde 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -143,5 +143,6 @@ struct plat_stmmacenet_data {
> int has_gmac4;
> bool tso_en;
> int mac_port_sel_speed;
> + bool en_tx_lpi_clockgating;
> };
> #endif
^ permalink raw reply
* Re: [PATCH v3 2/3] stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure
From: Niklas Cassel @ 2017-01-04 16:27 UTC (permalink / raw)
To: Joao Pinto, davem; +Cc: larper, swarren, treding, netdev
In-Reply-To: <b0931ebcc8ef437674e426c4aaa208ef1d55f369.1483546363.git.jpinto@synopsys.com>
Tested-by: Niklas Cassel <niklas.cassel@axis.com>
On 01/04/2017 05:22 PM, Joao Pinto wrote:
> This patch moves stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to the
> plat_stmmacenet_data structure. It also moves these platform variables
> initialization to stmmac_platform. This was done for two reasons:
>
> a) If PCI is used, platform related code is being executed in stmmac_main
> resulting in warnings that have no sense and conceptually was not right
>
> b) stmmac as a synopsys reference ethernet driver stack will be hosting
> more and more drivers to its structure like synopsys/dwc_eth_qos.c.
> These drivers have their own DT bindings that are not compatible with
> stmmac's. One of the most important are the clock names, and so they need
> to be parsed in the glue logic and initialized there, and that is the main
> reason why the clocks were passed to the platform structure.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> changes v2 -> v3:
> - dwmac-socfpga glue driver was also using stmmac_rst from priv struct and
> was causing a build error caught by kbuild robot
> changes v1 -> v2:
> - Nothing changed, just to keep up patch set version
>
> .../net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 2 +-
> drivers/net/ethernet/stmicro/stmmac/stmmac.h | 5 --
> .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 4 +-
> drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 82 ++++------------------
> .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 47 +++++++++++++
> include/linux/stmmac.h | 5 ++
> 6 files changed, 70 insertions(+), 75 deletions(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> index 1f99702..17d4bba 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c
> @@ -341,7 +341,7 @@ static int socfpga_dwmac_probe(struct platform_device *pdev)
> * mode. Create a copy of the core reset handle so it can be used by
> * the driver later.
> */
> - dwmac->stmmac_rst = stpriv->stmmac_rst;
> + dwmac->stmmac_rst = stpriv->plat->stmmac_rst;
>
> ret = socfpga_dwmac_set_phy_mode(dwmac);
> if (ret)
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> index eab04ae..bf8a83e 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> @@ -106,9 +106,6 @@ struct stmmac_priv {
> u32 msg_enable;
> int wolopts;
> int wol_irq;
> - struct clk *stmmac_clk;
> - struct clk *pclk;
> - struct reset_control *stmmac_rst;
> int clk_csr;
> struct timer_list eee_ctrl_timer;
> int lpi_irq;
> @@ -120,8 +117,6 @@ struct stmmac_priv {
> struct ptp_clock *ptp_clock;
> struct ptp_clock_info ptp_clock_ops;
> unsigned int default_addend;
> - struct clk *clk_ptp_ref;
> - unsigned int clk_ptp_rate;
> u32 adv_ts;
> int use_riwt;
> int irq_wake;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
> index 699ee1d..322e5c6 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
> @@ -712,7 +712,7 @@ static int stmmac_ethtool_op_set_eee(struct net_device *dev,
>
> static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
> {
> - unsigned long clk = clk_get_rate(priv->stmmac_clk);
> + unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
>
> if (!clk)
> return 0;
> @@ -722,7 +722,7 @@ static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv)
>
> static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv)
> {
> - unsigned long clk = clk_get_rate(priv->stmmac_clk);
> + unsigned long clk = clk_get_rate(priv->plat->stmmac_clk);
>
> if (!clk)
> return 0;
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> index f1a0afc..6e6e9dc 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
> @@ -158,7 +158,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
> {
> u32 clk_rate;
>
> - clk_rate = clk_get_rate(priv->stmmac_clk);
> + clk_rate = clk_get_rate(priv->plat->stmmac_clk);
>
> /* Platform provided default clk_csr would be assumed valid
> * for all other cases except for the below mentioned ones.
> @@ -607,7 +607,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
>
> /* program Sub Second Increment reg */
> sec_inc = priv->hw->ptp->config_sub_second_increment(
> - priv->ptpaddr, priv->clk_ptp_rate,
> + priv->ptpaddr, priv->plat->clk_ptp_rate,
> priv->plat->has_gmac4);
> temp = div_u64(1000000000ULL, sec_inc);
>
> @@ -617,7 +617,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
> * where, freq_div_ratio = 1e9ns/sec_inc
> */
> temp = (u64)(temp << 32);
> - priv->default_addend = div_u64(temp, priv->clk_ptp_rate);
> + priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);
> priv->hw->ptp->config_addend(priv->ptpaddr,
> priv->default_addend);
>
> @@ -645,18 +645,6 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
> if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp))
> return -EOPNOTSUPP;
>
> - /* Fall-back to main clock in case of no PTP ref is passed */
> - priv->clk_ptp_ref = devm_clk_get(priv->device, "clk_ptp_ref");
> - if (IS_ERR(priv->clk_ptp_ref)) {
> - priv->clk_ptp_rate = clk_get_rate(priv->stmmac_clk);
> - priv->clk_ptp_ref = NULL;
> - netdev_dbg(priv->dev, "PTP uses main clock\n");
> - } else {
> - clk_prepare_enable(priv->clk_ptp_ref);
> - priv->clk_ptp_rate = clk_get_rate(priv->clk_ptp_ref);
> - netdev_dbg(priv->dev, "PTP rate %d\n", priv->clk_ptp_rate);
> - }
> -
> priv->adv_ts = 0;
> /* Check if adv_ts can be enabled for dwmac 4.x core */
> if (priv->plat->has_gmac4 && priv->dma_cap.atime_stamp)
> @@ -683,8 +671,8 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
>
> static void stmmac_release_ptp(struct stmmac_priv *priv)
> {
> - if (priv->clk_ptp_ref)
> - clk_disable_unprepare(priv->clk_ptp_ref);
> + if (priv->plat->clk_ptp_ref)
> + clk_disable_unprepare(priv->plat->clk_ptp_ref);
> stmmac_ptp_unregister(priv);
> }
>
> @@ -3278,44 +3266,8 @@ int stmmac_dvr_probe(struct device *device,
> if ((phyaddr >= 0) && (phyaddr <= 31))
> priv->plat->phy_addr = phyaddr;
>
> - priv->stmmac_clk = devm_clk_get(priv->device, STMMAC_RESOURCE_NAME);
> - if (IS_ERR(priv->stmmac_clk)) {
> - netdev_warn(priv->dev, "%s: warning: cannot get CSR clock\n",
> - __func__);
> - /* If failed to obtain stmmac_clk and specific clk_csr value
> - * is NOT passed from the platform, probe fail.
> - */
> - if (!priv->plat->clk_csr) {
> - ret = PTR_ERR(priv->stmmac_clk);
> - goto error_clk_get;
> - } else {
> - priv->stmmac_clk = NULL;
> - }
> - }
> - clk_prepare_enable(priv->stmmac_clk);
> -
> - priv->pclk = devm_clk_get(priv->device, "pclk");
> - if (IS_ERR(priv->pclk)) {
> - if (PTR_ERR(priv->pclk) == -EPROBE_DEFER) {
> - ret = -EPROBE_DEFER;
> - goto error_pclk_get;
> - }
> - priv->pclk = NULL;
> - }
> - clk_prepare_enable(priv->pclk);
> -
> - priv->stmmac_rst = devm_reset_control_get(priv->device,
> - STMMAC_RESOURCE_NAME);
> - if (IS_ERR(priv->stmmac_rst)) {
> - if (PTR_ERR(priv->stmmac_rst) == -EPROBE_DEFER) {
> - ret = -EPROBE_DEFER;
> - goto error_hw_init;
> - }
> - dev_info(priv->device, "no reset control found\n");
> - priv->stmmac_rst = NULL;
> - }
> - if (priv->stmmac_rst)
> - reset_control_deassert(priv->stmmac_rst);
> + if (priv->plat->stmmac_rst)
> + reset_control_deassert(priv->plat->stmmac_rst);
>
> /* Init MAC and get the capabilities */
> ret = stmmac_hw_init(priv);
> @@ -3406,10 +3358,6 @@ int stmmac_dvr_probe(struct device *device,
> error_netdev_register:
> netif_napi_del(&priv->napi);
> error_hw_init:
> - clk_disable_unprepare(priv->pclk);
> -error_pclk_get:
> - clk_disable_unprepare(priv->stmmac_clk);
> -error_clk_get:
> free_netdev(ndev);
>
> return ret;
> @@ -3435,10 +3383,10 @@ int stmmac_dvr_remove(struct device *dev)
> stmmac_set_mac(priv->ioaddr, false);
> netif_carrier_off(ndev);
> unregister_netdev(ndev);
> - if (priv->stmmac_rst)
> - reset_control_assert(priv->stmmac_rst);
> - clk_disable_unprepare(priv->pclk);
> - clk_disable_unprepare(priv->stmmac_clk);
> + if (priv->plat->stmmac_rst)
> + reset_control_assert(priv->plat->stmmac_rst);
> + clk_disable_unprepare(priv->plat->pclk);
> + clk_disable_unprepare(priv->plat->stmmac_clk);
> if (priv->hw->pcs != STMMAC_PCS_RGMII &&
> priv->hw->pcs != STMMAC_PCS_TBI &&
> priv->hw->pcs != STMMAC_PCS_RTBI)
> @@ -3487,8 +3435,8 @@ int stmmac_suspend(struct device *dev)
> stmmac_set_mac(priv->ioaddr, false);
> pinctrl_pm_select_sleep_state(priv->device);
> /* Disable clock in case of PWM is off */
> - clk_disable(priv->pclk);
> - clk_disable(priv->stmmac_clk);
> + clk_disable(priv->plat->pclk);
> + clk_disable(priv->plat->stmmac_clk);
> }
> spin_unlock_irqrestore(&priv->lock, flags);
>
> @@ -3528,8 +3476,8 @@ int stmmac_resume(struct device *dev)
> } else {
> pinctrl_pm_select_default_state(priv->device);
> /* enable the clk prevously disabled */
> - clk_enable(priv->stmmac_clk);
> - clk_enable(priv->pclk);
> + clk_enable(priv->plat->stmmac_clk);
> + clk_enable(priv->plat->pclk);
> /* reset the phy so that it's ready */
> if (priv->mii)
> stmmac_mdio_reset(priv->mii);
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> index 6064fcc..4e44f9c 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> @@ -336,7 +336,54 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
>
> plat->axi = stmmac_axi_setup(pdev);
>
> + /* clock setup */
> + plat->stmmac_clk = devm_clk_get(&pdev->dev,
> + STMMAC_RESOURCE_NAME);
> + if (IS_ERR(plat->stmmac_clk)) {
> + dev_warn(&pdev->dev, "Cannot get CSR clock\n");
> + plat->stmmac_clk = NULL;
> + }
> + clk_prepare_enable(plat->stmmac_clk);
> +
> + plat->pclk = devm_clk_get(&pdev->dev, "pclk");
> + if (IS_ERR(plat->pclk)) {
> + if (PTR_ERR(plat->pclk) == -EPROBE_DEFER)
> + goto error_pclk_get;
> +
> + plat->pclk = NULL;
> + }
> + clk_prepare_enable(plat->pclk);
> +
> + /* Fall-back to main clock in case of no PTP ref is passed */
> + plat->clk_ptp_ref = devm_clk_get(&pdev->dev, "clk_ptp_ref");
> + if (IS_ERR(plat->clk_ptp_ref)) {
> + plat->clk_ptp_rate = clk_get_rate(plat->stmmac_clk);
> + plat->clk_ptp_ref = NULL;
> + dev_warn(&pdev->dev, "PTP uses main clock\n");
> + } else {
> + clk_prepare_enable(plat->clk_ptp_ref);
> + plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
> + dev_info(&pdev->dev, "No reset control found\n");
> + }
> +
> + plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
> + STMMAC_RESOURCE_NAME);
> + if (IS_ERR(plat->stmmac_rst)) {
> + if (PTR_ERR(plat->stmmac_rst) == -EPROBE_DEFER)
> + goto error_hw_init;
> +
> + dev_info(&pdev->dev, "no reset control found\n");
> + plat->stmmac_rst = NULL;
> + }
> +
> return plat;
> +
> +error_hw_init:
> + clk_disable_unprepare(plat->pclk);
> +error_pclk_get:
> + clk_disable_unprepare(plat->stmmac_clk);
> +
> + return ERR_PTR(-EPROBE_DEFER);
> }
>
> /**
> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
> index 90fefde..e29e7b8 100644
> --- a/include/linux/stmmac.h
> +++ b/include/linux/stmmac.h
> @@ -139,6 +139,11 @@ struct plat_stmmacenet_data {
> int (*init)(struct platform_device *pdev, void *priv);
> void (*exit)(struct platform_device *pdev, void *priv);
> void *bsp_priv;
> + struct clk *stmmac_clk;
> + struct clk *pclk;
> + struct clk *clk_ptp_ref;
> + unsigned int clk_ptp_rate;
> + struct reset_control *stmmac_rst;
> struct stmmac_axi *axi;
> int has_gmac4;
> bool tso_en;
^ permalink raw reply
* Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth
From: Niklas Cassel @ 2017-01-04 16:27 UTC (permalink / raw)
To: Joao Pinto, davem; +Cc: larper, swarren, treding, netdev
In-Reply-To: <f72953efa2d6a42975b553a6b517c63480f4650b.1483546363.git.jpinto@synopsys.com>
Tested-by: Niklas Cassel <niklas.cassel@axis.com>
On 01/04/2017 05:22 PM, Joao Pinto wrote:
> This patch adds a new glue driver called dwmac-dwc-qos-eth which
> was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
> tweak was also added to stmmac_platform.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> changes v2 -> v3:
> - Nothing changed, just to keep up patch set version
> changes v1 -> v2:
> - WOL was not declared in the new glue driver
> - clocks were switched and now fixed (apb_pclk and phy_ref_clk)
>
> .../bindings/net/snps,dwc-qos-ethernet.txt | 3 +
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 +
> drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
> .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 200 +++++++++++++++++++++
> .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 15 +-
> 5 files changed, 225 insertions(+), 3 deletions(-)
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
>
> diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> index d93f71c..21d27aa 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> +++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> @@ -1,5 +1,8 @@
> * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
>
> +This binding is deprecated, but it continues to be supported, but new
> +features should be preferably added to the stmmac binding document.
> +
> This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
> IP block. The IP supports multiple options for bus type, clocking and reset
> structure, and feature list. Consequently, a number of properties and list
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index ab66248..99594e3 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -29,6 +29,15 @@ config STMMAC_PLATFORM
>
> if STMMAC_PLATFORM
>
> +config DWMAC_DWC_QOS_ETH
> + tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
> + select PHYLIB
> + select CRC32
> + select MII
> + depends on OF && HAS_DMA
> + help
> + Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
> +
> config DWMAC_GENERIC
> tristate "Generic driver for DWMAC"
> default STMMAC_PLATFORM
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 8f83a86..700c603 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
> obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
> obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
> obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
> +obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
> obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
> stmmac-platform-objs:= stmmac_platform.o
> dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
> new file mode 100644
> index 0000000..4532a7c
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
> @@ -0,0 +1,200 @@
> +/*
> + * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
> + *
> + * Copyright (C) 2016 Joao Pinto <jpinto@synopsys.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/device.h>
> +#include <linux/ethtool.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/of_net.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +#include <linux/stmmac.h>
> +
> +#include "stmmac_platform.h"
> +
> +static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
> + struct plat_stmmacenet_data *plat_dat)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + u32 burst_map = 0;
> + u32 bit_index = 0;
> + u32 a_index = 0;
> +
> + if (!plat_dat->axi) {
> + plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
> +
> + if (!plat_dat->axi)
> + return -ENOMEM;
> + }
> +
> + plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
> + if (of_property_read_u32(np, "snps,write-requests",
> + &plat_dat->axi->axi_wr_osr_lmt)) {
> + /**
> + * Since the register has a reset value of 1, if property
> + * is missing, default to 1.
> + */
> + plat_dat->axi->axi_wr_osr_lmt = 1;
> + } else {
> + /**
> + * If property exists, to keep the behavior from dwc_eth_qos,
> + * subtract one after parsing.
> + */
> + plat_dat->axi->axi_wr_osr_lmt--;
> + }
> +
> + if (of_property_read_u32(np, "read,read-requests",
> + &plat_dat->axi->axi_rd_osr_lmt)) {
> + /**
> + * Since the register has a reset value of 1, if property
> + * is missing, default to 1.
> + */
> + plat_dat->axi->axi_rd_osr_lmt = 1;
> + } else {
> + /**
> + * If property exists, to keep the behavior from dwc_eth_qos,
> + * subtract one after parsing.
> + */
> + plat_dat->axi->axi_rd_osr_lmt--;
> + }
> + of_property_read_u32(np, "snps,burst-map", &burst_map);
> +
> + /* converts burst-map bitmask to burst array */
> + for (bit_index = 0; bit_index < 7; bit_index++) {
> + if (burst_map & (1 << bit_index)) {
> + switch (bit_index) {
> + case 0:
> + plat_dat->axi->axi_blen[a_index] = 4; break;
> + case 1:
> + plat_dat->axi->axi_blen[a_index] = 8; break;
> + case 2:
> + plat_dat->axi->axi_blen[a_index] = 16; break;
> + case 3:
> + plat_dat->axi->axi_blen[a_index] = 32; break;
> + case 4:
> + plat_dat->axi->axi_blen[a_index] = 64; break;
> + case 5:
> + plat_dat->axi->axi_blen[a_index] = 128; break;
> + case 6:
> + plat_dat->axi->axi_blen[a_index] = 256; break;
> + default:
> + break;
> + }
> + a_index++;
> + }
> + }
> +
> + /* dwc-qos needs GMAC4, AAL, TSO and PMT */
> + plat_dat->has_gmac4 = 1;
> + plat_dat->dma_cfg->aal = 1;
> + plat_dat->tso_en = 1;
> + plat_dat->pmt = 1;
> +
> + return 0;
> +}
> +
> +static int dwc_eth_dwmac_probe(struct platform_device *pdev)
> +{
> + struct plat_stmmacenet_data *plat_dat;
> + struct stmmac_resources stmmac_res;
> + struct resource *res;
> + int ret;
> +
> + /**
> + * Since stmmac_platform supports name IRQ only, basic platform
> + * resource initialization is done in the glue logic.
> + */
> + stmmac_res.irq = platform_get_irq(pdev, 0);
> + if (stmmac_res.irq < 0) {
> + if (stmmac_res.irq != -EPROBE_DEFER) {
> + dev_err(&pdev->dev,
> + "IRQ configuration information not found\n");
> + }
> + return stmmac_res.irq;
> + }
> + stmmac_res.wol_irq = stmmac_res.irq;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + stmmac_res.addr = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(stmmac_res.addr))
> + return PTR_ERR(stmmac_res.addr);
> +
> + plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
> + if (IS_ERR(plat_dat))
> + return PTR_ERR(plat_dat);
> +
> + plat_dat->stmmac_clk = devm_clk_get(&pdev->dev, "apb_pclk");
> + if (IS_ERR(plat_dat->stmmac_clk)) {
> + dev_err(&pdev->dev, "apb_pclk clock not found.\n");
> + ret = PTR_ERR(plat_dat->stmmac_clk);
> + plat_dat->stmmac_clk = NULL;
> + goto err_remove_config_dt;
> + }
> + clk_prepare_enable(plat_dat->stmmac_clk);
> +
> + plat_dat->pclk = devm_clk_get(&pdev->dev, "phy_ref_clk");
> + if (IS_ERR(plat_dat->pclk)) {
> + dev_err(&pdev->dev, "phy_ref_clk clock not found.\n");
> + ret = PTR_ERR(plat_dat->pclk);
> + plat_dat->pclk = NULL;
> + goto err_out_clk_dis_phy;
> + }
> + clk_prepare_enable(plat_dat->pclk);
> +
> + ret = dwc_eth_dwmac_config_dt(pdev, plat_dat);
> + if (ret)
> + goto err_out_clk_dis_aper;
> +
> + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> + if (ret)
> + goto err_out_clk_dis_aper;
> +
> + return 0;
> +
> +err_out_clk_dis_aper:
> + clk_disable_unprepare(plat_dat->pclk);
> +err_out_clk_dis_phy:
> + clk_disable_unprepare(plat_dat->stmmac_clk);
> +err_remove_config_dt:
> + stmmac_remove_config_dt(pdev, plat_dat);
> +
> + return ret;
> +}
> +
> +static int dwc_eth_dwmac_remove(struct platform_device *pdev)
> +{
> + return stmmac_pltfr_remove(pdev);
> +}
> +
> +static const struct of_device_id dwc_eth_dwmac_match[] = {
> + { .compatible = "snps,dwc-qos-ethernet-4.10", },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
> +
> +static struct platform_driver dwc_eth_dwmac_driver = {
> + .probe = dwc_eth_dwmac_probe,
> + .remove = dwc_eth_dwmac_remove,
> + .driver = {
> + .name = "dwc-eth-dwmac",
> + .of_match_table = dwc_eth_dwmac_match,
> + },
> +};
> +module_platform_driver(dwc_eth_dwmac_driver);
> +
> +MODULE_AUTHOR("Joao Pinto <jpinto@synopsys.com>");
> +MODULE_DESCRIPTION("Synopsys DWC Ethernet Quality-of-Service v4.10a driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> index 4e44f9c..00c0f8d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> @@ -181,10 +181,19 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
> mdio = false;
> }
>
> - /* If snps,dwmac-mdio is passed from DT, always register the MDIO */
> - for_each_child_of_node(np, plat->mdio_node) {
> - if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio"))
> + /* exception for dwmac-dwc-qos-eth glue logic */
> + if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
> + plat->mdio_node = of_get_child_by_name(np, "mdio");
> + } else {
> + /**
> + * If snps,dwmac-mdio is passed from DT, always register
> + * the MDIO
> + */
> + for_each_child_of_node(np, plat->mdio_node) {
> + if (of_device_is_compatible(plat->mdio_node,
> + "snps,dwmac-mdio"))
> break;
> + }
> }
>
> if (plat->mdio_node) {
^ permalink raw reply
* Re: [PATCH net-next 2/2] tools: psock_tpacket: verify that packet was received on lo before counting it
From: Sowmini Varadhan @ 2017-01-04 16:27 UTC (permalink / raw)
To: Willem de Bruijn
Cc: linux-kselftest, Network Development, Daniel Borkmann,
Willem de Bruijn, David Miller, shuah
In-Reply-To: <CAF=yD-L4W0fWXA7yq38vTjzbeia72ZdnHVQJj3o4SqpMTGp=xQ@mail.gmail.com>
On (01/04/17 11:24), Willem de Bruijn wrote:
>
> Oh, good point. It may require some more refactoring. Feel free to
> leave it for me if you prefer.
actually it may not be so bad, let me do it, since I already have
a reliable way of reproducing this..
--Sowmini
^ permalink raw reply
* [PATCH net-next v2] tcp: provide timestamps for partial writes
From: Soheil Hassas Yeganeh @ 2017-01-04 16:19 UTC (permalink / raw)
To: davem, netdev
Cc: Soheil Hassas Yeganeh, Willem de Bruijn, Eric Dumazet,
Neal Cardwell, Martin KaFai Lau
From: Soheil Hassas Yeganeh <soheil@google.com>
For TCP sockets, TX timestamps are only captured when the user data
is successfully and fully written to the socket. In many cases,
however, TCP writes can be partial for which no timestamp is
collected.
Collect timestamps whenever any user data is (fully or partially)
copied into the socket. Pass tcp_write_queue_tail to tcp_tx_timestamp
instead of the local skb pointer since it can be set to NULL on
the error path.
Note that tcp_write_queue_tail can be NULL, even if bytes have been
copied to the socket. This is because acknowledgements are being
processed in tcp_sendmsg(), and by the time tcp_tx_timestamp is
called tcp_write_queue_tail can be NULL. For such cases, this patch
does not collect any timestamps (i.e., it is best-effort).
This patch is written with suggestions from Willem de Bruijn and
Eric Dumazet.
Change-log V1 -> V2:
- Use sockc.tsflags instead of sk->sk_tsflags.
- Use the same code path for normal writes and errors.
Signed-off-by: Soheil Hassas Yeganeh <soheil@google.com>
Acked-by: Yuchung Cheng <ycheng@google.com>
Cc: Willem de Bruijn <willemb@google.com>
Cc: Eric Dumazet <edumazet@google.com>
Cc: Neal Cardwell <ncardwell@google.com>
Cc: Martin KaFai Lau <kafai@fb.com>
---
net/ipv4/tcp.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 2e3807d8eba8..ec97e4b4a62f 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -429,7 +429,7 @@ EXPORT_SYMBOL(tcp_init_sock);
static void tcp_tx_timestamp(struct sock *sk, u16 tsflags, struct sk_buff *skb)
{
- if (tsflags) {
+ if (tsflags && skb) {
struct skb_shared_info *shinfo = skb_shinfo(skb);
struct tcp_skb_cb *tcb = TCP_SKB_CB(skb);
@@ -958,10 +958,8 @@ static ssize_t do_tcp_sendpages(struct sock *sk, struct page *page, int offset,
copied += copy;
offset += copy;
size -= copy;
- if (!size) {
- tcp_tx_timestamp(sk, sk->sk_tsflags, skb);
+ if (!size)
goto out;
- }
if (skb->len < size_goal || (flags & MSG_OOB))
continue;
@@ -987,8 +985,11 @@ static ssize_t do_tcp_sendpages(struct sock *sk, struct page *page, int offset,
}
out:
- if (copied && !(flags & MSG_SENDPAGE_NOTLAST))
- tcp_push(sk, flags, mss_now, tp->nonagle, size_goal);
+ if (copied) {
+ tcp_tx_timestamp(sk, sk->sk_tsflags, tcp_write_queue_tail(sk));
+ if (!(flags & MSG_SENDPAGE_NOTLAST))
+ tcp_push(sk, flags, mss_now, tp->nonagle, size_goal);
+ }
return copied;
do_error:
@@ -1281,7 +1282,6 @@ int tcp_sendmsg(struct sock *sk, struct msghdr *msg, size_t size)
copied += copy;
if (!msg_data_left(msg)) {
- tcp_tx_timestamp(sk, sockc.tsflags, skb);
if (unlikely(flags & MSG_EOR))
TCP_SKB_CB(skb)->eor = 1;
goto out;
@@ -1312,8 +1312,10 @@ int tcp_sendmsg(struct sock *sk, struct msghdr *msg, size_t size)
}
out:
- if (copied)
+ if (copied) {
+ tcp_tx_timestamp(sk, sockc.tsflags, tcp_write_queue_tail(sk));
tcp_push(sk, flags, mss_now, tp->nonagle, size_goal);
+ }
out_nopush:
release_sock(sk);
return copied + copied_syn;
--
2.11.0.390.gc69c2f50cf-goog
^ permalink raw reply related
* Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth
From: Niklas Cassel @ 2017-01-04 16:31 UTC (permalink / raw)
To: Joao Pinto, davem; +Cc: larper, swarren, treding, netdev
In-Reply-To: <f72953efa2d6a42975b553a6b517c63480f4650b.1483546363.git.jpinto@synopsys.com>
I think you accidentally removed the Reviewed-by from Lars.
On 01/04/2017 05:22 PM, Joao Pinto wrote:
> This patch adds a new glue driver called dwmac-dwc-qos-eth which
> was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
> tweak was also added to stmmac_platform.
>
> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
> ---
> changes v2 -> v3:
> - Nothing changed, just to keep up patch set version
> changes v1 -> v2:
> - WOL was not declared in the new glue driver
> - clocks were switched and now fixed (apb_pclk and phy_ref_clk)
>
> .../bindings/net/snps,dwc-qos-ethernet.txt | 3 +
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 +
> drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
> .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 200 +++++++++++++++++++++
> .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 15 +-
> 5 files changed, 225 insertions(+), 3 deletions(-)
> create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
>
> diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> index d93f71c..21d27aa 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> +++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
> @@ -1,5 +1,8 @@
> * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
>
> +This binding is deprecated, but it continues to be supported, but new
> +features should be preferably added to the stmmac binding document.
> +
> This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
> IP block. The IP supports multiple options for bus type, clocking and reset
> structure, and feature list. Consequently, a number of properties and list
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index ab66248..99594e3 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -29,6 +29,15 @@ config STMMAC_PLATFORM
>
> if STMMAC_PLATFORM
>
> +config DWMAC_DWC_QOS_ETH
> + tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
> + select PHYLIB
> + select CRC32
> + select MII
> + depends on OF && HAS_DMA
> + help
> + Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
> +
> config DWMAC_GENERIC
> tristate "Generic driver for DWMAC"
> default STMMAC_PLATFORM
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
> index 8f83a86..700c603 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
> @@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
> obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
> obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
> obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
> +obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
> obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
> stmmac-platform-objs:= stmmac_platform.o
> dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
> new file mode 100644
> index 0000000..4532a7c
> --- /dev/null
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
> @@ -0,0 +1,200 @@
> +/*
> + * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
> + *
> + * Copyright (C) 2016 Joao Pinto <jpinto@synopsys.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program. If not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/clk-provider.h>
> +#include <linux/device.h>
> +#include <linux/ethtool.h>
> +#include <linux/io.h>
> +#include <linux/ioport.h>
> +#include <linux/module.h>
> +#include <linux/of_net.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/platform_device.h>
> +#include <linux/stmmac.h>
> +
> +#include "stmmac_platform.h"
> +
> +static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
> + struct plat_stmmacenet_data *plat_dat)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + u32 burst_map = 0;
> + u32 bit_index = 0;
> + u32 a_index = 0;
> +
> + if (!plat_dat->axi) {
> + plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
> +
> + if (!plat_dat->axi)
> + return -ENOMEM;
> + }
> +
> + plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
> + if (of_property_read_u32(np, "snps,write-requests",
> + &plat_dat->axi->axi_wr_osr_lmt)) {
> + /**
> + * Since the register has a reset value of 1, if property
> + * is missing, default to 1.
> + */
> + plat_dat->axi->axi_wr_osr_lmt = 1;
> + } else {
> + /**
> + * If property exists, to keep the behavior from dwc_eth_qos,
> + * subtract one after parsing.
> + */
> + plat_dat->axi->axi_wr_osr_lmt--;
> + }
> +
> + if (of_property_read_u32(np, "read,read-requests",
> + &plat_dat->axi->axi_rd_osr_lmt)) {
> + /**
> + * Since the register has a reset value of 1, if property
> + * is missing, default to 1.
> + */
> + plat_dat->axi->axi_rd_osr_lmt = 1;
> + } else {
> + /**
> + * If property exists, to keep the behavior from dwc_eth_qos,
> + * subtract one after parsing.
> + */
> + plat_dat->axi->axi_rd_osr_lmt--;
> + }
> + of_property_read_u32(np, "snps,burst-map", &burst_map);
> +
> + /* converts burst-map bitmask to burst array */
> + for (bit_index = 0; bit_index < 7; bit_index++) {
> + if (burst_map & (1 << bit_index)) {
> + switch (bit_index) {
> + case 0:
> + plat_dat->axi->axi_blen[a_index] = 4; break;
> + case 1:
> + plat_dat->axi->axi_blen[a_index] = 8; break;
> + case 2:
> + plat_dat->axi->axi_blen[a_index] = 16; break;
> + case 3:
> + plat_dat->axi->axi_blen[a_index] = 32; break;
> + case 4:
> + plat_dat->axi->axi_blen[a_index] = 64; break;
> + case 5:
> + plat_dat->axi->axi_blen[a_index] = 128; break;
> + case 6:
> + plat_dat->axi->axi_blen[a_index] = 256; break;
> + default:
> + break;
> + }
> + a_index++;
> + }
> + }
> +
> + /* dwc-qos needs GMAC4, AAL, TSO and PMT */
> + plat_dat->has_gmac4 = 1;
> + plat_dat->dma_cfg->aal = 1;
> + plat_dat->tso_en = 1;
> + plat_dat->pmt = 1;
> +
> + return 0;
> +}
> +
> +static int dwc_eth_dwmac_probe(struct platform_device *pdev)
> +{
> + struct plat_stmmacenet_data *plat_dat;
> + struct stmmac_resources stmmac_res;
> + struct resource *res;
> + int ret;
> +
> + /**
> + * Since stmmac_platform supports name IRQ only, basic platform
> + * resource initialization is done in the glue logic.
> + */
> + stmmac_res.irq = platform_get_irq(pdev, 0);
> + if (stmmac_res.irq < 0) {
> + if (stmmac_res.irq != -EPROBE_DEFER) {
> + dev_err(&pdev->dev,
> + "IRQ configuration information not found\n");
> + }
> + return stmmac_res.irq;
> + }
> + stmmac_res.wol_irq = stmmac_res.irq;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + stmmac_res.addr = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(stmmac_res.addr))
> + return PTR_ERR(stmmac_res.addr);
> +
> + plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
> + if (IS_ERR(plat_dat))
> + return PTR_ERR(plat_dat);
> +
> + plat_dat->stmmac_clk = devm_clk_get(&pdev->dev, "apb_pclk");
> + if (IS_ERR(plat_dat->stmmac_clk)) {
> + dev_err(&pdev->dev, "apb_pclk clock not found.\n");
> + ret = PTR_ERR(plat_dat->stmmac_clk);
> + plat_dat->stmmac_clk = NULL;
> + goto err_remove_config_dt;
> + }
> + clk_prepare_enable(plat_dat->stmmac_clk);
> +
> + plat_dat->pclk = devm_clk_get(&pdev->dev, "phy_ref_clk");
> + if (IS_ERR(plat_dat->pclk)) {
> + dev_err(&pdev->dev, "phy_ref_clk clock not found.\n");
> + ret = PTR_ERR(plat_dat->pclk);
> + plat_dat->pclk = NULL;
> + goto err_out_clk_dis_phy;
> + }
> + clk_prepare_enable(plat_dat->pclk);
> +
> + ret = dwc_eth_dwmac_config_dt(pdev, plat_dat);
> + if (ret)
> + goto err_out_clk_dis_aper;
> +
> + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
> + if (ret)
> + goto err_out_clk_dis_aper;
> +
> + return 0;
> +
> +err_out_clk_dis_aper:
> + clk_disable_unprepare(plat_dat->pclk);
> +err_out_clk_dis_phy:
> + clk_disable_unprepare(plat_dat->stmmac_clk);
> +err_remove_config_dt:
> + stmmac_remove_config_dt(pdev, plat_dat);
> +
> + return ret;
> +}
> +
> +static int dwc_eth_dwmac_remove(struct platform_device *pdev)
> +{
> + return stmmac_pltfr_remove(pdev);
> +}
> +
> +static const struct of_device_id dwc_eth_dwmac_match[] = {
> + { .compatible = "snps,dwc-qos-ethernet-4.10", },
> + { }
> +};
> +MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
> +
> +static struct platform_driver dwc_eth_dwmac_driver = {
> + .probe = dwc_eth_dwmac_probe,
> + .remove = dwc_eth_dwmac_remove,
> + .driver = {
> + .name = "dwc-eth-dwmac",
> + .of_match_table = dwc_eth_dwmac_match,
> + },
> +};
> +module_platform_driver(dwc_eth_dwmac_driver);
> +
> +MODULE_AUTHOR("Joao Pinto <jpinto@synopsys.com>");
> +MODULE_DESCRIPTION("Synopsys DWC Ethernet Quality-of-Service v4.10a driver");
> +MODULE_LICENSE("GPL v2");
> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> index 4e44f9c..00c0f8d 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
> @@ -181,10 +181,19 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
> mdio = false;
> }
>
> - /* If snps,dwmac-mdio is passed from DT, always register the MDIO */
> - for_each_child_of_node(np, plat->mdio_node) {
> - if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio"))
> + /* exception for dwmac-dwc-qos-eth glue logic */
> + if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
> + plat->mdio_node = of_get_child_by_name(np, "mdio");
> + } else {
> + /**
> + * If snps,dwmac-mdio is passed from DT, always register
> + * the MDIO
> + */
> + for_each_child_of_node(np, plat->mdio_node) {
> + if (of_device_is_compatible(plat->mdio_node,
> + "snps,dwmac-mdio"))
> break;
> + }
> }
>
> if (plat->mdio_node) {
^ permalink raw reply
* [SIDE DISCUSSION] Re: [PATCH] phy state machine: failsafe leave invalid RUNNING state
From: Matthias May @ 2017-01-04 16:24 UTC (permalink / raw)
To: Andrew Lunn; +Cc: Zefir Kurtisi, Florian Fainelli, netdev
In-Reply-To: <20170104161615.GF5517@lunn.ch>
On 04/01/17 17:16, Andrew Lunn wrote:
>> The setup is as follows:
>> mv88e6321:
>> * ports 0+1 connected to fibre-optics transceivers at fixed 100 Mbps
>> * port 4 is CPU port
>> * custom phy driver (replacement for marvell.ko) only populated with
>> * .config_init to
>> * set fixed speed for ports 0+1 (when in FO mode)
>> * run genphy_config_init() for all other modes (here: CPU port)
>> * .config_aneg=genphy_config_aneg, .read_status=genphy_read_status
>
> Kicking off a side discussion:
>
> Why do a custom PHY driver? What cannot you do with the current DSA
> code? I've got boards with two FO ports, and using fixed-phy is all i
> need to make them work on a 6352.
>
> Andrew
>
We make two FO boards for 100Mbps and Gbit with different transceivers.
These different transceivers need each their own drive strength.
As Zefir wrote it's basically just a remap to the genphy functions with
some additional hardware specific register writes when the POR values
for FO configuration are detected on a port.
BR
Matthias
^ permalink raw reply
* Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth
From: Joao Pinto @ 2017-01-04 16:36 UTC (permalink / raw)
To: Niklas Cassel, Joao Pinto, davem; +Cc: larper, swarren, treding, netdev
In-Reply-To: <e3081bf2-e1ca-7e29-07d0-b31eb2823762@axis.com>
Às 4:31 PM de 1/4/2017, Niklas Cassel escreveu:
> I think you accidentally removed the Reviewed-by from Lars.
I took it off because the driver was changed after the first review (v1->v2).
Lars, could you please confirm that everything is fine for you?
Thanks.
>
> On 01/04/2017 05:22 PM, Joao Pinto wrote:
>> This patch adds a new glue driver called dwmac-dwc-qos-eth which
>> was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
>> tweak was also added to stmmac_platform.
>>
>> Signed-off-by: Joao Pinto <jpinto@synopsys.com>
>> ---
>> changes v2 -> v3:
>> - Nothing changed, just to keep up patch set version
>> changes v1 -> v2:
>> - WOL was not declared in the new glue driver
>> - clocks were switched and now fixed (apb_pclk and phy_ref_clk)
>>
>> .../bindings/net/snps,dwc-qos-ethernet.txt | 3 +
>> drivers/net/ethernet/stmicro/stmmac/Kconfig | 9 +
>> drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
>> .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c | 200 +++++++++++++++++++++
>> .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 15 +-
>> 5 files changed, 225 insertions(+), 3 deletions(-)
>> create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
>>
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
>> index d93f71c..21d27aa 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
>> +++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
>> @@ -1,5 +1,8 @@
>> * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
>>
>> +This binding is deprecated, but it continues to be supported, but new
>> +features should be preferably added to the stmmac binding document.
>> +
>> This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
>> IP block. The IP supports multiple options for bus type, clocking and reset
>> structure, and feature list. Consequently, a number of properties and list
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> index ab66248..99594e3 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> @@ -29,6 +29,15 @@ config STMMAC_PLATFORM
>>
>> if STMMAC_PLATFORM
>>
>> +config DWMAC_DWC_QOS_ETH
>> + tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
>> + select PHYLIB
>> + select CRC32
>> + select MII
>> + depends on OF && HAS_DMA
>> + help
>> + Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
>> +
>> config DWMAC_GENERIC
>> tristate "Generic driver for DWMAC"
>> default STMMAC_PLATFORM
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> index 8f83a86..700c603 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
>> @@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
>> obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
>> obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
>> obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o
>> +obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o
>> obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o
>> stmmac-platform-objs:= stmmac_platform.o
>> dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
>> new file mode 100644
>> index 0000000..4532a7c
>> --- /dev/null
>> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
>> @@ -0,0 +1,200 @@
>> +/*
>> + * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
>> + *
>> + * Copyright (C) 2016 Joao Pinto <jpinto@synopsys.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see <https://urldefense.proofpoint.com/v2/url?u=http-3A__www.gnu.org_licenses_&d=DgIC-g&c=DPL6_X_6JkXFx7AXWqB0tg&r=s2fO0hii0OGNOv9qQy_HRXy-xAJUD1NNoEcc3io_kx0&m=jmoFmglB-YKlIAGvraqqQjZI2mrDkiGUcJ1ThAvxT28&s=iOOZn_X7Atdgfy9ybDRxGhRY08ZpsS1_Z-Q_OHPiSnE&e= >.
>> + */
>> +
>> +#include <linux/clk.h>
>> +#include <linux/clk-provider.h>
>> +#include <linux/device.h>
>> +#include <linux/ethtool.h>
>> +#include <linux/io.h>
>> +#include <linux/ioport.h>
>> +#include <linux/module.h>
>> +#include <linux/of_net.h>
>> +#include <linux/mfd/syscon.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/stmmac.h>
>> +
>> +#include "stmmac_platform.h"
>> +
>> +static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
>> + struct plat_stmmacenet_data *plat_dat)
>> +{
>> + struct device_node *np = pdev->dev.of_node;
>> + u32 burst_map = 0;
>> + u32 bit_index = 0;
>> + u32 a_index = 0;
>> +
>> + if (!plat_dat->axi) {
>> + plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
>> +
>> + if (!plat_dat->axi)
>> + return -ENOMEM;
>> + }
>> +
>> + plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
>> + if (of_property_read_u32(np, "snps,write-requests",
>> + &plat_dat->axi->axi_wr_osr_lmt)) {
>> + /**
>> + * Since the register has a reset value of 1, if property
>> + * is missing, default to 1.
>> + */
>> + plat_dat->axi->axi_wr_osr_lmt = 1;
>> + } else {
>> + /**
>> + * If property exists, to keep the behavior from dwc_eth_qos,
>> + * subtract one after parsing.
>> + */
>> + plat_dat->axi->axi_wr_osr_lmt--;
>> + }
>> +
>> + if (of_property_read_u32(np, "read,read-requests",
>> + &plat_dat->axi->axi_rd_osr_lmt)) {
>> + /**
>> + * Since the register has a reset value of 1, if property
>> + * is missing, default to 1.
>> + */
>> + plat_dat->axi->axi_rd_osr_lmt = 1;
>> + } else {
>> + /**
>> + * If property exists, to keep the behavior from dwc_eth_qos,
>> + * subtract one after parsing.
>> + */
>> + plat_dat->axi->axi_rd_osr_lmt--;
>> + }
>> + of_property_read_u32(np, "snps,burst-map", &burst_map);
>> +
>> + /* converts burst-map bitmask to burst array */
>> + for (bit_index = 0; bit_index < 7; bit_index++) {
>> + if (burst_map & (1 << bit_index)) {
>> + switch (bit_index) {
>> + case 0:
>> + plat_dat->axi->axi_blen[a_index] = 4; break;
>> + case 1:
>> + plat_dat->axi->axi_blen[a_index] = 8; break;
>> + case 2:
>> + plat_dat->axi->axi_blen[a_index] = 16; break;
>> + case 3:
>> + plat_dat->axi->axi_blen[a_index] = 32; break;
>> + case 4:
>> + plat_dat->axi->axi_blen[a_index] = 64; break;
>> + case 5:
>> + plat_dat->axi->axi_blen[a_index] = 128; break;
>> + case 6:
>> + plat_dat->axi->axi_blen[a_index] = 256; break;
>> + default:
>> + break;
>> + }
>> + a_index++;
>> + }
>> + }
>> +
>> + /* dwc-qos needs GMAC4, AAL, TSO and PMT */
>> + plat_dat->has_gmac4 = 1;
>> + plat_dat->dma_cfg->aal = 1;
>> + plat_dat->tso_en = 1;
>> + plat_dat->pmt = 1;
>> +
>> + return 0;
>> +}
>> +
>> +static int dwc_eth_dwmac_probe(struct platform_device *pdev)
>> +{
>> + struct plat_stmmacenet_data *plat_dat;
>> + struct stmmac_resources stmmac_res;
>> + struct resource *res;
>> + int ret;
>> +
>> + /**
>> + * Since stmmac_platform supports name IRQ only, basic platform
>> + * resource initialization is done in the glue logic.
>> + */
>> + stmmac_res.irq = platform_get_irq(pdev, 0);
>> + if (stmmac_res.irq < 0) {
>> + if (stmmac_res.irq != -EPROBE_DEFER) {
>> + dev_err(&pdev->dev,
>> + "IRQ configuration information not found\n");
>> + }
>> + return stmmac_res.irq;
>> + }
>> + stmmac_res.wol_irq = stmmac_res.irq;
>> +
>> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + stmmac_res.addr = devm_ioremap_resource(&pdev->dev, res);
>> + if (IS_ERR(stmmac_res.addr))
>> + return PTR_ERR(stmmac_res.addr);
>> +
>> + plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
>> + if (IS_ERR(plat_dat))
>> + return PTR_ERR(plat_dat);
>> +
>> + plat_dat->stmmac_clk = devm_clk_get(&pdev->dev, "apb_pclk");
>> + if (IS_ERR(plat_dat->stmmac_clk)) {
>> + dev_err(&pdev->dev, "apb_pclk clock not found.\n");
>> + ret = PTR_ERR(plat_dat->stmmac_clk);
>> + plat_dat->stmmac_clk = NULL;
>> + goto err_remove_config_dt;
>> + }
>> + clk_prepare_enable(plat_dat->stmmac_clk);
>> +
>> + plat_dat->pclk = devm_clk_get(&pdev->dev, "phy_ref_clk");
>> + if (IS_ERR(plat_dat->pclk)) {
>> + dev_err(&pdev->dev, "phy_ref_clk clock not found.\n");
>> + ret = PTR_ERR(plat_dat->pclk);
>> + plat_dat->pclk = NULL;
>> + goto err_out_clk_dis_phy;
>> + }
>> + clk_prepare_enable(plat_dat->pclk);
>> +
>> + ret = dwc_eth_dwmac_config_dt(pdev, plat_dat);
>> + if (ret)
>> + goto err_out_clk_dis_aper;
>> +
>> + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
>> + if (ret)
>> + goto err_out_clk_dis_aper;
>> +
>> + return 0;
>> +
>> +err_out_clk_dis_aper:
>> + clk_disable_unprepare(plat_dat->pclk);
>> +err_out_clk_dis_phy:
>> + clk_disable_unprepare(plat_dat->stmmac_clk);
>> +err_remove_config_dt:
>> + stmmac_remove_config_dt(pdev, plat_dat);
>> +
>> + return ret;
>> +}
>> +
>> +static int dwc_eth_dwmac_remove(struct platform_device *pdev)
>> +{
>> + return stmmac_pltfr_remove(pdev);
>> +}
>> +
>> +static const struct of_device_id dwc_eth_dwmac_match[] = {
>> + { .compatible = "snps,dwc-qos-ethernet-4.10", },
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, dwc_eth_dwmac_match);
>> +
>> +static struct platform_driver dwc_eth_dwmac_driver = {
>> + .probe = dwc_eth_dwmac_probe,
>> + .remove = dwc_eth_dwmac_remove,
>> + .driver = {
>> + .name = "dwc-eth-dwmac",
>> + .of_match_table = dwc_eth_dwmac_match,
>> + },
>> +};
>> +module_platform_driver(dwc_eth_dwmac_driver);
>> +
>> +MODULE_AUTHOR("Joao Pinto <jpinto@synopsys.com>");
>> +MODULE_DESCRIPTION("Synopsys DWC Ethernet Quality-of-Service v4.10a driver");
>> +MODULE_LICENSE("GPL v2");
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> index 4e44f9c..00c0f8d 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
>> @@ -181,10 +181,19 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
>> mdio = false;
>> }
>>
>> - /* If snps,dwmac-mdio is passed from DT, always register the MDIO */
>> - for_each_child_of_node(np, plat->mdio_node) {
>> - if (of_device_is_compatible(plat->mdio_node, "snps,dwmac-mdio"))
>> + /* exception for dwmac-dwc-qos-eth glue logic */
>> + if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) {
>> + plat->mdio_node = of_get_child_by_name(np, "mdio");
>> + } else {
>> + /**
>> + * If snps,dwmac-mdio is passed from DT, always register
>> + * the MDIO
>> + */
>> + for_each_child_of_node(np, plat->mdio_node) {
>> + if (of_device_is_compatible(plat->mdio_node,
>> + "snps,dwmac-mdio"))
>> break;
>> + }
>> }
>>
>> if (plat->mdio_node) {
>
^ permalink raw reply
* Re: [PATCH] MIPS: NI 169445 board support
From: Nathan Sullivan @ 2017-01-04 16:38 UTC (permalink / raw)
To: Ralf Baechle, linux-mips; +Cc: davem, netdev, linux-kernel
In-Reply-To: <20161220163434.GA15962@linux-mips.org>
On Tue, Dec 20, 2016 at 05:34:34PM +0100, Ralf Baechle wrote:
> On Fri, Dec 02, 2016 at 09:42:09AM -0600, Nathan Sullivan wrote:
> > Date: Fri, 2 Dec 2016 09:42:09 -0600
> > From: Nathan Sullivan <nathan.sullivan@ni.com>
> > To: ralf@linux-mips.org, mark.rutland@arm.com, robh+dt@kernel.org
> > CC: linux-mips@linux-mips.org, devicetree@vger.kernel.org,
> > linux-kernel@vger.kernel.org, Nathan Sullivan <nathan.sullivan@ni.com>
> > Subject: [PATCH] MIPS: NI 169445 board support
> > Content-Type: text/plain
> >
> > Support the National Instruments 169445 board.
>
> Nathan,
>
> I assume you're going to repost the changes Rob asked for in
> https://patchwork.linux-mips.org/patch/14641/#26924 and resubmit?
>
> Thanks,
>
> Ralf
Hmm, I found the issue with the generic MIPS config and dwc_eth_qos. The NIC
driver attempts to cache align a descriptor ring using the ___cacheline_aligned
attribute on the descriptor struct, in combination with a "skip" feature in
hardware. However, the skip feature only has a three bit field, and the generic
MIPS config selects MIPS_L1_CACHE_SHIFT_7. So, the line size is 128, and with a
64-bit bus, that means the NIC descriptor skip field would need to be set to
14 to align the 16-byte descriptors...
I guess it makes sense for a generic MIPS kernel to align everything for 128 byte
cache lines, and for me to fix the dwc_eth_qos driver to handle cases where the
line size is too big for the hardware skip feature, right?
Thanks,
Nathan
^ permalink raw reply
* Re: [PATCH] ethtool: add one ethtool option to set relax ordering mode
From: Alexander Duyck @ 2017-01-04 16:50 UTC (permalink / raw)
To: maowenan
Cc: netdev@vger.kernel.org, jeffrey.t.kirsher@intel.com,
Stephen Hemminger, weiyongjun (A), Dingtianhong, Wangzhou (B)
In-Reply-To: <F95AC9340317A84688A5F0DF0246F3F2015240E0@szxeml504-mbs.china.huawei.com>
On Wed, Jan 4, 2017 at 1:02 AM, maowenan <maowenan@huawei.com> wrote:
>
>
>> -----Original Message-----
>> From: maowenan
>> Sent: Monday, December 26, 2016 4:33 PM
>> To: maowenan; 'Alexander Duyck'
>> Cc: 'Jeff Kirsher'; 'Stephen Hemminger'; 'netdev@vger.kernel.org'; weiyongjun
>> (A); Dingtianhong; Wangzhou (B)
>> Subject: RE: [PATCH] ethtool: add one ethtool option to set relax ordering mode
>>
>>
>>
>> > -----Original Message-----
>> > From: maowenan
>> > Sent: Saturday, December 24, 2016 4:30 PM
>> > To: 'Alexander Duyck'
>> > Cc: Jeff Kirsher; Stephen Hemminger; netdev@vger.kernel.org;
>> > weiyongjun (A); Dingtianhong; Wangzhou (B)
>> > Subject: RE: [PATCH] ethtool: add one ethtool option to set relax
>> > ordering mode
>> >
>> >
>> >
>> > > -----Original Message-----
>> > > From: Alexander Duyck [mailto:alexander.duyck@gmail.com]
>> > > Sent: Friday, December 23, 2016 11:43 PM
>> > > To: maowenan
>> > > Cc: Jeff Kirsher; Stephen Hemminger; netdev@vger.kernel.org;
>> > > weiyongjun (A); Dingtianhong
>> > > Subject: Re: [PATCH] ethtool: add one ethtool option to set relax
>> > > ordering mode
>> > >
>> > > On Thu, Dec 22, 2016 at 10:14 PM, maowenan <maowenan@huawei.com>
>> > > wrote:
>> > > >
>> > > >
>> > > >> -----Original Message-----
>> > > >> From: Jeff Kirsher [mailto:jeffrey.t.kirsher@intel.com]
>> > > >> Sent: Friday, December 23, 2016 9:07 AM
>> > > >> To: maowenan; Alexander Duyck
>> > > >> Cc: Stephen Hemminger; netdev@vger.kernel.org; weiyongjun (A);
>> > > >> Dingtianhong
>> > > >> Subject: Re: [PATCH] ethtool: add one ethtool option to set relax
>> > > >> ordering mode
>> > > >>
>> > > >> On Fri, 2016-12-23 at 00:40 +0000, maowenan wrote:
>> > > >> > > -----Original Message-----
>> > > >> > > From: Alexander Duyck [mailto:alexander.duyck@gmail.com]
>> > > >> > > Sent: Thursday, December 22, 2016 11:54 PM
>> > > >> > > To: maowenan
>> > > >> > > Cc: Stephen Hemminger; netdev@vger.kernel.org;
>> > > jeffrey.t.kirsher@intel.
>> > > >> > > com;
>> > > >> > > weiyongjun (A); Dingtianhong
>> > > >> > > Subject: Re: [PATCH] ethtool: add one ethtool option to set
>> > > >> > > relax ordering mode
>> > > >> > >
>> > > >> > > On Wed, Dec 21, 2016 at 5:39 PM, maowenan
>> > > <maowenan@huawei.com>
>> > > >> > > wrote:
>> > > >> > > >
>> > > >> > > >
>> > > >> > > > > -----Original Message-----
>> > > >> > > > > From: Stephen Hemminger
>> > > >> > > > > [mailto:stephen@networkplumber.org]
>> > > >> > > > > Sent: Thursday, December 22, 2016 9:28 AM
>> > > >> > > > > To: maowenan
>> > > >> > > > > Cc: netdev@vger.kernel.org; jeffrey.t.kirsher@intel.com
>> > > >> > > > > Subject: Re: [PATCH] ethtool: add one ethtool option to
>> > > >> > > > > set relax ordering mode
>> > > >> > > > >
>> > > >> > > > > On Thu, 8 Dec 2016 14:51:38 +0800 Mao Wenan
>> > > >> > > > > <maowenan@huawei.com> wrote:
>> > > >> > > > >
>> > > >> > > > > > This patch provides one way to set/unset IXGBE NIC TX
>> > > >> > > > > > and RX relax ordering mode, which can be set by ethtool.
>> > > >> > > > > > Relax ordering is one mode of 82599 NIC, to enable this
>> > > >> > > > > > mode can enhance the performance for some cpu architecure.
>> > > >> > > > >
>> > > >> > > > > Then it should be done by CPU architecture specific
>> > > >> > > > > quirks (preferably in PCI
>> > > >> > > > > layer) so that all users get the option without having to
>> > > >> > > > > do manual
>> > > >> > >
>> > > >> > > intervention.
>> > > >> > > > >
>> > > >> > > > > > example:
>> > > >> > > > > > ethtool -s enp1s0f0 relaxorder off ethtool -s enp1s0f0
>> > > >> > > > > > relaxorder on
>> > > >> > > > >
>> > > >> > > > > Doing it via ethtool is a developer API (for testing) not
>> > > >> > > > > something that makes sense in production.
>> > > >> > > >
>> > > >> > > >
>> > > >> > > > This feature is not mandatory for all users, acturally
>> > > >> > > > relax ordering default configuration of 82599 is 'disable',
>> > > >> > > > So this patch gives one way to
>> > > >> > >
>> > > >> > > enable relax ordering to be selected in some performance condition.
>> > > >> > >
>> > > >> > > That isn't quite true. The default for Sparc systems is to
>> > > >> > > have it enabled.
>> > > >> > >
>> > > >> > > Really this is something that is platform specific. I agree
>> > > >> > > with Stephen that it would work better if this was handled as
>> > > >> > > a series of platform specific quirks handled at something
>> > > >> > > like the PCI layer rather than be a switch the user can toggle on and
>> off.
>> > > >> > >
>> > > >> > > With that being said there are changes being made that should
>> > > >> > > help to improve the situation. Specifically I am looking at
>> > > >> > > adding support for the DMA_ATTR_WEAK_ORDERING which may
>> also
>> > > >> > > allow us to identify cases where you might be able to specify
>> > > >> > > the DMA behavior via the DMA mapping instead of having to
>> > > >> > > make the final decision in the device itself.
>> > > >> > >
>> > > >> > > - Alex
>> > > >> >
>> > > >> > Yes, Sparc is a special case. From the NIC driver point of
>> > > >> > view, It is no need for some ARCHs to do particular operation
>> > > >> > and compiling branch, ethtool is a flexible method for user to
>> > > >> > make decision whether
>> > > >> > on|off this feature.
>> > > >> > I think Jeff as maintainer of 82599 has some comments about this.
>> > > >>
>> > > >> My original comment/objection was that you attempted to do this
>> > > >> change as a module parameter to the ixgbe driver, where I
>> > > >> directed you to use ethtool so that other drivers could benefit
>> > > >> from the ability to enable/disable relaxed ordering. As far as
>> > > >> how it gets implemented in ethtool or PCI layer, makes little
>> > > >> difference to me, I only had issues with the driver specific
>> > > >> module parameter implementation,
>> > > which is not acceptable.
>> > > >
>> > > >
>> > > > Thank you Jeff and Alex.
>> > > > And then I have gone through mail thread about "i40e: enable PCIe
>> > > > relax ordering for SPARC", It only works for SPARC, any other ARCH
>> > > > who wants to enable DMA_ATTR_WEAK_ORDERING feature, should
>> define
>> > > > the
>> > > new macro, recompile the driver module.
>> > > >
>> > > > Because of the above reasons, we implement in ethtool to give the
>> > > > final user a convenient way to on|off special feature, no need
>> > > > define new macro, easy to extend the new features, and also good
>> > > > benefit for other
>> > > driver as Jeff referred.
>> > > >
>> > >
>> > > I think the point is we shouldn't base the decision on user input.
>> > > The fact is the PCIe device control register should have a bit that
>> > > indicates if the device is allowed to enable relaxed ordering or not.
>> > > If we can guarantee that the bit is set in all the cases where it
>> > > should be set, and cleared in all the cases where it should not then
>> > > we could use something like that to determine if the device is
>> > > supposed to enable relaxed ordering instead of trying to make the
>> > > decision
>> > ourselves.
>> > >
>> > > - Alex
>> >
>> > ok. We are focusing on the register.
>> > And yes, to enable relax ordering for 82599 should be set by one or
>> > more bits of Rx/TX DCA Control Register, these bits should be set in
>> > many cpu architectures, such as arm64, sparc, and so on, and should be
>> cleared in other ARCHs.
>> > By the way, how do you enable SPARC macro, how and where to define
>> > this compiling macro when user one to enable relax ordering under SPARC
>> system?
>> > #ifndef CONFIG_SPARC
>> >
>> >
>>
>>
>> Hi, Alex,
>> Have you already sent out the patches about DMA_ATTR_WEAK_ORDERING?
>> We want to get you how to enable DMA_ATTR_WEAK_ORDERING by PCIe layer,
>> and we can refer to that.
>
> I have verified DMA_ATTR_WEAK_ORDERING is not usable for our system(arm64 and 82599),
> We should enable relax ordering in 82599 DCA control register to improve performance.
> As Stephen Hemminger do not suggest use ethtool to set relax ordering feature,
> @Jeff, do you agree with using erratum config to enable RO mode in 82599.
> Codes like below:
> In Kconfig:
> +config HI_ERRATUM_xxxx
>
> In ixgbe_82599.c
> #if !defined (CONFIG_SPARC) || !defined(HI_ERRATUM_xxxx)
> /* Disable relaxed ordering */
> for (i = 0; ((i < hw->mac.max_tx_queues) &&
> (i < IXGBE_DCA_MAX_QUEUES_82598)); i++) {
> regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
> regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN;
> IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval);
> }
>
> for (i = 0; ((i < hw->mac.max_rx_queues) &&
> (i < IXGBE_DCA_MAX_QUEUES_82598)); i++) {
> regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
> regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN |
> IXGBE_DCA_RXCTRL_HEAD_WRO_EN);
> IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval);
> }
> #endif
Instead of having the driver add a flag per architecture maybe it
would be worthwhile to look at adding a config flag that can be set
specifically for the architectures that need it. Maybe something like
a "ARCH_WANT_RO_DMA" that then drivers could modify their relaxed
ordering flag based on. Then you could just add the flag to the SPARC
and your arm64 kconfig options and not have to involve the other
architectures.
- Alex
^ permalink raw reply
* [PATCH v2 net-next 0/2] tools: psock_tpacket bug fixes
From: Sowmini Varadhan @ 2017-01-04 17:33 UTC (permalink / raw)
To: linux-kselftest, netdev, sowmini.varadhan; +Cc: daniel, willemb, davem, shuah
This patchset includes fixes to psock_tpacket for false-negatives
sporadically reported by the test when it was run concurrently with
other heavy network traffic (e.g., over an ssh session, as opposed
to running the test from the console of the test machine). The
test sometimes failed with errors reporting more recvd packets than
expected (e.g., "walk_v0_rx: received 201 out of 100 pkts") or
the reception of non-IP packets (e.g., ARP packets).
There are 2 sources of network interference that can disrupt the test:
1. set_sockfilter() can use some hardening (currently passes up packets
based on ip length field, and payload signature but this may potentially
match other network traffic on the test machine)
2. There is a race-window between packet_create() and packet_do_bind()
in which packets from any interface (e.g., eth0) will get queued
for Rx on the test socket.
Patch 1 fixes the first issue by cleaing up set_sockfilter() and
hardening it to make sure that it only permits UDP/IPv4 packets.
Patch 2 fixes the second issue by making sure we open the PF_PACKET
socket with protocol 0 to reject all packets, and make sure the
BPF filter is set up before binding the socket to ETH_P_ALL and lo.
Changes from v2: patch 2 reworked based on review comments.
Sowmini Varadhan (2):
tools: tighten conditions checked in sock_setfilter
tools: psock_tpacket: block Rx until socket filter has been added and
socket has been bound to loopback.
tools/testing/selftests/net/psock_lib.h | 28 ++++++++++++++++++++------
tools/testing/selftests/net/psock_tpacket.c | 6 ++--
2 files changed, 24 insertions(+), 10 deletions(-)
^ permalink raw reply
* [PATCH v2 net-next 1/2] tools: psock_lib: tighten conditions checked in sock_setfilter
From: Sowmini Varadhan @ 2017-01-04 17:33 UTC (permalink / raw)
To: linux-kselftest, netdev, sowmini.varadhan; +Cc: daniel, willemb, davem, shuah
In-Reply-To: <cover.1483549208.git.sowmini.varadhan@oracle.com>
The bpf_prog used in sock_setfilter() only attempts to check for
ip pktlen, and verifies that the contents of the 80'th packet in
the ethernet frame is 'a' or 'b'. Thus many non-udp packets
could incorrectly pass through this filter and cause incorrect
test results.
This commit hardens the conditions checked by the filter so
that only UDP/IPv4 packets with the matching length and test-character
will be permitted by the filter. The filter has been cleaned up
to explicitly use the BPF macros to make it more readable.
Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
Acked-by: Willem de Bruijn <willemb@google.com>
---
v2: commit comment edited based on review
tools/testing/selftests/net/psock_lib.h | 28 +++++++++++++++++++++-------
1 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/tools/testing/selftests/net/psock_lib.h b/tools/testing/selftests/net/psock_lib.h
index 24bc7ec..e62540e 100644
--- a/tools/testing/selftests/net/psock_lib.h
+++ b/tools/testing/selftests/net/psock_lib.h
@@ -27,6 +27,7 @@
#include <string.h>
#include <arpa/inet.h>
#include <unistd.h>
+#include <netinet/udp.h>
#define DATA_LEN 100
#define DATA_CHAR 'a'
@@ -40,14 +41,27 @@
static __maybe_unused void sock_setfilter(int fd, int lvl, int optnum)
{
+ uint16_t ip_len = DATA_LEN +
+ sizeof(struct iphdr) + sizeof(struct udphdr);
+ /* the filter below checks for all of the following conditions that
+ * are based on the contents of create_payload()
+ * ether type 0x800 and
+ * ip proto udp and
+ * ip len == ip_len and
+ * udp[38] == 'a' or udp[38] == 'b'
+ */
struct sock_filter bpf_filter[] = {
- { 0x80, 0, 0, 0x00000000 }, /* LD pktlen */
- { 0x35, 0, 4, DATA_LEN }, /* JGE DATA_LEN [f goto nomatch]*/
- { 0x30, 0, 0, 0x00000050 }, /* LD ip[80] */
- { 0x15, 1, 0, DATA_CHAR }, /* JEQ DATA_CHAR [t goto match]*/
- { 0x15, 0, 1, DATA_CHAR_1}, /* JEQ DATA_CHAR_1 [t goto match]*/
- { 0x06, 0, 0, 0x00000060 }, /* RET match */
- { 0x06, 0, 0, 0x00000000 }, /* RET no match */
+ BPF_STMT(BPF_LD | BPF_H | BPF_ABS, 12), /* LD ethertype */
+ BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, ETH_P_IP, 0, 8),
+ BPF_STMT(BPF_LD|BPF_B|BPF_ABS, 23), /* LD ip_proto */
+ BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, IPPROTO_UDP, 0, 6),
+ BPF_STMT(BPF_LD|BPF_H|BPF_ABS, 16), /* LD ip_len */
+ BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, ip_len, 0, 4),
+ BPF_STMT(BPF_LD|BPF_B|BPF_ABS, 80), /* LD udp[38] */
+ BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, DATA_CHAR, 1, 0),
+ BPF_JUMP(BPF_JMP | BPF_JEQ | BPF_K, DATA_CHAR_1, 0, 1),
+ BPF_STMT(BPF_RET | BPF_K, ~0), /* match */
+ BPF_STMT(BPF_RET | BPF_K, 0) /* no match */
};
struct sock_fprog bpf_prog;
--
1.7.1
^ permalink raw reply related
* [PATCH v2 net-next 2/2] tools: psock_tpacket: block Rx until socket filter has been added and socket has been bound to loopback.
From: Sowmini Varadhan @ 2017-01-04 17:33 UTC (permalink / raw)
To: linux-kselftest, netdev, sowmini.varadhan; +Cc: daniel, willemb, davem, shuah
In-Reply-To: <cover.1483549208.git.sowmini.varadhan@oracle.com>
Packets from any/all interfaces may be queued up on the PF_PACKET socket
before it is bound to the loopback interface by psock_tpacket, and
when these are passed up by the kernel, they could interfere
with the Rx tests.
Avoid interference from spurious packet by blocking Rx until the
socket filter has been set up, and the packet has been bound to the
desired (lo) interface. The effective sequence is
socket(PF_PACKET, SOCK_RAW, 0)
set up ring
Invoke SO_ATTACH_FILTER
bind to sll_protocol set to ETH_P_ALL, sll_ifindex for lo
After this sequence, the only packets that will be passed up are
those received on loopback that pass the attached filter.
Signed-off-by: Sowmini Varadhan <sowmini.varadhan@oracle.com>
---
v2: patch reworked based on comments from Willem de Bruijn
tools/testing/selftests/net/psock_tpacket.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/testing/selftests/net/psock_tpacket.c b/tools/testing/selftests/net/psock_tpacket.c
index 4a1bc64..7f6cd9f 100644
--- a/tools/testing/selftests/net/psock_tpacket.c
+++ b/tools/testing/selftests/net/psock_tpacket.c
@@ -110,7 +110,7 @@ struct block_desc {
static int pfsocket(int ver)
{
- int ret, sock = socket(PF_PACKET, SOCK_RAW, htons(ETH_P_ALL));
+ int ret, sock = socket(PF_PACKET, SOCK_RAW, 0);
if (sock == -1) {
perror("socket");
exit(1);
@@ -239,7 +239,6 @@ static void walk_v1_v2_rx(int sock, struct ring *ring)
bug_on(ring->type != PACKET_RX_RING);
pair_udp_open(udp_sock, PORT_BASE);
- pair_udp_setfilter(sock);
memset(&pfd, 0, sizeof(pfd));
pfd.fd = sock;
@@ -601,7 +600,6 @@ static void walk_v3_rx(int sock, struct ring *ring)
bug_on(ring->type != PACKET_RX_RING);
pair_udp_open(udp_sock, PORT_BASE);
- pair_udp_setfilter(sock);
memset(&pfd, 0, sizeof(pfd));
pfd.fd = sock;
@@ -741,6 +739,8 @@ static void bind_ring(int sock, struct ring *ring)
{
int ret;
+ pair_udp_setfilter(sock);
+
ring->ll.sll_family = PF_PACKET;
ring->ll.sll_protocol = htons(ETH_P_ALL);
ring->ll.sll_ifindex = if_nametoindex("lo");
--
1.7.1
^ permalink raw reply related
* Re: [PATCH net] openvswitch: upcall: Fix vlan handling.
From: Jiri Benc @ 2017-01-04 17:39 UTC (permalink / raw)
To: Pravin B Shelar; +Cc: netdev, Jarno Rajahalme
In-Reply-To: <1482769887-8022-1-git-send-email-pshelar@ovn.org>
On Mon, 26 Dec 2016 08:31:27 -0800, Pravin B Shelar wrote:
> Networking stack accelerate vlan tag handling by
> keeping topmost vlan header in skb. This works as
> long as packet remains in OVS datapath. But during
> OVS upcall vlan header is pushed on to the packet.
> When such packet is sent back to OVS datapath, core
> networking stack might not handle it correctly. Following
> patch avoids this issue by accelerating the vlan tag
> during flow key extract. This simplifies datapath by
> bringing uniform packet processing for packets from
> all code paths.
Sorry for the late review, I was off at the end of December. Just
wanted to say that the patch looks great.
Thanks!
Jiri
^ permalink raw reply
* Re: [PATCH 1/1] net: usb: asix_devices: add .reset_resume for USB PM
From: David Miller @ 2017-01-04 18:03 UTC (permalink / raw)
To: peter.chen; +Cc: robert.foss, linux-usb, netdev
In-Reply-To: <1483435340-20371-1-git-send-email-peter.chen@nxp.com>
From: Peter Chen <peter.chen@nxp.com>
Date: Tue, 3 Jan 2017 17:22:20 +0800
> The USB core may call reset_resume when it fails to resume asix device.
> And USB core can recovery this abnormal resume at low level driver,
> the same .resume at asix driver can work too. Add .reset_resume can
> avoid disconnecting after backing from system resume, and NFS can
> still be mounted after this commit.
>
> Signed-off-by: Peter Chen <peter.chen@nxp.com>
Applied, thank you.
^ permalink raw reply
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