* [PATCH net-next 04/13] nfp: add nfp_net_pf_free_vnic() function
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Soon a third place will need to free a struct nfp_net. Add a free
counterpart to nfp_net_pf_alloc_vnic().
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 532371940fd6..5f0c58a56182 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -268,16 +268,20 @@ static u8 __iomem *nfp_net_pf_map_ctrl_bar(struct nfp_pf *pf)
return ctrl_bar;
}
+static void nfp_net_pf_free_vnic(struct nfp_pf *pf, struct nfp_net *nn)
+{
+ list_del(&nn->vnic_list);
+ pf->num_vnics--;
+ nfp_net_free(nn);
+}
+
static void nfp_net_pf_free_vnics(struct nfp_pf *pf)
{
struct nfp_net *nn;
while (!list_empty(&pf->vnics)) {
nn = list_first_entry(&pf->vnics, struct nfp_net, vnic_list);
- list_del(&nn->vnic_list);
- pf->num_vnics--;
-
- nfp_net_free(nn);
+ nfp_net_pf_free_vnic(pf, nn);
}
}
@@ -518,9 +522,7 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
nfp_net_clean(nn);
- list_del(&nn->vnic_list);
- pf->num_vnics--;
- nfp_net_free(nn);
+ nfp_net_pf_free_vnic(pf, nn);
}
if (list_empty(&pf->vnics))
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 05/13] nfp: introduce very minimal nfp_app
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Introduce a concept of an application. For now it's just grouping
pointers and serving as a layer of indirection. It will help us
weaken the dependency on nfp_net in ethtool code. Later series
will flesh out support for different apps in the driver.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/Makefile | 1 +
drivers/net/ethernet/netronome/nfp/nfp_app.c | 80 ++++++++++++++++++++++
drivers/net/ethernet/netronome/nfp/nfp_app.h | 48 +++++++++++++
drivers/net/ethernet/netronome/nfp/nfp_main.h | 3 +
drivers/net/ethernet/netronome/nfp/nfp_net.h | 4 +-
.../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 20 +++---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 26 ++++++-
7 files changed, 168 insertions(+), 14 deletions(-)
create mode 100644 drivers/net/ethernet/netronome/nfp/nfp_app.c
create mode 100644 drivers/net/ethernet/netronome/nfp/nfp_app.h
diff --git a/drivers/net/ethernet/netronome/nfp/Makefile b/drivers/net/ethernet/netronome/nfp/Makefile
index 4b15f0f496aa..a6b9c4dcbe12 100644
--- a/drivers/net/ethernet/netronome/nfp/Makefile
+++ b/drivers/net/ethernet/netronome/nfp/Makefile
@@ -14,6 +14,7 @@ nfp-objs := \
nfpcore/nfp_resource.o \
nfpcore/nfp_rtsym.o \
nfpcore/nfp_target.o \
+ nfp_app.o \
nfp_main.o \
nfp_net_common.o \
nfp_net_ethtool.o \
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_app.c b/drivers/net/ethernet/netronome/nfp/nfp_app.c
new file mode 100644
index 000000000000..c5dc8faffc61
--- /dev/null
+++ b/drivers/net/ethernet/netronome/nfp/nfp_app.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2017 Netronome Systems, Inc.
+ *
+ * This software is dual licensed under the GNU General License Version 2,
+ * June 1991 as shown in the file COPYING in the top-level directory of this
+ * source tree or the BSD 2-Clause License provided below. You have the
+ * option to license this software under the complete terms of either license.
+ *
+ * The BSD 2-Clause License:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include <linux/slab.h>
+
+#include "nfpcore/nfp_cpp.h"
+#include "nfp_app.h"
+#include "nfp_main.h"
+
+/**
+ * struct nfp_app - NFP application container
+ * @pdev: backpointer to PCI device
+ * @pf: backpointer to NFP PF structure
+ * @cpp: pointer to the CPP handle
+ */
+struct nfp_app {
+ struct pci_dev *pdev;
+ struct nfp_pf *pf;
+ struct nfp_cpp *cpp;
+};
+
+struct nfp_cpp *nfp_app_cpp(struct nfp_app *app)
+{
+ return app->cpp;
+}
+
+struct nfp_pf *nfp_app_pf(struct nfp_app *app)
+{
+ return app->pf;
+}
+
+struct nfp_app *nfp_app_alloc(struct nfp_pf *pf)
+{
+ struct nfp_app *app;
+
+ app = kzalloc(sizeof(*app), GFP_KERNEL);
+ if (!app)
+ return ERR_PTR(-ENOMEM);
+
+ app->pf = pf;
+ app->cpp = pf->cpp;
+ app->pdev = pf->pdev;
+
+ return app;
+}
+
+void nfp_app_free(struct nfp_app *app)
+{
+ kfree(app);
+}
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_app.h b/drivers/net/ethernet/netronome/nfp/nfp_app.h
new file mode 100644
index 000000000000..c0a5e97d19b8
--- /dev/null
+++ b/drivers/net/ethernet/netronome/nfp/nfp_app.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2017 Netronome Systems, Inc.
+ *
+ * This software is dual licensed under the GNU General License Version 2,
+ * June 1991 as shown in the file COPYING in the top-level directory of this
+ * source tree or the BSD 2-Clause License provided below. You have the
+ * option to license this software under the complete terms of either license.
+ *
+ * The BSD 2-Clause License:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef _NFP_APP_H
+#define _NFP_APP_H 1
+
+struct nfp_app;
+struct nfp_cpp;
+struct nfp_pf;
+
+struct nfp_cpp *nfp_app_cpp(struct nfp_app *app);
+
+struct nfp_pf *nfp_app_pf(struct nfp_app *app);
+
+struct nfp_app *nfp_app_alloc(struct nfp_pf *pf);
+void nfp_app_free(struct nfp_app *app);
+
+#endif
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_main.h b/drivers/net/ethernet/netronome/nfp/nfp_main.h
index bf31913ac7a5..b1ddea0e2406 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_main.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_main.h
@@ -57,6 +57,7 @@ struct nfp_eth_table;
* struct nfp_pf - NFP PF-specific device structure
* @pdev: Backpointer to PCI device
* @cpp: Pointer to the CPP handle
+ * @app: Pointer to the APP handle
* @data_vnic_bar: Pointer to the CPP area for the data vNICs' BARs
* @tx_area: Pointer to the CPP area for the TX queues
* @rx_area: Pointer to the CPP area for the FL/RX queues
@@ -78,6 +79,8 @@ struct nfp_pf {
struct nfp_cpp *cpp;
+ struct nfp_app *app;
+
struct nfp_cpp_area *data_vnic_bar;
struct nfp_cpp_area *tx_area;
struct nfp_cpp_area *rx_area;
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net.h b/drivers/net/ethernet/netronome/nfp/nfp_net.h
index 1d41be9b2309..d8edd61a5ad1 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net.h
@@ -557,7 +557,7 @@ struct nfp_net_dp {
* @ethtool_dump_flag: Ethtool dump flag
* @vnic_list: Entry on device vNIC list
* @pdev: Backpointer to PCI device
- * @cpp: CPP device handle if available
+ * @app: APP handle if available
* @eth_port: Translated ETH Table port entry
*/
struct nfp_net {
@@ -628,7 +628,7 @@ struct nfp_net {
struct list_head vnic_list;
struct pci_dev *pdev;
- struct nfp_cpp *cpp;
+ struct nfp_app *app;
struct nfp_eth_table_port *eth_port;
};
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
index 70bb0a0152b9..a15b15b30acf 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
@@ -50,6 +50,7 @@
#include "nfpcore/nfp.h"
#include "nfpcore/nfp_nsp.h"
+#include "nfp_app.h"
#include "nfp_net_ctrl.h"
#include "nfp_net.h"
@@ -134,14 +135,14 @@ static const struct _nfp_net_et_stats nfp_net_et_stats[] = {
#define NN_ET_STATS_LEN (NN_ET_GLOBAL_STATS_LEN + NN_ET_RVEC_GATHER_STATS + \
NN_ET_RVEC_STATS_LEN + NN_ET_QUEUE_STATS_LEN)
-static void nfp_net_get_nspinfo(struct nfp_net *nn, char *version)
+static void nfp_net_get_nspinfo(struct nfp_app *app, char *version)
{
struct nfp_nsp *nsp;
- if (!nn->cpp)
+ if (!app)
return;
- nsp = nfp_nsp_open(nn->cpp);
+ nsp = nfp_nsp_open(nfp_app_cpp(app));
if (IS_ERR(nsp))
return;
@@ -162,7 +163,7 @@ static void nfp_net_get_drvinfo(struct net_device *netdev,
sizeof(drvinfo->driver));
strlcpy(drvinfo->version, nfp_driver_version, sizeof(drvinfo->version));
- nfp_net_get_nspinfo(nn, nsp_version);
+ nfp_net_get_nspinfo(nn->app, nsp_version);
snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
"%d.%d.%d.%d %s",
nn->fw_ver.resv, nn->fw_ver.class,
@@ -258,7 +259,7 @@ nfp_net_set_link_ksettings(struct net_device *netdev,
return -EBUSY;
}
- nsp = nfp_eth_config_start(nn->cpp, nn->eth_port->index);
+ nsp = nfp_eth_config_start(nfp_app_cpp(nn->app), nn->eth_port->index);
if (IS_ERR(nsp))
return PTR_ERR(nsp);
@@ -706,13 +707,13 @@ nfp_dump_nsp_diag(struct nfp_net *nn, struct ethtool_dump *dump, void *buffer)
struct nfp_resource *res;
int ret;
- if (!nn->cpp)
+ if (!nn->app)
return -EOPNOTSUPP;
dump->version = 1;
dump->flag = NFP_DUMP_NSP_DIAG;
- res = nfp_resource_acquire(nn->cpp, NFP_RESOURCE_NSP_DIAG);
+ res = nfp_resource_acquire(nfp_app_cpp(nn->app), NFP_RESOURCE_NSP_DIAG);
if (IS_ERR(res))
return PTR_ERR(res);
@@ -722,7 +723,8 @@ nfp_dump_nsp_diag(struct nfp_net *nn, struct ethtool_dump *dump, void *buffer)
goto exit_release;
}
- ret = nfp_cpp_read(nn->cpp, nfp_resource_cpp_id(res),
+ ret = nfp_cpp_read(nfp_app_cpp(nn->app),
+ nfp_resource_cpp_id(res),
nfp_resource_address(res),
buffer, dump->len);
if (ret != dump->len)
@@ -743,7 +745,7 @@ static int nfp_net_set_dump(struct net_device *netdev, struct ethtool_dump *val)
{
struct nfp_net *nn = netdev_priv(netdev);
- if (!nn->cpp)
+ if (!nn->app)
return -EOPNOTSUPP;
if (val->flag != NFP_DUMP_NSP_DIAG)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 5f0c58a56182..17ff8a88fc24 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -54,7 +54,7 @@
#include "nfpcore/nfp_nffw.h"
#include "nfpcore/nfp_nsp.h"
#include "nfpcore/nfp6000_pcie.h"
-
+#include "nfp_app.h"
#include "nfp_net_ctrl.h"
#include "nfp_net.h"
#include "nfp_main.h"
@@ -302,7 +302,7 @@ nfp_net_pf_alloc_vnic(struct nfp_pf *pf, void __iomem *ctrl_bar,
if (IS_ERR(nn))
return nn;
- nn->cpp = pf->cpp;
+ nn->app = pf->app;
nn->fw_ver = *fw_ver;
nn->dp.ctrl_bar = ctrl_bar;
nn->tx_bar = tx_bar;
@@ -463,6 +463,18 @@ nfp_net_pf_spawn_vnics(struct nfp_pf *pf,
return err;
}
+static int nfp_net_pf_app_init(struct nfp_pf *pf)
+{
+ pf->app = nfp_app_alloc(pf);
+
+ return PTR_ERR_OR_ZERO(pf->app);
+}
+
+static void nfp_net_pf_app_clean(struct nfp_pf *pf)
+{
+ nfp_app_free(pf->app);
+}
+
static void nfp_net_pci_remove_finish(struct nfp_pf *pf)
{
nfp_net_debugfs_dir_clean(&pf->ddir);
@@ -470,6 +482,8 @@ static void nfp_net_pci_remove_finish(struct nfp_pf *pf)
nfp_net_irqs_disable(pf->pdev);
kfree(pf->irq_entries);
+ nfp_net_pf_app_clean(pf);
+
nfp_cpp_area_release_free(pf->rx_area);
nfp_cpp_area_release_free(pf->tx_area);
nfp_cpp_area_release_free(pf->data_vnic_bar);
@@ -543,7 +557,7 @@ int nfp_net_refresh_eth_port(struct nfp_net *nn)
struct nfp_eth_table_port *eth_port;
struct nfp_eth_table *eth_table;
- eth_table = nfp_eth_read_ports(nn->cpp);
+ eth_table = nfp_eth_read_ports(nfp_app_cpp(nn->app));
if (!eth_table) {
nn_err(nn, "Error refreshing port state table!\n");
return -EIO;
@@ -659,6 +673,10 @@ int nfp_net_pci_probe(struct nfp_pf *pf)
goto err_unmap_tx;
}
+ err = nfp_net_pf_app_init(pf);
+ if (err)
+ goto err_unmap_rx;
+
pf->ddir = nfp_net_debugfs_device_add(pf->pdev);
err = nfp_net_pf_spawn_vnics(pf, ctrl_bar, tx_bar, rx_bar,
@@ -672,6 +690,8 @@ int nfp_net_pci_probe(struct nfp_pf *pf)
err_clean_ddir:
nfp_net_debugfs_dir_clean(&pf->ddir);
+ nfp_net_pf_app_clean(pf);
+err_unmap_rx:
nfp_cpp_area_release_free(pf->rx_area);
err_unmap_tx:
nfp_cpp_area_release_free(pf->tx_area);
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 07/13] nfp: introduce nfp_port
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Encapsulate port information into struct nfp_port. nfp_port will
soon be extended to contain devlink_port information. It also makes
it easier to reuse port-related code between vNICs and representors.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/Makefile | 3 +-
drivers/net/ethernet/netronome/nfp/nfp_net.h | 7 +-
.../net/ethernet/netronome/nfp/nfp_net_common.c | 28 ++----
.../net/ethernet/netronome/nfp/nfp_net_ethtool.c | 39 +++++---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 68 +++++++++-----
drivers/net/ethernet/netronome/nfp/nfp_port.c | 104 +++++++++++++++++++++
drivers/net/ethernet/netronome/nfp/nfp_port.h | 87 +++++++++++++++++
7 files changed, 274 insertions(+), 62 deletions(-)
create mode 100644 drivers/net/ethernet/netronome/nfp/nfp_port.c
create mode 100644 drivers/net/ethernet/netronome/nfp/nfp_port.h
diff --git a/drivers/net/ethernet/netronome/nfp/Makefile b/drivers/net/ethernet/netronome/nfp/Makefile
index a6b9c4dcbe12..e8333283ada6 100644
--- a/drivers/net/ethernet/netronome/nfp/Makefile
+++ b/drivers/net/ethernet/netronome/nfp/Makefile
@@ -20,7 +20,8 @@ nfp-objs := \
nfp_net_ethtool.o \
nfp_net_offload.o \
nfp_net_main.o \
- nfp_netvf_main.o
+ nfp_netvf_main.o \
+ nfp_port.o
ifeq ($(CONFIG_BPF_SYSCALL),y)
nfp-objs += \
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net.h b/drivers/net/ethernet/netronome/nfp/nfp_net.h
index d8edd61a5ad1..6a774ac54237 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net.h
@@ -116,6 +116,7 @@ struct nfp_cpp;
struct nfp_eth_table_port;
struct nfp_net;
struct nfp_net_r_vector;
+struct nfp_port;
/* Convenience macro for wrapping descriptor index on ring size */
#define D_IDX(ring, idx) ((idx) & ((ring)->cnt - 1))
@@ -558,7 +559,7 @@ struct nfp_net_dp {
* @vnic_list: Entry on device vNIC list
* @pdev: Backpointer to PCI device
* @app: APP handle if available
- * @eth_port: Translated ETH Table port entry
+ * @port: Pointer to nfp_port structure if vNIC is a port
*/
struct nfp_net {
struct nfp_net_dp dp;
@@ -630,7 +631,7 @@ struct nfp_net {
struct pci_dev *pdev;
struct nfp_app *app;
- struct nfp_eth_table_port *eth_port;
+ struct nfp_port *port;
};
/* Functions to read/write from/to a BAR
@@ -835,8 +836,6 @@ int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
struct netlink_ext_ack *extack);
bool nfp_net_link_changed_read_clear(struct nfp_net *nn);
-int nfp_net_refresh_eth_port(struct nfp_net *nn);
-void nfp_net_refresh_port_table(struct nfp_net *nn);
#ifdef CONFIG_NFP_DEBUG
void nfp_net_debugfs_create(void);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
index b427c95c5acd..25ec0371e280 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
@@ -70,6 +70,7 @@
#include "nfpcore/nfp_nsp.h"
#include "nfp_net_ctrl.h"
#include "nfp_net.h"
+#include "nfp_port.h"
/**
* nfp_net_get_fw_version() - Read and parse the FW version
@@ -2846,26 +2847,6 @@ nfp_net_features_check(struct sk_buff *skb, struct net_device *dev,
return features;
}
-static int
-nfp_net_get_phys_port_name(struct net_device *netdev, char *name, size_t len)
-{
- struct nfp_net *nn = netdev_priv(netdev);
- int err;
-
- if (!nn->eth_port)
- return -EOPNOTSUPP;
-
- if (!nn->eth_port->is_split)
- err = snprintf(name, len, "p%d", nn->eth_port->label_port);
- else
- err = snprintf(name, len, "p%ds%d", nn->eth_port->label_port,
- nn->eth_port->label_subport);
- if (err >= len)
- return -EINVAL;
-
- return 0;
-}
-
/**
* nfp_net_set_vxlan_port() - set vxlan port in SW and reconfigure HW
* @nn: NFP Net device to reconfigure
@@ -3040,12 +3021,17 @@ static const struct net_device_ops nfp_net_netdev_ops = {
.ndo_set_mac_address = eth_mac_addr,
.ndo_set_features = nfp_net_set_features,
.ndo_features_check = nfp_net_features_check,
- .ndo_get_phys_port_name = nfp_net_get_phys_port_name,
+ .ndo_get_phys_port_name = nfp_port_get_phys_port_name,
.ndo_udp_tunnel_add = nfp_net_add_vxlan_port,
.ndo_udp_tunnel_del = nfp_net_del_vxlan_port,
.ndo_xdp = nfp_net_xdp,
};
+bool nfp_netdev_is_nfp_net(struct net_device *netdev)
+{
+ return netdev->netdev_ops == &nfp_net_netdev_ops;
+}
+
/**
* nfp_net_info() - Print general info about the NIC
* @nn: NFP Net device to reconfigure
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
index a15b15b30acf..e9c860a6dbb8 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
@@ -53,6 +53,7 @@
#include "nfp_app.h"
#include "nfp_net_ctrl.h"
#include "nfp_net.h"
+#include "nfp_port.h"
enum nfp_dump_diag {
NFP_DUMP_NSP_DIAG = 0,
@@ -196,33 +197,42 @@ nfp_net_get_link_ksettings(struct net_device *netdev,
[NFP_NET_CFG_STS_LINK_RATE_50G] = SPEED_50000,
[NFP_NET_CFG_STS_LINK_RATE_100G] = SPEED_100000,
};
- struct nfp_net *nn = netdev_priv(netdev);
+ struct nfp_eth_table_port *eth_port;
+ struct nfp_port *port;
+ struct nfp_net *nn;
u32 sts, ls;
+ /* Init to unknowns */
ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
cmd->base.port = PORT_OTHER;
cmd->base.speed = SPEED_UNKNOWN;
cmd->base.duplex = DUPLEX_UNKNOWN;
- if (nn->eth_port)
- cmd->base.autoneg = nn->eth_port->aneg != NFP_ANEG_DISABLED ?
+ port = nfp_port_from_netdev(netdev);
+ eth_port = __nfp_port_get_eth_port(port);
+ if (eth_port)
+ cmd->base.autoneg = eth_port->aneg != NFP_ANEG_DISABLED ?
AUTONEG_ENABLE : AUTONEG_DISABLE;
if (!netif_carrier_ok(netdev))
return 0;
+ if (!nfp_netdev_is_nfp_net(netdev))
+ return -EOPNOTSUPP;
+ nn = netdev_priv(netdev);
+
/* Use link speed from ETH table if available, otherwise try the BAR */
- if (nn->eth_port) {
+ if (eth_port) {
int err;
if (nfp_net_link_changed_read_clear(nn)) {
- err = nfp_net_refresh_eth_port(nn);
+ err = nfp_net_refresh_eth_port(port);
if (err)
return err;
}
- cmd->base.port = nn->eth_port->port_type;
- cmd->base.speed = nn->eth_port->speed;
+ cmd->base.port = eth_port->port_type;
+ cmd->base.speed = eth_port->speed;
cmd->base.duplex = DUPLEX_FULL;
return 0;
}
@@ -247,19 +257,22 @@ static int
nfp_net_set_link_ksettings(struct net_device *netdev,
const struct ethtool_link_ksettings *cmd)
{
- struct nfp_net *nn = netdev_priv(netdev);
+ struct nfp_eth_table_port *eth_port;
+ struct nfp_port *port;
struct nfp_nsp *nsp;
int err;
- if (!nn->eth_port)
+ port = nfp_port_from_netdev(netdev);
+ eth_port = __nfp_port_get_eth_port(port);
+ if (!eth_port)
return -EOPNOTSUPP;
if (netif_running(netdev)) {
- nn_warn(nn, "Changing settings not allowed on an active interface. It may cause the port to be disabled until reboot.\n");
+ netdev_warn(netdev, "Changing settings not allowed on an active interface. It may cause the port to be disabled until reboot.\n");
return -EBUSY;
}
- nsp = nfp_eth_config_start(nfp_app_cpp(nn->app), nn->eth_port->index);
+ nsp = nfp_eth_config_start(nfp_app_cpp(port->app), eth_port->index);
if (IS_ERR(nsp))
return PTR_ERR(nsp);
@@ -268,7 +281,7 @@ nfp_net_set_link_ksettings(struct net_device *netdev,
if (err)
goto err_bad_set;
if (cmd->base.speed != SPEED_UNKNOWN) {
- u32 speed = cmd->base.speed / nn->eth_port->lanes;
+ u32 speed = cmd->base.speed / eth_port->lanes;
err = __nfp_eth_set_speed(nsp, speed);
if (err)
@@ -279,7 +292,7 @@ nfp_net_set_link_ksettings(struct net_device *netdev,
if (err > 0)
return 0; /* no change */
- nfp_net_refresh_port_table(nn);
+ nfp_net_refresh_port_table(port);
return err;
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index d54506b3f783..167ccf788ba2 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -58,6 +58,7 @@
#include "nfp_net_ctrl.h"
#include "nfp_net.h"
#include "nfp_main.h"
+#include "nfp_port.h"
#define NFP_PF_CSR_SLICE_SIZE (32 * 1024)
@@ -142,14 +143,16 @@ static u8 __iomem *nfp_net_map_area(struct nfp_cpp *cpp,
static void
nfp_net_get_mac_addr(struct nfp_net *nn, struct nfp_cpp *cpp, unsigned int id)
{
+ struct nfp_eth_table_port *eth_port;
struct nfp_net_dp *dp = &nn->dp;
u8 mac_addr[ETH_ALEN];
const char *mac_str;
char name[32];
- if (nn->eth_port) {
- ether_addr_copy(dp->netdev->dev_addr, nn->eth_port->mac_addr);
- ether_addr_copy(dp->netdev->perm_addr, nn->eth_port->mac_addr);
+ eth_port = __nfp_port_get_eth_port(nn->port);
+ if (eth_port) {
+ ether_addr_copy(dp->netdev->dev_addr, eth_port->mac_addr);
+ ether_addr_copy(dp->netdev->perm_addr, eth_port->mac_addr);
return;
}
@@ -270,6 +273,7 @@ static u8 __iomem *nfp_net_pf_map_ctrl_bar(struct nfp_pf *pf)
static void nfp_net_pf_free_vnic(struct nfp_pf *pf, struct nfp_net *nn)
{
+ nfp_port_free(nn->port);
list_del(&nn->vnic_list);
pf->num_vnics--;
nfp_net_free(nn);
@@ -291,6 +295,7 @@ nfp_net_pf_alloc_vnic(struct nfp_pf *pf, void __iomem *ctrl_bar,
int stride, struct nfp_net_fw_version *fw_ver,
unsigned int eth_id)
{
+ struct nfp_eth_table_port *eth_port;
u32 n_tx_rings, n_rx_rings;
struct nfp_net *nn;
@@ -310,7 +315,18 @@ nfp_net_pf_alloc_vnic(struct nfp_pf *pf, void __iomem *ctrl_bar,
nn->dp.is_vf = 0;
nn->stride_rx = stride;
nn->stride_tx = stride;
- nn->eth_port = nfp_net_find_port(pf->eth_tbl, eth_id);
+
+ eth_port = nfp_net_find_port(pf->eth_tbl, eth_id);
+ if (eth_port) {
+ nn->port = nfp_port_alloc(pf->app, NFP_PORT_PHYS_PORT,
+ nn->dp.netdev);
+ if (IS_ERR(nn->port)) {
+ nfp_net_free(nn);
+ return ERR_CAST(nn->port);
+ }
+ nn->port->eth_id = eth_id;
+ nn->port->eth_port = eth_port;
+ }
pf->num_vnics++;
list_add_tail(&nn->vnic_list, &pf->vnics);
@@ -380,12 +396,12 @@ nfp_net_pf_alloc_vnics(struct nfp_pf *pf, void __iomem *ctrl_bar,
ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
/* Check if vNIC has external port associated and cfg is OK */
- if (pf->eth_tbl && !nn->eth_port) {
+ if (pf->eth_tbl && !nn->port) {
nfp_err(pf->cpp, "NSP port entries don't match vNICs (no entry for port #%d)\n", i);
err = -EINVAL;
goto err_free_prev;
}
- if (nn->eth_port && nn->eth_port->override_changed) {
+ if (nn->port && nn->port->eth_port->override_changed) {
nfp_warn(pf->cpp, "Config changed for port #%d, reboot required before port will be operational\n", i);
nfp_net_pf_free_vnic(pf, nn);
continue;
@@ -526,13 +542,20 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
rtnl_lock();
list_for_each_entry(nn, &pf->vnics, vnic_list) {
- if (!nn->eth_port)
+ if (!__nfp_port_get_eth_port(nn->port))
continue;
- nn->eth_port = nfp_net_find_port(eth_table,
- nn->eth_port->eth_index);
- if (!nn->eth_port)
- nfp_err(pf->cpp,
- "Warning: port disappeared after reconfig\n");
+ nn->port->eth_port = nfp_net_find_port(eth_table,
+ nn->port->eth_id);
+ if (!nn->port->eth_port) {
+ nfp_warn(pf->cpp, "Warning: port #%d not present after reconfig\n",
+ nn->port->eth_id);
+ continue;
+ }
+ if (nn->port->eth_port->override_changed) {
+ nfp_warn(pf->cpp, "Port config changed, unregistering. Reboot required before port will be operational again.\n");
+ nn->port->type = NFP_PORT_INVALID;
+ continue;
+ }
}
rtnl_unlock();
@@ -540,11 +563,9 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
pf->eth_tbl = eth_table;
list_for_each_entry_safe(nn, next, &pf->vnics, vnic_list) {
- if (nn->eth_port && !nn->eth_port->override_changed)
+ if (!nn->port || nn->port->type != NFP_PORT_INVALID)
continue;
- nn_warn(nn, "Port config changed, unregistering. Reboot required before port will be operational again.\n");
-
nfp_net_debugfs_dir_clean(&nn->debugfs_dir);
nfp_net_clean(nn);
@@ -557,32 +578,33 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
mutex_unlock(&pf->lock);
}
-void nfp_net_refresh_port_table(struct nfp_net *nn)
+void nfp_net_refresh_port_table(struct nfp_port *port)
{
- struct nfp_pf *pf = pci_get_drvdata(nn->pdev);
+ struct nfp_pf *pf = nfp_app_pf(port->app);
schedule_work(&pf->port_refresh_work);
}
-int nfp_net_refresh_eth_port(struct nfp_net *nn)
+int nfp_net_refresh_eth_port(struct nfp_port *port)
{
+ struct nfp_cpp *cpp = nfp_app_cpp(port->app);
struct nfp_eth_table_port *eth_port;
struct nfp_eth_table *eth_table;
- eth_table = nfp_eth_read_ports(nfp_app_cpp(nn->app));
+ eth_table = nfp_eth_read_ports(cpp);
if (!eth_table) {
- nn_err(nn, "Error refreshing port state table!\n");
+ nfp_err(cpp, "Error refreshing port state table!\n");
return -EIO;
}
- eth_port = nfp_net_find_port(eth_table, nn->eth_port->eth_index);
+ eth_port = nfp_net_find_port(eth_table, port->eth_id);
if (!eth_port) {
- nn_err(nn, "Error finding state of the port!\n");
+ nfp_err(cpp, "Error finding state of the port!\n");
kfree(eth_table);
return -EIO;
}
- memcpy(nn->eth_port, eth_port, sizeof(*eth_port));
+ memcpy(port->eth_port, eth_port, sizeof(*eth_port));
kfree(eth_table);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.c b/drivers/net/ethernet/netronome/nfp/nfp_port.c
new file mode 100644
index 000000000000..8d0599fc6321
--- /dev/null
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.c
@@ -0,0 +1,104 @@
+/*
+ * Copyright (C) 2017 Netronome Systems, Inc.
+ *
+ * This software is dual licensed under the GNU General License Version 2,
+ * June 1991 as shown in the file COPYING in the top-level directory of this
+ * source tree or the BSD 2-Clause License provided below. You have the
+ * option to license this software under the complete terms of either license.
+ *
+ * The BSD 2-Clause License:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#include "nfpcore/nfp_nsp.h"
+#include "nfp_app.h"
+#include "nfp_main.h"
+#include "nfp_net.h"
+#include "nfp_port.h"
+
+struct nfp_port *nfp_port_from_netdev(struct net_device *netdev)
+{
+ struct nfp_net *nn;
+
+ if (WARN_ON(!nfp_netdev_is_nfp_net(netdev)))
+ return NULL;
+ nn = netdev_priv(netdev);
+
+ return nn->port;
+}
+
+struct nfp_eth_table_port *__nfp_port_get_eth_port(struct nfp_port *port)
+{
+ if (!port)
+ return NULL;
+ if (port->type != NFP_PORT_PHYS_PORT)
+ return NULL;
+
+ return port->eth_port;
+}
+
+int
+nfp_port_get_phys_port_name(struct net_device *netdev, char *name, size_t len)
+{
+ struct nfp_eth_table_port *eth_port;
+ struct nfp_port *port;
+ int err;
+
+ port = nfp_port_from_netdev(netdev);
+ eth_port = __nfp_port_get_eth_port(port);
+ if (!eth_port)
+ return -EOPNOTSUPP;
+
+ if (!eth_port->is_split)
+ err = snprintf(name, len, "p%d", eth_port->label_port);
+ else
+ err = snprintf(name, len, "p%ds%d", eth_port->label_port,
+ eth_port->label_subport);
+ if (err >= len)
+ return -EINVAL;
+
+ return 0;
+}
+
+struct nfp_port *
+nfp_port_alloc(struct nfp_app *app, enum nfp_port_type type,
+ struct net_device *netdev)
+{
+ struct nfp_port *port;
+
+ port = kzalloc(sizeof(*port), GFP_KERNEL);
+ if (!port)
+ return ERR_PTR(-ENOMEM);
+
+ port->netdev = netdev;
+ port->type = type;
+ port->app = app;
+
+ return port;
+}
+
+void nfp_port_free(struct nfp_port *port)
+{
+ kfree(port);
+}
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.h b/drivers/net/ethernet/netronome/nfp/nfp_port.h
new file mode 100644
index 000000000000..a23a2c02bc14
--- /dev/null
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.h
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2017 Netronome Systems, Inc.
+ *
+ * This software is dual licensed under the GNU General License Version 2,
+ * June 1991 as shown in the file COPYING in the top-level directory of this
+ * source tree or the BSD 2-Clause License provided below. You have the
+ * option to license this software under the complete terms of either license.
+ *
+ * The BSD 2-Clause License:
+ *
+ * Redistribution and use in source and binary forms, with or
+ * without modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials
+ * provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef _NFP_PORT_H_
+#define _NFP_PORT_H_
+
+struct net_device;
+struct nfp_app;
+struct nfp_port;
+
+/**
+ * enum nfp_port_type - type of port NFP can switch traffic to
+ * @NFP_PORT_INVALID: port is invalid, %NFP_PORT_PHYS_PORT transitions to this
+ * state when port disappears because of FW fault or config
+ * change
+ * @NFP_PORT_PHYS_PORT: external NIC port
+ */
+enum nfp_port_type {
+ NFP_PORT_INVALID,
+ NFP_PORT_PHYS_PORT,
+};
+
+/**
+ * struct nfp_port - structure representing NFP port
+ * @netdev: backpointer to associated netdev
+ * @type: what port type does the entity represent
+ * @app: backpointer to the app structure
+ * @eth_id: for %NFP_PORT_PHYS_PORT port ID in NFP enumeration scheme
+ * @eth_port: for %NFP_PORT_PHYS_PORT translated ETH Table port entry
+ */
+struct nfp_port {
+ struct net_device *netdev;
+ enum nfp_port_type type;
+
+ struct nfp_app *app;
+
+ unsigned int eth_id;
+ struct nfp_eth_table_port *eth_port;
+};
+
+bool nfp_netdev_is_nfp_net(struct net_device *netdev);
+
+struct nfp_port *nfp_port_from_netdev(struct net_device *netdev);
+struct nfp_eth_table_port *__nfp_port_get_eth_port(struct nfp_port *port);
+
+int
+nfp_port_get_phys_port_name(struct net_device *netdev, char *name, size_t len);
+
+struct nfp_port *
+nfp_port_alloc(struct nfp_app *app, enum nfp_port_type type,
+ struct net_device *netdev);
+void nfp_port_free(struct nfp_port *port);
+
+int nfp_net_refresh_eth_port(struct nfp_port *port);
+void nfp_net_refresh_port_table(struct nfp_port *port);
+
+#endif
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 10/13] nfp: provide linking on port structures
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Add link to nfp_ports to make it possible to iterate over all ports.
This will come in handy when some ports may be representors.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_main.c | 1 +
drivers/net/ethernet/netronome/nfp/nfp_main.h | 2 ++
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 15 ++++++---------
drivers/net/ethernet/netronome/nfp/nfp_port.c | 7 +++++++
drivers/net/ethernet/netronome/nfp/nfp_port.h | 3 +++
5 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_main.c b/drivers/net/ethernet/netronome/nfp/nfp_main.c
index 9fbc7eedc017..bb586ce1ea06 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_main.c
@@ -341,6 +341,7 @@ static int nfp_pci_probe(struct pci_dev *pdev,
goto err_rel_regions;
}
INIT_LIST_HEAD(&pf->vnics);
+ INIT_LIST_HEAD(&pf->ports);
pci_set_drvdata(pdev, pf);
pf->pdev = pdev;
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_main.h b/drivers/net/ethernet/netronome/nfp/nfp_main.h
index b1ddea0e2406..9f1127895dd6 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_main.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_main.h
@@ -72,6 +72,7 @@ struct nfp_eth_table;
* @max_data_vnics: Number of data vNICs app firmware supports
* @num_vnics: Number of vNICs spawned
* @vnics: Linked list of vNIC structures (struct nfp_net)
+ * @ports: Linked list of port structures (struct nfp_port)
* @port_refresh_work: Work entry for taking netdevs out
*/
struct nfp_pf {
@@ -100,6 +101,7 @@ struct nfp_pf {
unsigned int num_vnics;
struct list_head vnics;
+ struct list_head ports;
struct work_struct port_refresh_work;
struct mutex lock;
};
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 0114071dc0fd..9c4ba929cb0a 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -548,6 +548,7 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
port_refresh_work);
struct nfp_eth_table *eth_table;
struct nfp_net *nn, *next;
+ struct nfp_port *port;
mutex_lock(&pf->lock);
@@ -557,9 +558,8 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
/* Update state of all ports */
rtnl_lock();
- list_for_each_entry(nn, &pf->vnics, vnic_list)
- if (nn->port)
- clear_bit(NFP_PORT_CHANGED, &nn->port->flags);
+ list_for_each_entry(port, &pf->ports, port_list)
+ clear_bit(NFP_PORT_CHANGED, &port->flags);
eth_table = nfp_eth_read_ports(pf->cpp);
if (!eth_table) {
@@ -568,12 +568,9 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
goto out;
}
- list_for_each_entry(nn, &pf->vnics, vnic_list) {
- if (!__nfp_port_get_eth_port(nn->port))
- continue;
-
- nfp_net_eth_port_update(pf->cpp, nn->port, eth_table);
- }
+ list_for_each_entry(port, &pf->ports, port_list)
+ if (__nfp_port_get_eth_port(port))
+ nfp_net_eth_port_update(pf->cpp, port, eth_table);
rtnl_unlock();
kfree(eth_table);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.c b/drivers/net/ethernet/netronome/nfp/nfp_port.c
index 8d0599fc6321..f73a5452f02b 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_port.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.c
@@ -86,6 +86,7 @@ nfp_port_alloc(struct nfp_app *app, enum nfp_port_type type,
struct net_device *netdev)
{
struct nfp_port *port;
+ struct nfp_pf *pf;
port = kzalloc(sizeof(*port), GFP_KERNEL);
if (!port)
@@ -95,10 +96,16 @@ nfp_port_alloc(struct nfp_app *app, enum nfp_port_type type,
port->type = type;
port->app = app;
+ pf = nfp_app_pf(app);
+ list_add_tail(&port->port_list, &pf->ports);
+
return port;
}
void nfp_port_free(struct nfp_port *port)
{
+ if (!port)
+ return;
+ list_del(&port->port_list);
kfree(port);
}
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.h b/drivers/net/ethernet/netronome/nfp/nfp_port.h
index d674c8623a65..02d664f58482 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_port.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.h
@@ -68,6 +68,7 @@ enum nfp_port_flags {
* @app: backpointer to the app structure
* @eth_id: for %NFP_PORT_PHYS_PORT port ID in NFP enumeration scheme
* @eth_port: for %NFP_PORT_PHYS_PORT translated ETH Table port entry
+ * @port_list: entry on pf's list of ports
*/
struct nfp_port {
struct net_device *netdev;
@@ -79,6 +80,8 @@ struct nfp_port {
unsigned int eth_id;
struct nfp_eth_table_port *eth_port;
+
+ struct list_head port_list;
};
bool nfp_netdev_is_nfp_net(struct net_device *netdev);
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 11/13] nfp: mark port state as stale after reconfig
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
After port configuration is performed mark it as changed. This
will close a window of time between configuration and async
state refresh which runs from a workqueue where old port state
would be reported.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 9c4ba929cb0a..3ee9a9772110 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -596,6 +596,8 @@ void nfp_net_refresh_port_table(struct nfp_port *port)
{
struct nfp_pf *pf = nfp_app_pf(port->app);
+ set_bit(NFP_PORT_CHANGED, &port->flags);
+
schedule_work(&pf->port_refresh_work);
}
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 06/13] nfp: disallow mixing vNICs with and without NSP port entry
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
We only support core NIC apps which have vNICs for each physical port/
split and no representors right now. Enforce that either each vNIC has
a NSP eth_table entry or if NSP port table is not available none do.
One scenario this will prevent from happening is user force-loading
wrong firmware file if FW app requires different firmwares per media
config.
While at it move some code to nfp_net_pf_alloc_vnic() to make it
counter-match nfp_net_pf_free_vnic() better.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 52 ++++++++++++++---------
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 17ff8a88fc24..d54506b3f783 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -289,7 +289,7 @@ static struct nfp_net *
nfp_net_pf_alloc_vnic(struct nfp_pf *pf, void __iomem *ctrl_bar,
void __iomem *tx_bar, void __iomem *rx_bar,
int stride, struct nfp_net_fw_version *fw_ver,
- struct nfp_eth_table_port *eth_port)
+ unsigned int eth_id)
{
u32 n_tx_rings, n_rx_rings;
struct nfp_net *nn;
@@ -310,7 +310,10 @@ nfp_net_pf_alloc_vnic(struct nfp_pf *pf, void __iomem *ctrl_bar,
nn->dp.is_vf = 0;
nn->stride_rx = stride;
nn->stride_tx = stride;
- nn->eth_port = eth_port;
+ nn->eth_port = nfp_net_find_port(pf->eth_tbl, eth_id);
+
+ pf->num_vnics++;
+ list_add_tail(&nn->vnic_list, &pf->vnics);
return nn;
}
@@ -346,11 +349,16 @@ nfp_net_pf_alloc_vnics(struct nfp_pf *pf, void __iomem *ctrl_bar,
int stride, struct nfp_net_fw_version *fw_ver)
{
u32 prev_tx_base, prev_rx_base, tgt_tx_base, tgt_rx_base;
- struct nfp_eth_table_port *eth_port;
struct nfp_net *nn;
unsigned int i;
int err;
+ if (pf->eth_tbl && pf->max_data_vnics != pf->eth_tbl->count) {
+ nfp_err(pf->cpp, "ETH entries don't match vNICs (%d vs %d)\n",
+ pf->max_data_vnics, pf->eth_tbl->count);
+ return -EINVAL;
+ }
+
prev_tx_base = readl(ctrl_bar + NFP_NET_CFG_START_TXQ);
prev_rx_base = readl(ctrl_bar + NFP_NET_CFG_START_RXQ);
@@ -362,21 +370,26 @@ nfp_net_pf_alloc_vnics(struct nfp_pf *pf, void __iomem *ctrl_bar,
prev_tx_base = tgt_tx_base;
prev_rx_base = tgt_rx_base;
- eth_port = nfp_net_find_port(pf->eth_tbl, i);
- if (eth_port && eth_port->override_changed) {
- nfp_warn(pf->cpp, "Config changed for port #%d, reboot required before port will be operational\n", i);
- } else {
- nn = nfp_net_pf_alloc_vnic(pf, ctrl_bar, tx_bar, rx_bar,
- stride, fw_ver, eth_port);
- if (IS_ERR(nn)) {
- err = PTR_ERR(nn);
- goto err_free_prev;
- }
- list_add_tail(&nn->vnic_list, &pf->vnics);
- pf->num_vnics++;
+ nn = nfp_net_pf_alloc_vnic(pf, ctrl_bar, tx_bar, rx_bar,
+ stride, fw_ver, i);
+ if (IS_ERR(nn)) {
+ err = PTR_ERR(nn);
+ goto err_free_prev;
}
ctrl_bar += NFP_PF_CSR_SLICE_SIZE;
+
+ /* Check if vNIC has external port associated and cfg is OK */
+ if (pf->eth_tbl && !nn->eth_port) {
+ nfp_err(pf->cpp, "NSP port entries don't match vNICs (no entry for port #%d)\n", i);
+ err = -EINVAL;
+ goto err_free_prev;
+ }
+ if (nn->eth_port && nn->eth_port->override_changed) {
+ nfp_warn(pf->cpp, "Config changed for port #%d, reboot required before port will be operational\n", i);
+ nfp_net_pf_free_vnic(pf, nn);
+ continue;
+ }
}
if (list_empty(&pf->vnics))
@@ -517,6 +530,9 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
continue;
nn->eth_port = nfp_net_find_port(eth_table,
nn->eth_port->eth_index);
+ if (!nn->eth_port)
+ nfp_err(pf->cpp,
+ "Warning: port disappeared after reconfig\n");
}
rtnl_unlock();
@@ -524,11 +540,7 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
pf->eth_tbl = eth_table;
list_for_each_entry_safe(nn, next, &pf->vnics, vnic_list) {
- if (!nn->eth_port) {
- nfp_warn(pf->cpp, "Warning: port not present after reconfig\n");
- continue;
- }
- if (!nn->eth_port->override_changed)
+ if (nn->eth_port && !nn->eth_port->override_changed)
continue;
nn_warn(nn, "Port config changed, unregistering. Reboot required before port will be operational again.\n");
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 12/13] nfp: mark port state as stale if update failed
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
If reading new state of the port failed, mark the port back as CHANGED.
This way next user state request will trigger refresh, which will
hopefully succeed.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 3ee9a9772110..74fdef44e139 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -528,6 +528,7 @@ nfp_net_eth_port_update(struct nfp_cpp *cpp, struct nfp_port *port,
eth_port = nfp_net_find_port(eth_table, port->eth_id);
if (!eth_port) {
+ set_bit(NFP_PORT_CHANGED, &port->flags);
nfp_warn(cpp, "Warning: port #%d not present after reconfig\n",
port->eth_id);
return -EIO;
@@ -563,6 +564,9 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
eth_table = nfp_eth_read_ports(pf->cpp);
if (!eth_table) {
+ list_for_each_entry(port, &pf->ports, port_list)
+ if (__nfp_port_get_eth_port(port))
+ set_bit(NFP_PORT_CHANGED, &port->flags);
rtnl_unlock();
nfp_err(pf->cpp, "Error refreshing port config!\n");
goto out;
@@ -611,6 +615,7 @@ int nfp_net_refresh_eth_port(struct nfp_port *port)
eth_table = nfp_eth_read_ports(cpp);
if (!eth_table) {
+ set_bit(NFP_PORT_CHANGED, &port->flags);
nfp_err(cpp, "Error refreshing port state table!\n");
return -EIO;
}
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 13/13] nfp: refresh port state before reporting autonegotiation
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
State of autonegotiation may have changed but is not yet refreshed.
Make sure ethtool respects the NFP_PORT_CHANGED flag when looking
at autoneg.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c | 10 +---------
drivers/net/ethernet/netronome/nfp/nfp_port.c | 12 ++++++++++++
drivers/net/ethernet/netronome/nfp/nfp_port.h | 1 +
3 files changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
index 050629df5cff..46fafee87371 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
@@ -209,7 +209,7 @@ nfp_net_get_link_ksettings(struct net_device *netdev,
cmd->base.duplex = DUPLEX_UNKNOWN;
port = nfp_port_from_netdev(netdev);
- eth_port = __nfp_port_get_eth_port(port);
+ eth_port = nfp_port_get_eth_port(port);
if (eth_port)
cmd->base.autoneg = eth_port->aneg != NFP_ANEG_DISABLED ?
AUTONEG_ENABLE : AUTONEG_DISABLE;
@@ -219,14 +219,6 @@ nfp_net_get_link_ksettings(struct net_device *netdev,
/* Use link speed from ETH table if available, otherwise try the BAR */
if (eth_port) {
- int err;
-
- if (test_bit(NFP_PORT_CHANGED, &port->flags)) {
- err = nfp_net_refresh_eth_port(port);
- if (err)
- return err;
- }
-
cmd->base.port = eth_port->port_type;
cmd->base.speed = eth_port->speed;
cmd->base.duplex = DUPLEX_FULL;
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.c b/drivers/net/ethernet/netronome/nfp/nfp_port.c
index f73a5452f02b..2c9e0e36d743 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_port.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.c
@@ -58,6 +58,18 @@ struct nfp_eth_table_port *__nfp_port_get_eth_port(struct nfp_port *port)
return port->eth_port;
}
+struct nfp_eth_table_port *nfp_port_get_eth_port(struct nfp_port *port)
+{
+ if (!__nfp_port_get_eth_port(port))
+ return NULL;
+
+ if (test_bit(NFP_PORT_CHANGED, &port->flags))
+ if (nfp_net_refresh_eth_port(port))
+ return NULL;
+
+ return __nfp_port_get_eth_port(port);
+}
+
int
nfp_port_get_phys_port_name(struct net_device *netdev, char *name, size_t len)
{
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.h b/drivers/net/ethernet/netronome/nfp/nfp_port.h
index 02d664f58482..34276e1d673d 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_port.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.h
@@ -88,6 +88,7 @@ bool nfp_netdev_is_nfp_net(struct net_device *netdev);
struct nfp_port *nfp_port_from_netdev(struct net_device *netdev);
struct nfp_eth_table_port *__nfp_port_get_eth_port(struct nfp_port *port);
+struct nfp_eth_table_port *nfp_port_get_eth_port(struct nfp_port *port);
int
nfp_port_get_phys_port_name(struct net_device *netdev, char *name, size_t len);
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 09/13] nfp: move refresh tracking into the port structure
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Track whether physical port's state have changed since last refresh
inside the nfp_port structure instead of the vNIC structure.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net.h | 4 ----
drivers/net/ethernet/netronome/nfp/nfp_net_common.c | 16 ++--------------
drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c | 10 +++++-----
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 10 ++++++++--
drivers/net/ethernet/netronome/nfp/nfp_port.h | 13 +++++++++++++
5 files changed, 28 insertions(+), 25 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net.h b/drivers/net/ethernet/netronome/nfp/nfp_net.h
index 6a774ac54237..4d45ba2d355f 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net.h
@@ -543,7 +543,6 @@ struct nfp_net_dp {
* @reconfig_sync_present: Some thread is performing synchronous reconfig
* @reconfig_timer: Timer for async reading of reconfig results
* @link_up: Is the link up?
- * @link_changed: Has link state changes since last port refresh?
* @link_status_lock: Protects @link_* and ensures atomicity with BAR reading
* @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
* @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
@@ -601,7 +600,6 @@ struct nfp_net {
u32 me_freq_mhz;
bool link_up;
- bool link_changed;
spinlock_t link_status_lock;
spinlock_t reconfig_lock;
@@ -835,8 +833,6 @@ struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
struct netlink_ext_ack *extack);
-bool nfp_net_link_changed_read_clear(struct nfp_net *nn);
-
#ifdef CONFIG_NFP_DEBUG
void nfp_net_debugfs_create(void);
void nfp_net_debugfs_destroy(void);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
index 25ec0371e280..f9d8f4311f15 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_common.c
@@ -392,19 +392,6 @@ static irqreturn_t nfp_net_irq_rxtx(int irq, void *data)
return IRQ_HANDLED;
}
-bool nfp_net_link_changed_read_clear(struct nfp_net *nn)
-{
- unsigned long flags;
- bool ret;
-
- spin_lock_irqsave(&nn->link_status_lock, flags);
- ret = nn->link_changed;
- nn->link_changed = false;
- spin_unlock_irqrestore(&nn->link_status_lock, flags);
-
- return ret;
-}
-
/**
* nfp_net_read_link_status() - Reread link status from control BAR
* @nn: NFP Network structure
@@ -424,7 +411,8 @@ static void nfp_net_read_link_status(struct nfp_net *nn)
goto out;
nn->link_up = link_up;
- nn->link_changed = true;
+ if (nn->port)
+ set_bit(NFP_PORT_CHANGED, &nn->port->flags);
if (nn->link_up) {
netif_carrier_on(nn->dp.netdev);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
index e9c860a6dbb8..050629df5cff 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c
@@ -217,15 +217,11 @@ nfp_net_get_link_ksettings(struct net_device *netdev,
if (!netif_carrier_ok(netdev))
return 0;
- if (!nfp_netdev_is_nfp_net(netdev))
- return -EOPNOTSUPP;
- nn = netdev_priv(netdev);
-
/* Use link speed from ETH table if available, otherwise try the BAR */
if (eth_port) {
int err;
- if (nfp_net_link_changed_read_clear(nn)) {
+ if (test_bit(NFP_PORT_CHANGED, &port->flags)) {
err = nfp_net_refresh_eth_port(port);
if (err)
return err;
@@ -237,6 +233,10 @@ nfp_net_get_link_ksettings(struct net_device *netdev,
return 0;
}
+ if (!nfp_netdev_is_nfp_net(netdev))
+ return -EOPNOTSUPP;
+ nn = netdev_priv(netdev);
+
sts = nn_readl(nn, NFP_NET_CFG_STS);
ls = FIELD_GET(NFP_NET_CFG_STS_LINK_RATE, sts);
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 7bed799dee83..0114071dc0fd 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -555,16 +555,19 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
if (list_empty(&pf->vnics))
goto out;
+ /* Update state of all ports */
+ rtnl_lock();
list_for_each_entry(nn, &pf->vnics, vnic_list)
- nfp_net_link_changed_read_clear(nn);
+ if (nn->port)
+ clear_bit(NFP_PORT_CHANGED, &nn->port->flags);
eth_table = nfp_eth_read_ports(pf->cpp);
if (!eth_table) {
+ rtnl_unlock();
nfp_err(pf->cpp, "Error refreshing port config!\n");
goto out;
}
- rtnl_lock();
list_for_each_entry(nn, &pf->vnics, vnic_list) {
if (!__nfp_port_get_eth_port(nn->port))
continue;
@@ -575,6 +578,7 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
kfree(eth_table);
+ /* Shoot off the ports which became invalid */
list_for_each_entry_safe(nn, next, &pf->vnics, vnic_list) {
if (!nn->port || nn->port->type != NFP_PORT_INVALID)
continue;
@@ -604,6 +608,8 @@ int nfp_net_refresh_eth_port(struct nfp_port *port)
struct nfp_eth_table *eth_table;
int ret;
+ clear_bit(NFP_PORT_CHANGED, &port->flags);
+
eth_table = nfp_eth_read_ports(cpp);
if (!eth_table) {
nfp_err(cpp, "Error refreshing port state table!\n");
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_port.h b/drivers/net/ethernet/netronome/nfp/nfp_port.h
index a23a2c02bc14..d674c8623a65 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_port.h
+++ b/drivers/net/ethernet/netronome/nfp/nfp_port.h
@@ -51,9 +51,20 @@ enum nfp_port_type {
};
/**
+ * enum nfp_port_flags - port flags (can be type-specific)
+ * @NFP_PORT_CHANGED: port state has changed since last eth table refresh;
+ * for NFP_PORT_PHYS_PORT, never set otherwise; must hold
+ * rtnl_lock to clear
+ */
+enum nfp_port_flags {
+ NFP_PORT_CHANGED = 0,
+};
+
+/**
* struct nfp_port - structure representing NFP port
* @netdev: backpointer to associated netdev
* @type: what port type does the entity represent
+ * @flags: port flags
* @app: backpointer to the app structure
* @eth_id: for %NFP_PORT_PHYS_PORT port ID in NFP enumeration scheme
* @eth_port: for %NFP_PORT_PHYS_PORT translated ETH Table port entry
@@ -62,6 +73,8 @@ struct nfp_port {
struct net_device *netdev;
enum nfp_port_type type;
+ unsigned long flags;
+
struct nfp_app *app;
unsigned int eth_id;
--
2.11.0
^ permalink raw reply related
* [PATCH net-next 08/13] nfp: update port state in place
From: Jakub Kicinski @ 2017-05-19 22:01 UTC (permalink / raw)
To: netdev; +Cc: kubakici, oss-drivers, Jakub Kicinski
In-Reply-To: <20170519220155.27857-1-jakub.kicinski@netronome.com>
Always updating port state in place by overriding values in exiting
pf->eth_tbl makes things easier to manage and allows us to have a
common helper for both full and per-port refresh.
Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Reviewed-by: Simon Horman <simon.horman@netronome.com>
---
drivers/net/ethernet/netronome/nfp/nfp_net_main.c | 54 +++++++++++++----------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
index 167ccf788ba2..7bed799dee83 100644
--- a/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
+++ b/drivers/net/ethernet/netronome/nfp/nfp_net_main.c
@@ -518,6 +518,30 @@ static void nfp_net_pci_remove_finish(struct nfp_pf *pf)
nfp_cpp_area_release_free(pf->data_vnic_bar);
}
+static int
+nfp_net_eth_port_update(struct nfp_cpp *cpp, struct nfp_port *port,
+ struct nfp_eth_table *eth_table)
+{
+ struct nfp_eth_table_port *eth_port;
+
+ ASSERT_RTNL();
+
+ eth_port = nfp_net_find_port(eth_table, port->eth_id);
+ if (!eth_port) {
+ nfp_warn(cpp, "Warning: port #%d not present after reconfig\n",
+ port->eth_id);
+ return -EIO;
+ }
+ if (eth_port->override_changed) {
+ nfp_warn(cpp, "Port #%d config changed, unregistering. Reboot required before port will be operational again.\n", port->eth_id);
+ port->type = NFP_PORT_INVALID;
+ }
+
+ memcpy(port->eth_port, eth_port, sizeof(*eth_port));
+
+ return 0;
+}
+
static void nfp_net_refresh_vnics(struct work_struct *work)
{
struct nfp_pf *pf = container_of(work, struct nfp_pf,
@@ -544,23 +568,12 @@ static void nfp_net_refresh_vnics(struct work_struct *work)
list_for_each_entry(nn, &pf->vnics, vnic_list) {
if (!__nfp_port_get_eth_port(nn->port))
continue;
- nn->port->eth_port = nfp_net_find_port(eth_table,
- nn->port->eth_id);
- if (!nn->port->eth_port) {
- nfp_warn(pf->cpp, "Warning: port #%d not present after reconfig\n",
- nn->port->eth_id);
- continue;
- }
- if (nn->port->eth_port->override_changed) {
- nfp_warn(pf->cpp, "Port config changed, unregistering. Reboot required before port will be operational again.\n");
- nn->port->type = NFP_PORT_INVALID;
- continue;
- }
+
+ nfp_net_eth_port_update(pf->cpp, nn->port, eth_table);
}
rtnl_unlock();
- kfree(pf->eth_tbl);
- pf->eth_tbl = eth_table;
+ kfree(eth_table);
list_for_each_entry_safe(nn, next, &pf->vnics, vnic_list) {
if (!nn->port || nn->port->type != NFP_PORT_INVALID)
@@ -588,8 +601,8 @@ void nfp_net_refresh_port_table(struct nfp_port *port)
int nfp_net_refresh_eth_port(struct nfp_port *port)
{
struct nfp_cpp *cpp = nfp_app_cpp(port->app);
- struct nfp_eth_table_port *eth_port;
struct nfp_eth_table *eth_table;
+ int ret;
eth_table = nfp_eth_read_ports(cpp);
if (!eth_table) {
@@ -597,18 +610,11 @@ int nfp_net_refresh_eth_port(struct nfp_port *port)
return -EIO;
}
- eth_port = nfp_net_find_port(eth_table, port->eth_id);
- if (!eth_port) {
- nfp_err(cpp, "Error finding state of the port!\n");
- kfree(eth_table);
- return -EIO;
- }
-
- memcpy(port->eth_port, eth_port, sizeof(*eth_port));
+ ret = nfp_net_eth_port_update(cpp, port, eth_table);
kfree(eth_table);
- return 0;
+ return ret;
}
/*
--
2.11.0
^ permalink raw reply related
* Re: [PATCH net] bonding: fix randomly populated arp target array
From: Jarod Wilson @ 2017-05-19 22:14 UTC (permalink / raw)
To: Mahesh Bandewar (महेश बंडेवार)
Cc: linux-kernel, Jay Vosburgh, Veaceslav Falico, Andy Gospodarek,
linux-netdev, stable
In-Reply-To: <CAF2d9jiyCcqH=4Ls-GanJmLcMcjJzR=KEkqomFqVonrPv8QAPw@mail.gmail.com>
On 2017-05-19 4:38 PM, Mahesh Bandewar (महेश बंडेवार) wrote:
> On Fri, May 19, 2017 at 11:46 AM, Jarod Wilson <jarod@redhat.com> wrote:
>> In commit dc9c4d0fe023, the arp_target array moved from a static global
>> to a local variable. By the nature of static globals, the array used to
>> be initialized to all 0. At present, it's full of random data, which
>> that gets interpreted as arp_target values, when none have actually been
>> specified. Systems end up booting with spew along these lines:
>>
>> [ 32.161783] IPv6: ADDRCONF(NETDEV_UP): lacp0: link is not ready
>> [ 32.168475] IPv6: ADDRCONF(NETDEV_UP): lacp0: link is not ready
>> [ 32.175089] 8021q: adding VLAN 0 to HW filter on device lacp0
>> [ 32.193091] IPv6: ADDRCONF(NETDEV_UP): lacp0: link is not ready
>> [ 32.204892] lacp0: Setting MII monitoring interval to 100
>> [ 32.211071] lacp0: Removing ARP target 216.124.228.17
>> [ 32.216824] lacp0: Removing ARP target 218.160.255.255
>> [ 32.222646] lacp0: Removing ARP target 185.170.136.184
>> [ 32.228496] lacp0: invalid ARP target 255.255.255.255 specified for removal
>> [ 32.236294] lacp0: option arp_ip_target: invalid value (-255.255.255.255)
>> [ 32.243987] lacp0: Removing ARP target 56.125.228.17
>> [ 32.249625] lacp0: Removing ARP target 218.160.255.255
>> [ 32.255432] lacp0: Removing ARP target 15.157.233.184
>> [ 32.261165] lacp0: invalid ARP target 255.255.255.255 specified for removal
>> [ 32.268939] lacp0: option arp_ip_target: invalid value (-255.255.255.255)
>> [ 32.276632] lacp0: Removing ARP target 16.0.0.0
>> [ 32.281755] lacp0: Removing ARP target 218.160.255.255
>> [ 32.287567] lacp0: Removing ARP target 72.125.228.17
>> [ 32.293165] lacp0: Removing ARP target 218.160.255.255
>> [ 32.298970] lacp0: Removing ARP target 8.125.228.17
>> [ 32.304458] lacp0: Removing ARP target 218.160.255.255
>>
>> None of these were actually specified as ARP targets, and the driver does
>> seem to clean up the mess okay, but it's rather noisy and confusing, leaks
>> values to userspace, and the 255.255.255.255 spew shows up even when debug
>> prints are disabled.
>>
>> The fix: just zero out arp_target at init time.
>>
>> While we're in here, init arp_all_targets_value in the right place.
>>
>> Fixes: dc9c4d0fe023 ("bonding: reduce scope of some global variables")
>> CC: Mahesh Bandewar <maheshb@google.com>
>> CC: Jay Vosburgh <j.vosburgh@gmail.com>
>> CC: Veaceslav Falico <vfalico@gmail.com>
>> CC: Andy Gospodarek <andy@greyhouse.net>
>> CC: netdev@vger.kernel.org
>> CC: stable@vger.kernel.org
>> Signed-off-by: Jarod Wilson <jarod@redhat.com>
>> ---
>> drivers/net/bonding/bond_main.c | 5 ++---
>> 1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
>> index 2be78807fd6e..73313318399c 100644
>> --- a/drivers/net/bonding/bond_main.c
>> +++ b/drivers/net/bonding/bond_main.c
>> @@ -4271,10 +4271,10 @@ static int bond_check_params(struct bond_params *params)
>> int arp_validate_value, fail_over_mac_value, primary_reselect_value, i;
>> struct bond_opt_value newval;
>> const struct bond_opt_value *valptr;
>> - int arp_all_targets_value;
>> + int arp_all_targets_value = 0;
>
> I think this is unnecessary as long as the var is initialized before it's use.
No, it's not part of the fix, it just irked me. The extra line is
completely unnecessary, less lines is good. Possibly shouldn't have
folded it into this fix, will respin and submit the cleanup another
time, if necessary.
>> u16 ad_actor_sys_prio = 0;
>> u16 ad_user_port_key = 0;
>> - __be32 arp_target[BOND_MAX_ARP_TARGETS];
>> + __be32 arp_target[BOND_MAX_ARP_TARGETS] = { 0 };
>
> this is the only change required to avoid reported error.
Absolutely correct.
--
Jarod Wilson
jarod@redhat.com
^ permalink raw reply
* Re: [PATCH net] bonding: fix accounting of active ports in 3ad
From: Jarod Wilson @ 2017-05-19 22:15 UTC (permalink / raw)
To: David Miller; +Cc: linux-kernel, j.vosburgh, vfalico, andy, netdev
In-Reply-To: <20170519.171417.473208349438307952.davem@davemloft.net>
On 2017-05-19 5:14 PM, David Miller wrote:
> From: Jarod Wilson <jarod@redhat.com>
> Date: Wed, 17 May 2017 11:11:44 -0400
>
>> As of 7bb11dc9f59d and 0622cab0341c, bond slaves in a 3ad bond are not
>> removed from the aggregator when they are down, and the active slave count
>> is NOT equal to number of ports in the aggregator, but rather the number
>> of ports in the aggregator that are still enabled.
> ...
>> Remedy it by using the same logic introduced in
>> 7bb11dc9f59d in __bond_3ad_get_active_agg_info(), so sysfs, procfs and
> ^^^^^^^^^^^^
>> netlink all report the number of active ports.
>
> I think you mean to reference commit 0622cab0341c here not 7bb11dc9f59d.
D'oh, yes, you are entirely correct. Should I submit a v2 with that
correction?
--
Jarod Wilson
jarod@redhat.com
^ permalink raw reply
* Re: [Intel-wired-lan] [PATCH 0/4] Configuring traffic classes via new hardware offload mechanism in tc/mqprio
From: John Fastabend @ 2017-05-19 22:30 UTC (permalink / raw)
To: Amritha Nambiar, intel-wired-lan; +Cc: netdev
In-Reply-To: <149524122523.11022.4541073724650541658.stgit@anamdev.jf.intel.com>
On 05/19/2017 05:58 PM, Amritha Nambiar wrote:
> The following series introduces a new harware offload mode in
> tc/mqprio where the TCs, the queue configurations and bandwidth rate
> limits are offloaded to the hardware. The i40e driver enables the new
> mqprio hardware offload mechanism factoring the TCs, queue
> configuration and bandwidth rates by creating HW channel VSIs.
>
nice work, fix your time stamp and line wrapping though.
> In this mode, the priority to traffic class mapping and the user
> specified queue ranges are used to configure the traffic class when
> the 'hw' option is set to 2. This is achieved by creating HW
> channels(VSI). A new channel is created for each of the traffic class
> configuration offloaded via mqprio framework except for the first TC
> (TC0) which is for the main VSI. TC0 for the main VSI is also
> reconfigured as per user provided queue parameters. Finally,
> bandwidth rate limits are set on these traffic classes through the
> mqprio offload framework by sending these rates in addition to the
> number of TCs and the queue configurations.
> Example:
> # tc qdisc add dev eth0 root mqprio num_tc 2 map 0 0 0 0 1 1 1 1\
> queues 4@0 4@4 min_rate 0Mbit 0Mbit max_rate 55Mbit 60Mbit hw 2
>
> To dump the bandwidth rates:
>
> # tc qdisc show dev eth0
> qdisc mqprio 804a: root tc 2 map 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0
> queues:(0:3) (4:7)
> min rates:0bit 0bit
> max rates:55Mbit 60Mbit
>
Looks reasonable to me thanks. Previously, rate limits were being set
via dcbnl but I guess this interface is slightly nicer in that it puts
all configuration in one spot. IMO it would be nice to push dcbnl users
over to this.
Thanks,
.John
^ permalink raw reply
* [PATCH net-next] macsec: double accounting of dropped rx/tx packets
From: Girish Moodalbail @ 2017-05-19 22:25 UTC (permalink / raw)
To: netdev; +Cc: davem, sd
The macsec implementation shouldn't account for rx/tx packets that are
dropped in the netdev framework. The netdev framework itself accounts
for such packets by atomically updating struct net_device`rx_dropped and
struct net_device`tx_dropped fields. Later on when the stats for macsec
link is retrieved, the packets dropped in netdev framework will be
included in dev_get_stats() after calling macsec.c`macsec_get_stats64()
Signed-off-by: Girish Moodalbail <girish.moodalbail@oracle.com>
---
drivers/net/macsec.c | 15 +++------------
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c
index cdc347b..91642fd 100644
--- a/drivers/net/macsec.c
+++ b/drivers/net/macsec.c
@@ -588,8 +588,6 @@ static void count_tx(struct net_device *dev, int ret, int len)
stats->tx_packets++;
stats->tx_bytes += len;
u64_stats_update_end(&stats->syncp);
- } else {
- dev->stats.tx_dropped++;
}
}
@@ -883,7 +881,7 @@ static void macsec_decrypt_done(struct crypto_async_request *base, int err)
struct macsec_dev *macsec = macsec_priv(dev);
struct macsec_rx_sa *rx_sa = macsec_skb_cb(skb)->rx_sa;
struct macsec_rx_sc *rx_sc = rx_sa->sc;
- int len, ret;
+ int len;
u32 pn;
aead_request_free(macsec_skb_cb(skb)->req);
@@ -904,11 +902,8 @@ static void macsec_decrypt_done(struct crypto_async_request *base, int err)
macsec_reset_skb(skb, macsec->secy.netdev);
len = skb->len;
- ret = gro_cells_receive(&macsec->gro_cells, skb);
- if (ret == NET_RX_SUCCESS)
+ if (gro_cells_receive(&macsec->gro_cells, skb) == NET_RX_SUCCESS)
count_rx(dev, len);
- else
- macsec->secy.netdev->stats.rx_dropped++;
rcu_read_unlock_bh();
@@ -1037,7 +1032,6 @@ static void handle_not_macsec(struct sk_buff *skb)
*/
list_for_each_entry_rcu(macsec, &rxd->secys, secys) {
struct sk_buff *nskb;
- int ret;
struct pcpu_secy_stats *secy_stats = this_cpu_ptr(macsec->stats);
if (macsec->secy.validate_frames == MACSEC_VALIDATE_STRICT) {
@@ -1054,13 +1048,10 @@ static void handle_not_macsec(struct sk_buff *skb)
nskb->dev = macsec->secy.netdev;
- ret = netif_rx(nskb);
- if (ret == NET_RX_SUCCESS) {
+ if (netif_rx(nskb) == NET_RX_SUCCESS) {
u64_stats_update_begin(&secy_stats->syncp);
secy_stats->stats.InPktsUntagged++;
u64_stats_update_end(&secy_stats->syncp);
- } else {
- macsec->secy.netdev->stats.rx_dropped++;
}
}
--
1.8.3.1
^ permalink raw reply related
* Hiking Enthusiasts
From: Patrick Grimes @ 2017-05-19 21:53 UTC (permalink / raw)
To: netdev
Hi,
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We respect your privacy, if you do not wish to receive any further emails from our end, please reply with a subject “Leave Out”.
^ permalink raw reply
* [PATCH] net: atheros: atl2: don't return zero on failure path in atl2_probe()
From: Alexey Khoroshilov @ 2017-05-19 22:52 UTC (permalink / raw)
To: Jay Cliburn, Chris Snook
Cc: Alexey Khoroshilov, David S. Miller, netdev, linux-kernel,
ldv-project
If dma mask checks fail in atl2_probe(), it breaks off initialization,
deallocates all resources, but returns zero.
The patch adds proper error code return value and
make error code setup unified.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru>
---
drivers/net/ethernet/atheros/atlx/atl2.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/atheros/atlx/atl2.c b/drivers/net/ethernet/atheros/atlx/atl2.c
index 63f2deec2a52..77a1c03255de 100644
--- a/drivers/net/ethernet/atheros/atlx/atl2.c
+++ b/drivers/net/ethernet/atheros/atlx/atl2.c
@@ -1353,6 +1353,7 @@ static int atl2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n");
+ err = -EIO;
goto err_dma;
}
@@ -1366,10 +1367,11 @@ static int atl2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
* pcibios_set_master to do the needed arch specific settings */
pci_set_master(pdev);
- err = -ENOMEM;
netdev = alloc_etherdev(sizeof(struct atl2_adapter));
- if (!netdev)
+ if (!netdev) {
+ err = -ENOMEM;
goto err_alloc_etherdev;
+ }
SET_NETDEV_DEV(netdev, &pdev->dev);
@@ -1408,8 +1410,6 @@ static int atl2_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (err)
goto err_sw_init;
- err = -EIO;
-
netdev->hw_features = NETIF_F_HW_VLAN_CTAG_RX;
netdev->features |= (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX);
--
2.7.4
^ permalink raw reply related
* [PATCH v3 net-next 0/5] dsa: add Microchip KSZ9477 DSA driver
From: Woojung.Huh @ 2017-05-19 22:56 UTC (permalink / raw)
To: andrew, f.fainelli, vivien.didelot, sergei.shtylyov
Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
This series of patches is for Microchip KSZ9477 DSA driver.
KSZ9477 is 7 ports GigE switch with numerous advanced features.
5 ports are 10/100/1000 Mbps internal PHYs and 2 ports have
Interfaces to SGMII, RGMII, MII or RMII.
This patch supports VLAN, MDB, FDB and port mirroring offloads.
Welcome reviews and comments from community.
Note: Tests are performed on internal development board.
V3
- update per review comments
- cosmetic changes
- drivers/net/dsa/microchip/ksz_common.c
* clean up ksz_switch_chips[]
* consolidate checking loops into functions
* update mutex for better locking
* replace devm_kmalloc_array() to devm_kcalloc()
- MAINTAINERS
* add missing net/dsa/tag_ksz.c
V2
- update per review comments
- several cosmetic changes
- net/dsa/tag_ksz.c
* constants are changed to defines
* remove skb_linearize() in ksz_rcv()
* ksz_xmit()checks skb tailroom before allocate new skb
- drivers/net/phy/micrel.c
* remove PHY_HAS_MAGICANEG from ksphy_driver[]
- drivers/net/dsa/microchip/ksz_common.c
* add timeout to avoid endless loop
* port initialization is move to ksz_port_enable() instead of ksz_setup_ports()
- Documentation/devicetree/bindings/net/dsa/ksz.txt
* fix typo and indentations
Woojung Huh (5):
dsa: add support for Microchip KSZ tail tagging
phy: micrel: add Microchip KSZ 9477 Switch PHY support
dsa: add DSA switch driver for Microchip KSZ9477
dsa: Add spi support to Microchip KSZ switches
dsa: add maintainer of Microchip KSZ switches
Documentation/devicetree/bindings/net/dsa/ksz.txt | 73 +
MAINTAINERS | 10 +
drivers/net/dsa/Kconfig | 2 +
drivers/net/dsa/Makefile | 1 +
drivers/net/dsa/microchip/Kconfig | 12 +
drivers/net/dsa/microchip/Makefile | 2 +
drivers/net/dsa/microchip/ksz_9477_reg.h | 1676 +++++++++++++++++++++
drivers/net/dsa/microchip/ksz_common.c | 1255 +++++++++++++++
drivers/net/dsa/microchip/ksz_priv.h | 210 +++
drivers/net/dsa/microchip/ksz_spi.c | 215 +++
drivers/net/phy/micrel.c | 11 +
include/linux/micrel_phy.h | 2 +
include/linux/platform_data/microchip-ksz.h | 29 +
include/net/dsa.h | 1 +
net/dsa/Kconfig | 3 +
net/dsa/Makefile | 1 +
net/dsa/dsa.c | 3 +
net/dsa/dsa_priv.h | 3 +
net/dsa/tag_ksz.c | 103 ++
19 files changed, 3612 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dsa/ksz.txt
create mode 100644 drivers/net/dsa/microchip/Kconfig
create mode 100644 drivers/net/dsa/microchip/Makefile
create mode 100644 drivers/net/dsa/microchip/ksz_9477_reg.h
create mode 100644 drivers/net/dsa/microchip/ksz_common.c
create mode 100644 drivers/net/dsa/microchip/ksz_priv.h
create mode 100644 drivers/net/dsa/microchip/ksz_spi.c
create mode 100644 include/linux/platform_data/microchip-ksz.h
create mode 100644 net/dsa/tag_ksz.c
--
2.7.4
^ permalink raw reply
* [PATCH v3 net-next 1/5] dsa: add support for Microchip KSZ tail tagging
From: Woojung.Huh @ 2017-05-19 22:57 UTC (permalink / raw)
To: andrew, f.fainelli, vivien.didelot, sergei.shtylyov
Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
Adding support for the Microchip KSZ switch family tail tagging.
Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
include/net/dsa.h | 1 +
net/dsa/Kconfig | 3 ++
net/dsa/Makefile | 1 +
net/dsa/dsa.c | 3 ++
net/dsa/dsa_priv.h | 3 ++
net/dsa/tag_ksz.c | 103 +++++++++++++++++++++++++++++++++++++++++++++++++++++
6 files changed, 114 insertions(+)
create mode 100644 net/dsa/tag_ksz.c
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 791fed6..fbb00a6 100644
--- a/include/net/dsa.h
+++ b/include/net/dsa.h
@@ -31,6 +31,7 @@ enum dsa_tag_protocol {
DSA_TAG_PROTO_BRCM,
DSA_TAG_PROTO_DSA,
DSA_TAG_PROTO_EDSA,
+ DSA_TAG_PROTO_KSZ,
DSA_TAG_PROTO_LAN9303,
DSA_TAG_PROTO_MTK,
DSA_TAG_PROTO_QCA,
diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig
index 297389b..cc5f8f9 100644
--- a/net/dsa/Kconfig
+++ b/net/dsa/Kconfig
@@ -25,6 +25,9 @@ config NET_DSA_TAG_DSA
config NET_DSA_TAG_EDSA
bool
+config NET_DSA_TAG_KSZ
+ bool
+
config NET_DSA_TAG_LAN9303
bool
diff --git a/net/dsa/Makefile b/net/dsa/Makefile
index f8c0251..b15141f 100644
--- a/net/dsa/Makefile
+++ b/net/dsa/Makefile
@@ -6,6 +6,7 @@ dsa_core-y += dsa.o slave.o dsa2.o switch.o legacy.o
dsa_core-$(CONFIG_NET_DSA_TAG_BRCM) += tag_brcm.o
dsa_core-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
dsa_core-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
+dsa_core-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
dsa_core-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o
dsa_core-$(CONFIG_NET_DSA_TAG_MTK) += tag_mtk.o
dsa_core-$(CONFIG_NET_DSA_TAG_QCA) += tag_qca.o
diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
index 3288a80..402459e 100644
--- a/net/dsa/dsa.c
+++ b/net/dsa/dsa.c
@@ -49,6 +49,9 @@ const struct dsa_device_ops *dsa_device_ops[DSA_TAG_LAST] = {
#ifdef CONFIG_NET_DSA_TAG_EDSA
[DSA_TAG_PROTO_EDSA] = &edsa_netdev_ops,
#endif
+#ifdef CONFIG_NET_DSA_TAG_KSZ
+ [DSA_TAG_PROTO_KSZ] = &ksz_netdev_ops,
+#endif
#ifdef CONFIG_NET_DSA_TAG_LAN9303
[DSA_TAG_PROTO_LAN9303] = &lan9303_netdev_ops,
#endif
diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
index c274130..6f23dfa 100644
--- a/net/dsa/dsa_priv.h
+++ b/net/dsa/dsa_priv.h
@@ -85,6 +85,9 @@ extern const struct dsa_device_ops dsa_netdev_ops;
/* tag_edsa.c */
extern const struct dsa_device_ops edsa_netdev_ops;
+/* tag_ksz.c */
+extern const struct dsa_device_ops ksz_netdev_ops;
+
/* tag_lan9303.c */
extern const struct dsa_device_ops lan9303_netdev_ops;
diff --git a/net/dsa/tag_ksz.c b/net/dsa/tag_ksz.c
new file mode 100644
index 0000000..cbc79b5
--- /dev/null
+++ b/net/dsa/tag_ksz.c
@@ -0,0 +1,103 @@
+/*
+ * net/dsa/tag_ksz.c - Microchip KSZ Switch tag format handling
+ * Copyright (c) 2017 Microchip Technology
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/etherdevice.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <net/dsa.h>
+#include "dsa_priv.h"
+
+/* For Ingress (Host -> KSZ), 2 bytes are added before FCS.
+ * ---------------------------------------------------------------------------
+ * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|tag1(1byte)|FCS(4bytes)
+ * ---------------------------------------------------------------------------
+ * tag0 : Prioritization (not used now)
+ * tag1 : each bit represents port (eg, 0x01=port1, 0x02=port2, 0x10=port5)
+ *
+ * For Egress (KSZ -> Host), 1 byte is added before FCS.
+ * ---------------------------------------------------------------------------
+ * DA(6bytes)|SA(6bytes)|....|Data(nbytes)|tag0(1byte)|FCS(4bytes)
+ * ---------------------------------------------------------------------------
+ * tag0 : zero-based value represents port
+ * (eg, 0x00=port1, 0x02=port3, 0x06=port7)
+ */
+
+#define KSZ_INGRESS_TAG_LEN 2
+#define KSZ_EGRESS_TAG_LEN 1
+
+static struct sk_buff *ksz_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ struct dsa_slave_priv *p = netdev_priv(dev);
+ struct sk_buff *nskb;
+ int padlen;
+ u8 *tag;
+
+ padlen = (skb->len >= ETH_ZLEN) ? 0 : ETH_ZLEN - skb->len;
+
+ if (skb_tailroom(skb) >= padlen + KSZ_INGRESS_TAG_LEN) {
+ nskb = skb;
+ } else {
+ nskb = alloc_skb(NET_IP_ALIGN + skb->len +
+ padlen + KSZ_INGRESS_TAG_LEN, GFP_ATOMIC);
+ if (!nskb) {
+ kfree_skb(skb);
+ return NULL;
+ }
+ skb_reserve(nskb, NET_IP_ALIGN);
+
+ skb_reset_mac_header(nskb);
+ skb_set_network_header(nskb,
+ skb_network_header(skb) - skb->head);
+ skb_set_transport_header(nskb,
+ skb_transport_header(skb) - skb->head);
+ skb_copy_and_csum_dev(skb, skb_put(nskb, skb->len));
+ kfree_skb(skb);
+ }
+
+ if (padlen) {
+ u8 *pad = skb_put(nskb, padlen);
+
+ memset(pad, 0, padlen);
+ }
+
+ tag = skb_put(nskb, KSZ_INGRESS_TAG_LEN);
+ tag[0] = 0;
+ tag[1] = 1 << p->dp->index; /* destnation port */
+
+ return nskb;
+}
+
+struct sk_buff *ksz_rcv(struct sk_buff *skb, struct net_device *dev,
+ struct packet_type *pt, struct net_device *orig_dev)
+{
+ struct dsa_switch_tree *dst = dev->dsa_ptr;
+ struct dsa_switch *ds;
+ u8 *tag;
+ int source_port;
+
+ ds = dst->cpu_dp->ds;
+
+ tag = skb_tail_pointer(skb) - KSZ_EGRESS_TAG_LEN;
+
+ source_port = tag[0] & 7;
+ if (source_port >= ds->num_ports || !ds->ports[source_port].netdev)
+ return NULL;
+
+ pskb_trim_rcsum(skb, skb->len - KSZ_EGRESS_TAG_LEN);
+
+ skb->dev = ds->ports[source_port].netdev;
+
+ return skb;
+}
+
+const struct dsa_device_ops ksz_netdev_ops = {
+ .xmit = ksz_xmit,
+ .rcv = ksz_rcv,
+};
--
2.7.4
^ permalink raw reply related
* [PATCH v3 net-next 3/5] dsa: add DSA switch driver for Microchip KSZ9477
From: Woojung.Huh @ 2017-05-19 22:57 UTC (permalink / raw)
To: andrew, f.fainelli, vivien.didelot, sergei.shtylyov
Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
The KSZ9477 is a fully integrated layer 2, managed, 7 ports GigE switch
with numerous advanced features. 5 ports incorporate 10/100/1000 Mbps PHYs.
The other 2 ports have interfaces that can be configured as SGMII, RGMII, MII
or RMII. Either of these may connect directly to a host processor or
to an external PHY. The SGMII port may interface to a fiber optic transceiver.
This driver currently supports vlan, fdb, mdb & mirror dsa switch operations.
Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com>
---
drivers/net/dsa/Kconfig | 2 +
drivers/net/dsa/Makefile | 1 +
drivers/net/dsa/microchip/Kconfig | 12 +
drivers/net/dsa/microchip/Makefile | 2 +
drivers/net/dsa/microchip/ksz_9477_reg.h | 1676 +++++++++++++++++++++++++++
drivers/net/dsa/microchip/ksz_common.c | 1255 ++++++++++++++++++++
drivers/net/dsa/microchip/ksz_priv.h | 210 ++++
drivers/net/dsa/microchip/ksz_spi.c | 215 ++++
include/linux/platform_data/microchip-ksz.h | 29 +
9 files changed, 3402 insertions(+)
create mode 100644 drivers/net/dsa/microchip/Kconfig
create mode 100644 drivers/net/dsa/microchip/Makefile
create mode 100644 drivers/net/dsa/microchip/ksz_9477_reg.h
create mode 100644 drivers/net/dsa/microchip/ksz_common.c
create mode 100644 drivers/net/dsa/microchip/ksz_priv.h
create mode 100644 drivers/net/dsa/microchip/ksz_spi.c
create mode 100644 include/linux/platform_data/microchip-ksz.h
diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
index 68131a4..83a9bc8 100644
--- a/drivers/net/dsa/Kconfig
+++ b/drivers/net/dsa/Kconfig
@@ -39,6 +39,8 @@ config NET_DSA_MV88E6060
This enables support for the Marvell 88E6060 ethernet switch
chip.
+source "drivers/net/dsa/microchip/Kconfig"
+
source "drivers/net/dsa/mv88e6xxx/Kconfig"
config NET_DSA_QCA8K
diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile
index 9613f36..4a5b5bd 100644
--- a/drivers/net/dsa/Makefile
+++ b/drivers/net/dsa/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_NET_DSA_SMSC_LAN9303) += lan9303-core.o
obj-$(CONFIG_NET_DSA_SMSC_LAN9303_I2C) += lan9303_i2c.o
obj-$(CONFIG_NET_DSA_SMSC_LAN9303_MDIO) += lan9303_mdio.o
obj-y += b53/
+obj-y += microchip/
obj-y += mv88e6xxx/
diff --git a/drivers/net/dsa/microchip/Kconfig b/drivers/net/dsa/microchip/Kconfig
new file mode 100644
index 0000000..a8b8f59
--- /dev/null
+++ b/drivers/net/dsa/microchip/Kconfig
@@ -0,0 +1,12 @@
+menuconfig MICROCHIP_KSZ
+ tristate "Microchip KSZ series switch support"
+ depends on NET_DSA
+ select NET_DSA_TAG_KSZ
+ help
+ This driver adds support for Microchip KSZ switch chips.
+
+config MICROCHIP_KSZ_SPI_DRIVER
+ tristate "KSZ series SPI connected switch driver"
+ depends on MICROCHIP_KSZ && SPI
+ help
+ Select to enable support for registering switches configured through SPI.
diff --git a/drivers/net/dsa/microchip/Makefile b/drivers/net/dsa/microchip/Makefile
new file mode 100644
index 0000000..ed335e2
--- /dev/null
+++ b/drivers/net/dsa/microchip/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_MICROCHIP_KSZ) += ksz_common.o
+obj-$(CONFIG_MICROCHIP_KSZ_SPI_DRIVER) += ksz_spi.o
diff --git a/drivers/net/dsa/microchip/ksz_9477_reg.h b/drivers/net/dsa/microchip/ksz_9477_reg.h
new file mode 100644
index 0000000..6aa6752
--- /dev/null
+++ b/drivers/net/dsa/microchip/ksz_9477_reg.h
@@ -0,0 +1,1676 @@
+/*
+ * Microchip KSZ9477 register definitions
+ *
+ * Copyright (C) 2017
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef __KSZ9477_REGS_H
+#define __KSZ9477_REGS_H
+
+#define KS_PRIO_M 0x7
+#define KS_PRIO_S 4
+
+/* 0 - Operation */
+#define REG_CHIP_ID0__1 0x0000
+
+#define REG_CHIP_ID1__1 0x0001
+
+#define FAMILY_ID 0x95
+#define FAMILY_ID_94 0x94
+#define FAMILY_ID_95 0x95
+#define FAMILY_ID_85 0x85
+#define FAMILY_ID_98 0x98
+#define FAMILY_ID_88 0x88
+
+#define REG_CHIP_ID2__1 0x0002
+
+#define CHIP_ID_63 0x63
+#define CHIP_ID_66 0x66
+#define CHIP_ID_67 0x67
+#define CHIP_ID_77 0x77
+#define CHIP_ID_93 0x93
+#define CHIP_ID_96 0x96
+#define CHIP_ID_97 0x97
+
+#define REG_CHIP_ID3__1 0x0003
+
+#define SWITCH_REVISION_M 0x0F
+#define SWITCH_REVISION_S 4
+#define SWITCH_RESET 0x01
+
+#define REG_SW_PME_CTRL 0x0006
+
+#define PME_ENABLE BIT(1)
+#define PME_POLARITY BIT(0)
+
+#define REG_GLOBAL_OPTIONS 0x000F
+
+#define SW_GIGABIT_ABLE BIT(6)
+#define SW_REDUNDANCY_ABLE BIT(5)
+#define SW_AVB_ABLE BIT(4)
+#define SW_9567_RL_5_2 0xC
+#define SW_9477_SL_5_2 0xD
+
+#define SW_9896_GL_5_1 0xB
+#define SW_9896_RL_5_1 0x8
+#define SW_9896_SL_5_1 0x9
+
+#define SW_9895_GL_4_1 0x7
+#define SW_9895_RL_4_1 0x4
+#define SW_9895_SL_4_1 0x5
+
+#define SW_9896_RL_4_2 0x6
+
+#define SW_9893_RL_2_1 0x0
+#define SW_9893_SL_2_1 0x1
+#define SW_9893_GL_2_1 0x3
+
+#define SW_QW_ABLE BIT(5)
+#define SW_9893_RN_2_1 0xC
+
+#define REG_SW_INT_STATUS__4 0x0010
+#define REG_SW_INT_MASK__4 0x0014
+
+#define LUE_INT BIT(31)
+#define TRIG_TS_INT BIT(30)
+#define APB_TIMEOUT_INT BIT(29)
+
+#define SWITCH_INT_MASK (TRIG_TS_INT | APB_TIMEOUT_INT)
+
+#define REG_SW_PORT_INT_STATUS__4 0x0018
+#define REG_SW_PORT_INT_MASK__4 0x001C
+#define REG_SW_PHY_INT_STATUS 0x0020
+#define REG_SW_PHY_INT_ENABLE 0x0024
+
+/* 1 - Global */
+#define REG_SW_GLOBAL_SERIAL_CTRL_0 0x0100
+#define SW_SPARE_REG_2 BIT(7)
+#define SW_SPARE_REG_1 BIT(6)
+#define SW_SPARE_REG_0 BIT(5)
+#define SW_BIG_ENDIAN BIT(4)
+#define SPI_AUTO_EDGE_DETECTION BIT(1)
+#define SPI_CLOCK_OUT_RISING_EDGE BIT(0)
+
+#define REG_SW_GLOBAL_OUTPUT_CTRL__1 0x0103
+#define SW_ENABLE_REFCLKO BIT(1)
+#define SW_REFCLKO_IS_125MHZ BIT(0)
+
+#define REG_SW_IBA__4 0x0104
+
+#define SW_IBA_ENABLE BIT(31)
+#define SW_IBA_DA_MATCH BIT(30)
+#define SW_IBA_INIT BIT(29)
+#define SW_IBA_QID_M 0xF
+#define SW_IBA_QID_S 22
+#define SW_IBA_PORT_M 0x2F
+#define SW_IBA_PORT_S 16
+#define SW_IBA_FRAME_TPID_M 0xFFFF
+
+#define REG_SW_APB_TIMEOUT_ADDR__4 0x0108
+
+#define APB_TIMEOUT_ACKNOWLEDGE BIT(31)
+
+#define REG_SW_IBA_SYNC__1 0x010C
+
+#define REG_SW_IO_STRENGTH__1 0x010D
+#define SW_DRIVE_STRENGTH_M 0x7
+#define SW_DRIVE_STRENGTH_2MA 0
+#define SW_DRIVE_STRENGTH_4MA 1
+#define SW_DRIVE_STRENGTH_8MA 2
+#define SW_DRIVE_STRENGTH_12MA 3
+#define SW_DRIVE_STRENGTH_16MA 4
+#define SW_DRIVE_STRENGTH_20MA 5
+#define SW_DRIVE_STRENGTH_24MA 6
+#define SW_DRIVE_STRENGTH_28MA 7
+#define SW_HI_SPEED_DRIVE_STRENGTH_S 4
+#define SW_LO_SPEED_DRIVE_STRENGTH_S 0
+
+#define REG_SW_IBA_STATUS__4 0x0110
+
+#define SW_IBA_REQ BIT(31)
+#define SW_IBA_RESP BIT(30)
+#define SW_IBA_DA_MISMATCH BIT(14)
+#define SW_IBA_FMT_MISMATCH BIT(13)
+#define SW_IBA_CODE_ERROR BIT(12)
+#define SW_IBA_CMD_ERROR BIT(11)
+#define SW_IBA_CMD_LOC_M (BIT(6) - 1)
+
+#define REG_SW_IBA_STATES__4 0x0114
+
+#define SW_IBA_BUF_STATE_S 30
+#define SW_IBA_CMD_STATE_S 28
+#define SW_IBA_RESP_STATE_S 26
+#define SW_IBA_STATE_M 0x3
+#define SW_IBA_PACKET_SIZE_M 0x7F
+#define SW_IBA_PACKET_SIZE_S 16
+#define SW_IBA_FMT_ID_M 0xFFFF
+
+#define REG_SW_IBA_RESULT__4 0x0118
+
+#define SW_IBA_SIZE_S 24
+
+#define SW_IBA_RETRY_CNT_M (BIT(5) - 1)
+
+/* 2 - PHY */
+#define REG_SW_POWER_MANAGEMENT_CTRL 0x0201
+
+#define SW_PLL_POWER_DOWN BIT(5)
+#define SW_POWER_DOWN_MODE 0x3
+#define SW_ENERGY_DETECTION 1
+#define SW_SOFT_POWER_DOWN 2
+#define SW_POWER_SAVING 3
+
+/* 3 - Operation Control */
+#define REG_SW_OPERATION 0x0300
+
+#define SW_DOUBLE_TAG BIT(7)
+#define SW_RESET BIT(1)
+#define SW_START BIT(0)
+
+#define REG_SW_MAC_ADDR_0 0x0302
+#define REG_SW_MAC_ADDR_1 0x0303
+#define REG_SW_MAC_ADDR_2 0x0304
+#define REG_SW_MAC_ADDR_3 0x0305
+#define REG_SW_MAC_ADDR_4 0x0306
+#define REG_SW_MAC_ADDR_5 0x0307
+
+#define REG_SW_MTU__2 0x0308
+
+#define REG_SW_ISP_TPID__2 0x030A
+
+#define REG_SW_HSR_TPID__2 0x030C
+
+#define REG_AVB_STRATEGY__2 0x030E
+
+#define SW_SHAPING_CREDIT_ACCT BIT(1)
+#define SW_POLICING_CREDIT_ACCT BIT(0)
+
+#define REG_SW_LUE_CTRL_0 0x0310
+
+#define SW_VLAN_ENABLE BIT(7)
+#define SW_DROP_INVALID_VID BIT(6)
+#define SW_AGE_CNT_M 0x7
+#define SW_AGE_CNT_S 3
+#define SW_RESV_MCAST_ENABLE BIT(2)
+#define SW_HASH_OPTION_M 0x03
+#define SW_HASH_OPTION_CRC 1
+#define SW_HASH_OPTION_XOR 2
+#define SW_HASH_OPTION_DIRECT 3
+
+#define REG_SW_LUE_CTRL_1 0x0311
+
+#define UNICAST_LEARN_DISABLE BIT(7)
+#define SW_SRC_ADDR_FILTER BIT(6)
+#define SW_FLUSH_STP_TABLE BIT(5)
+#define SW_FLUSH_MSTP_TABLE BIT(4)
+#define SW_FWD_MCAST_SRC_ADDR BIT(3)
+#define SW_AGING_ENABLE BIT(2)
+#define SW_FAST_AGING BIT(1)
+#define SW_LINK_AUTO_AGING BIT(0)
+
+#define REG_SW_LUE_CTRL_2 0x0312
+
+#define SW_TRAP_DOUBLE_TAG BIT(6)
+#define SW_EGRESS_VLAN_FILTER_DYN BIT(5)
+#define SW_EGRESS_VLAN_FILTER_STA BIT(4)
+#define SW_FLUSH_OPTION_M 0x3
+#define SW_FLUSH_OPTION_S 2
+#define SW_FLUSH_OPTION_DYN_MAC 1
+#define SW_FLUSH_OPTION_STA_MAC 2
+#define SW_FLUSH_OPTION_BOTH 3
+#define SW_PRIO_M 0x3
+#define SW_PRIO_DA 0
+#define SW_PRIO_SA 1
+#define SW_PRIO_HIGHEST_DA_SA 2
+#define SW_PRIO_LOWEST_DA_SA 3
+
+#define REG_SW_LUE_CTRL_3 0x0313
+
+#define REG_SW_LUE_INT_STATUS 0x0314
+#define REG_SW_LUE_INT_ENABLE 0x0315
+
+#define LEARN_FAIL_INT BIT(2)
+#define ALMOST_FULL_INT BIT(1)
+#define WRITE_FAIL_INT BIT(0)
+
+#define REG_SW_LUE_INDEX_0__2 0x0316
+
+#define ENTRY_INDEX_M 0x0FFF
+
+#define REG_SW_LUE_INDEX_1__2 0x0318
+
+#define FAIL_INDEX_M 0x03FF
+
+#define REG_SW_LUE_INDEX_2__2 0x031A
+
+#define REG_SW_LUE_UNK_UCAST_CTRL__4 0x0320
+
+#define SW_UNK_UCAST_ENABLE BIT(31)
+
+#define REG_SW_LUE_UNK_MCAST_CTRL__4 0x0324
+
+#define SW_UNK_MCAST_ENABLE BIT(31)
+
+#define REG_SW_LUE_UNK_VID_CTRL__4 0x0328
+
+#define SW_UNK_VID_ENABLE BIT(31)
+
+#define REG_SW_MAC_CTRL_0 0x0330
+
+#define SW_NEW_BACKOFF BIT(7)
+#define SW_CHECK_LENGTH BIT(3)
+#define SW_PAUSE_UNH_MODE BIT(1)
+#define SW_AGGR_BACKOFF BIT(0)
+
+#define REG_SW_MAC_CTRL_1 0x0331
+
+#define MULTICAST_STORM_DISABLE BIT(6)
+#define SW_BACK_PRESSURE BIT(5)
+#define FAIR_FLOW_CTRL BIT(4)
+#define NO_EXC_COLLISION_DROP BIT(3)
+#define SW_JUMBO_PACKET BIT(2)
+#define SW_LEGAL_PACKET_DISABLE BIT(1)
+#define SW_PASS_SHORT_FRAME BIT(0)
+
+#define REG_SW_MAC_CTRL_2 0x0332
+
+#define SW_REPLACE_VID BIT(3)
+#define BROADCAST_STORM_RATE_HI 0x07
+
+#define REG_SW_MAC_CTRL_3 0x0333
+
+#define BROADCAST_STORM_RATE_LO 0xFF
+#define BROADCAST_STORM_RATE 0x07FF
+
+#define REG_SW_MAC_CTRL_4 0x0334
+
+#define SW_PASS_PAUSE BIT(3)
+
+#define REG_SW_MAC_CTRL_5 0x0335
+
+#define SW_OUT_RATE_LIMIT_QUEUE_BASED BIT(3)
+
+#define REG_SW_MAC_CTRL_6 0x0336
+
+#define SW_MIB_COUNTER_FLUSH BIT(7)
+#define SW_MIB_COUNTER_FREEZE BIT(6)
+
+#define REG_SW_MAC_802_1P_MAP_0 0x0338
+#define REG_SW_MAC_802_1P_MAP_1 0x0339
+#define REG_SW_MAC_802_1P_MAP_2 0x033A
+#define REG_SW_MAC_802_1P_MAP_3 0x033B
+
+#define SW_802_1P_MAP_M KS_PRIO_M
+#define SW_802_1P_MAP_S KS_PRIO_S
+
+#define REG_SW_MAC_ISP_CTRL 0x033C
+
+#define REG_SW_MAC_TOS_CTRL 0x033E
+
+#define SW_TOS_DSCP_REMARK BIT(1)
+#define SW_TOS_DSCP_REMAP BIT(0)
+
+#define REG_SW_MAC_TOS_PRIO_0 0x0340
+#define REG_SW_MAC_TOS_PRIO_1 0x0341
+#define REG_SW_MAC_TOS_PRIO_2 0x0342
+#define REG_SW_MAC_TOS_PRIO_3 0x0343
+#define REG_SW_MAC_TOS_PRIO_4 0x0344
+#define REG_SW_MAC_TOS_PRIO_5 0x0345
+#define REG_SW_MAC_TOS_PRIO_6 0x0346
+#define REG_SW_MAC_TOS_PRIO_7 0x0347
+#define REG_SW_MAC_TOS_PRIO_8 0x0348
+#define REG_SW_MAC_TOS_PRIO_9 0x0349
+#define REG_SW_MAC_TOS_PRIO_10 0x034A
+#define REG_SW_MAC_TOS_PRIO_11 0x034B
+#define REG_SW_MAC_TOS_PRIO_12 0x034C
+#define REG_SW_MAC_TOS_PRIO_13 0x034D
+#define REG_SW_MAC_TOS_PRIO_14 0x034E
+#define REG_SW_MAC_TOS_PRIO_15 0x034F
+#define REG_SW_MAC_TOS_PRIO_16 0x0350
+#define REG_SW_MAC_TOS_PRIO_17 0x0351
+#define REG_SW_MAC_TOS_PRIO_18 0x0352
+#define REG_SW_MAC_TOS_PRIO_19 0x0353
+#define REG_SW_MAC_TOS_PRIO_20 0x0354
+#define REG_SW_MAC_TOS_PRIO_21 0x0355
+#define REG_SW_MAC_TOS_PRIO_22 0x0356
+#define REG_SW_MAC_TOS_PRIO_23 0x0357
+#define REG_SW_MAC_TOS_PRIO_24 0x0358
+#define REG_SW_MAC_TOS_PRIO_25 0x0359
+#define REG_SW_MAC_TOS_PRIO_26 0x035A
+#define REG_SW_MAC_TOS_PRIO_27 0x035B
+#define REG_SW_MAC_TOS_PRIO_28 0x035C
+#define REG_SW_MAC_TOS_PRIO_29 0x035D
+#define REG_SW_MAC_TOS_PRIO_30 0x035E
+#define REG_SW_MAC_TOS_PRIO_31 0x035F
+
+#define REG_SW_MRI_CTRL_0 0x0370
+
+#define SW_IGMP_SNOOP BIT(6)
+#define SW_IPV6_MLD_OPTION BIT(3)
+#define SW_IPV6_MLD_SNOOP BIT(2)
+#define SW_MIRROR_RX_TX BIT(0)
+
+#define REG_SW_CLASS_D_IP_CTRL__4 0x0374
+
+#define SW_CLASS_D_IP_ENABLE BIT(31)
+
+#define REG_SW_MRI_CTRL_8 0x0378
+
+#define SW_NO_COLOR_S 6
+#define SW_RED_COLOR_S 4
+#define SW_YELLOW_COLOR_S 2
+#define SW_GREEN_COLOR_S 0
+#define SW_COLOR_M 0x3
+
+#define REG_SW_QM_CTRL__4 0x0390
+
+#define PRIO_SCHEME_SELECT_M KS_PRIO_M
+#define PRIO_SCHEME_SELECT_S 6
+#define PRIO_MAP_3_HI 0
+#define PRIO_MAP_2_HI 2
+#define PRIO_MAP_0_LO 3
+#define UNICAST_VLAN_BOUNDARY BIT(1)
+
+#define REG_SW_EEE_QM_CTRL__2 0x03C0
+
+#define REG_SW_EEE_TXQ_WAIT_TIME__2 0x03C2
+
+/* 4 - */
+#define REG_SW_VLAN_ENTRY__4 0x0400
+
+#define VLAN_VALID BIT(31)
+#define VLAN_FORWARD_OPTION BIT(27)
+#define VLAN_PRIO_M KS_PRIO_M
+#define VLAN_PRIO_S 24
+#define VLAN_MSTP_M 0x7
+#define VLAN_MSTP_S 12
+#define VLAN_FID_M 0x7F
+
+#define REG_SW_VLAN_ENTRY_UNTAG__4 0x0404
+#define REG_SW_VLAN_ENTRY_PORTS__4 0x0408
+
+#define REG_SW_VLAN_ENTRY_INDEX__2 0x040C
+
+#define VLAN_INDEX_M 0x0FFF
+
+#define REG_SW_VLAN_CTRL 0x040E
+
+#define VLAN_START BIT(7)
+#define VLAN_ACTION 0x3
+#define VLAN_WRITE 1
+#define VLAN_READ 2
+#define VLAN_CLEAR 3
+
+#define REG_SW_ALU_INDEX_0 0x0410
+
+#define ALU_FID_INDEX_S 16
+#define ALU_MAC_ADDR_HI 0xFFFF
+
+#define REG_SW_ALU_INDEX_1 0x0414
+
+#define ALU_DIRECT_INDEX_M (BIT(12) - 1)
+
+#define REG_SW_ALU_CTRL__4 0x0418
+
+#define ALU_VALID_CNT_M (BIT(14) - 1)
+#define ALU_VALID_CNT_S 16
+#define ALU_START BIT(7)
+#define ALU_VALID BIT(6)
+#define ALU_DIRECT BIT(2)
+#define ALU_ACTION 0x3
+#define ALU_WRITE 1
+#define ALU_READ 2
+#define ALU_SEARCH 3
+
+#define REG_SW_ALU_STAT_CTRL__4 0x041C
+
+#define ALU_STAT_INDEX_M (BIT(4) - 1)
+#define ALU_STAT_INDEX_S 16
+#define ALU_RESV_MCAST_INDEX_M (BIT(6) - 1)
+#define ALU_STAT_START BIT(7)
+#define ALU_RESV_MCAST_ADDR BIT(1)
+#define ALU_STAT_READ BIT(0)
+
+#define REG_SW_ALU_VAL_A 0x0420
+
+#define ALU_V_STATIC_VALID BIT(31)
+#define ALU_V_SRC_FILTER BIT(30)
+#define ALU_V_DST_FILTER BIT(29)
+#define ALU_V_PRIO_AGE_CNT_M (BIT(3) - 1)
+#define ALU_V_PRIO_AGE_CNT_S 26
+#define ALU_V_MSTP_M 0x7
+
+#define REG_SW_ALU_VAL_B 0x0424
+
+#define ALU_V_OVERRIDE BIT(31)
+#define ALU_V_USE_FID BIT(30)
+#define ALU_V_PORT_MAP (BIT(24) - 1)
+
+#define REG_SW_ALU_VAL_C 0x0428
+
+#define ALU_V_FID_M (BIT(16) - 1)
+#define ALU_V_FID_S 16
+#define ALU_V_MAC_ADDR_HI 0xFFFF
+
+#define REG_SW_ALU_VAL_D 0x042C
+
+#define REG_HSR_ALU_INDEX_0 0x0440
+
+#define REG_HSR_ALU_INDEX_1 0x0444
+
+#define HSR_DST_MAC_INDEX_LO_S 16
+#define HSR_SRC_MAC_INDEX_HI 0xFFFF
+
+#define REG_HSR_ALU_INDEX_2 0x0448
+
+#define HSR_INDEX_MAX BIT(9)
+#define HSR_DIRECT_INDEX_M (HSR_INDEX_MAX - 1)
+
+#define REG_HSR_ALU_INDEX_3 0x044C
+
+#define HSR_PATH_INDEX_M (BIT(4) - 1)
+
+#define REG_HSR_ALU_CTRL__4 0x0450
+
+#define HSR_VALID_CNT_M (BIT(14) - 1)
+#define HSR_VALID_CNT_S 16
+#define HSR_START BIT(7)
+#define HSR_VALID BIT(6)
+#define HSR_SEARCH_END BIT(5)
+#define HSR_DIRECT BIT(2)
+#define HSR_ACTION 0x3
+#define HSR_WRITE 1
+#define HSR_READ 2
+#define HSR_SEARCH 3
+
+#define REG_HSR_ALU_VAL_A 0x0454
+
+#define HSR_V_STATIC_VALID BIT(31)
+#define HSR_V_AGE_CNT_M (BIT(3) - 1)
+#define HSR_V_AGE_CNT_S 26
+#define HSR_V_PATH_ID_M (BIT(4) - 1)
+
+#define REG_HSR_ALU_VAL_B 0x0458
+
+#define REG_HSR_ALU_VAL_C 0x045C
+
+#define HSR_V_DST_MAC_ADDR_LO_S 16
+#define HSR_V_SRC_MAC_ADDR_HI 0xFFFF
+
+#define REG_HSR_ALU_VAL_D 0x0460
+
+#define REG_HSR_ALU_VAL_E 0x0464
+
+#define HSR_V_START_SEQ_1_S 16
+#define HSR_V_START_SEQ_2_S 0
+
+#define REG_HSR_ALU_VAL_F 0x0468
+
+#define HSR_V_EXP_SEQ_1_S 16
+#define HSR_V_EXP_SEQ_2_S 0
+
+#define REG_HSR_ALU_VAL_G 0x046C
+
+#define HSR_V_SEQ_CNT_1_S 16
+#define HSR_V_SEQ_CNT_2_S 0
+
+#define HSR_V_SEQ_M (BIT(16) - 1)
+
+/* 5 - PTP Clock */
+#define REG_PTP_CLK_CTRL 0x0500
+
+#define PTP_STEP_ADJ BIT(6)
+#define PTP_STEP_DIR BIT(5)
+#define PTP_READ_TIME BIT(4)
+#define PTP_LOAD_TIME BIT(3)
+#define PTP_CLK_ADJ_ENABLE BIT(2)
+#define PTP_CLK_ENABLE BIT(1)
+#define PTP_CLK_RESET BIT(0)
+
+#define REG_PTP_RTC_SUB_NANOSEC__2 0x0502
+
+#define PTP_RTC_SUB_NANOSEC_M 0x0007
+
+#define REG_PTP_RTC_NANOSEC 0x0504
+#define REG_PTP_RTC_NANOSEC_H 0x0504
+#define REG_PTP_RTC_NANOSEC_L 0x0506
+
+#define REG_PTP_RTC_SEC 0x0508
+#define REG_PTP_RTC_SEC_H 0x0508
+#define REG_PTP_RTC_SEC_L 0x050A
+
+#define REG_PTP_SUBNANOSEC_RATE 0x050C
+#define REG_PTP_SUBNANOSEC_RATE_H 0x050C
+
+#define PTP_RATE_DIR BIT(31)
+#define PTP_TMP_RATE_ENABLE BIT(30)
+
+#define REG_PTP_SUBNANOSEC_RATE_L 0x050E
+
+#define REG_PTP_RATE_DURATION 0x0510
+#define REG_PTP_RATE_DURATION_H 0x0510
+#define REG_PTP_RATE_DURATION_L 0x0512
+
+#define REG_PTP_MSG_CONF1 0x0514
+
+#define PTP_802_1AS BIT(7)
+#define PTP_ENABLE BIT(6)
+#define PTP_ETH_ENABLE BIT(5)
+#define PTP_IPV4_UDP_ENABLE BIT(4)
+#define PTP_IPV6_UDP_ENABLE BIT(3)
+#define PTP_TC_P2P BIT(2)
+#define PTP_MASTER BIT(1)
+#define PTP_1STEP BIT(0)
+
+#define REG_PTP_MSG_CONF2 0x0516
+
+#define PTP_UNICAST_ENABLE BIT(12)
+#define PTP_ALTERNATE_MASTER BIT(11)
+#define PTP_ALL_HIGH_PRIO BIT(10)
+#define PTP_SYNC_CHECK BIT(9)
+#define PTP_DELAY_CHECK BIT(8)
+#define PTP_PDELAY_CHECK BIT(7)
+#define PTP_DROP_SYNC_DELAY_REQ BIT(5)
+#define PTP_DOMAIN_CHECK BIT(4)
+#define PTP_UDP_CHECKSUM BIT(2)
+
+#define REG_PTP_DOMAIN_VERSION 0x0518
+#define PTP_VERSION_M 0xFF00
+#define PTP_DOMAIN_M 0x00FF
+
+#define REG_PTP_UNIT_INDEX__4 0x0520
+
+#define PTP_UNIT_M 0xF
+
+#define PTP_GPIO_INDEX_S 16
+#define PTP_TSI_INDEX_S 8
+#define PTP_TOU_INDEX_S 0
+
+#define REG_PTP_TRIG_STATUS__4 0x0524
+
+#define TRIG_ERROR_S 16
+#define TRIG_DONE_S 0
+
+#define REG_PTP_INT_STATUS__4 0x0528
+
+#define TRIG_INT_S 16
+#define TS_INT_S 0
+
+#define TRIG_UNIT_M 0x7
+#define TS_UNIT_M 0x3
+
+#define REG_PTP_CTRL_STAT__4 0x052C
+
+#define GPIO_IN BIT(7)
+#define GPIO_OUT BIT(6)
+#define TS_INT_ENABLE BIT(5)
+#define TRIG_ACTIVE BIT(4)
+#define TRIG_ENABLE BIT(3)
+#define TRIG_RESET BIT(2)
+#define TS_ENABLE BIT(1)
+#define TS_RESET BIT(0)
+
+#define GPIO_CTRL_M (GPIO_IN | GPIO_OUT)
+
+#define TRIG_CTRL_M \
+ (TRIG_ACTIVE | TRIG_ENABLE | TRIG_RESET)
+
+#define TS_CTRL_M \
+ (TS_INT_ENABLE | TS_ENABLE | TS_RESET)
+
+#define REG_TRIG_TARGET_NANOSEC 0x0530
+#define REG_TRIG_TARGET_SEC 0x0534
+
+#define REG_TRIG_CTRL__4 0x0538
+
+#define TRIG_CASCADE_ENABLE BIT(31)
+#define TRIG_CASCADE_TAIL BIT(30)
+#define TRIG_CASCADE_UPS_M 0xF
+#define TRIG_CASCADE_UPS_S 26
+#define TRIG_NOW BIT(25)
+#define TRIG_NOTIFY BIT(24)
+#define TRIG_EDGE BIT(23)
+#define TRIG_PATTERN_S 20
+#define TRIG_PATTERN_M 0x7
+#define TRIG_NEG_EDGE 0
+#define TRIG_POS_EDGE 1
+#define TRIG_NEG_PULSE 2
+#define TRIG_POS_PULSE 3
+#define TRIG_NEG_PERIOD 4
+#define TRIG_POS_PERIOD 5
+#define TRIG_REG_OUTPUT 6
+#define TRIG_GPO_S 16
+#define TRIG_GPO_M 0xF
+#define TRIG_CASCADE_ITERATE_CNT_M 0xFFFF
+
+#define REG_TRIG_CYCLE_WIDTH 0x053C
+
+#define REG_TRIG_CYCLE_CNT 0x0540
+
+#define TRIG_CYCLE_CNT_M 0xFFFF
+#define TRIG_CYCLE_CNT_S 16
+#define TRIG_BIT_PATTERN_M 0xFFFF
+
+#define REG_TRIG_ITERATE_TIME 0x0544
+
+#define REG_TRIG_PULSE_WIDTH__4 0x0548
+
+#define TRIG_PULSE_WIDTH_M 0x00FFFFFF
+
+#define REG_TS_CTRL_STAT__4 0x0550
+
+#define TS_EVENT_DETECT_M 0xF
+#define TS_EVENT_DETECT_S 17
+#define TS_EVENT_OVERFLOW BIT(16)
+#define TS_GPI_M 0xF
+#define TS_GPI_S 8
+#define TS_DETECT_RISE BIT(7)
+#define TS_DETECT_FALL BIT(6)
+#define TS_DETECT_S 6
+#define TS_CASCADE_TAIL BIT(5)
+#define TS_CASCADE_UPS_M 0xF
+#define TS_CASCADE_UPS_S 1
+#define TS_CASCADE_ENABLE BIT(0)
+
+#define DETECT_RISE (TS_DETECT_RISE >> TS_DETECT_S)
+#define DETECT_FALL (TS_DETECT_FALL >> TS_DETECT_S)
+
+#define REG_TS_EVENT_0_NANOSEC 0x0554
+#define REG_TS_EVENT_0_SEC 0x0558
+#define REG_TS_EVENT_0_SUB_NANOSEC 0x055C
+
+#define REG_TS_EVENT_1_NANOSEC 0x0560
+#define REG_TS_EVENT_1_SEC 0x0564
+#define REG_TS_EVENT_1_SUB_NANOSEC 0x0568
+
+#define REG_TS_EVENT_2_NANOSEC 0x056C
+#define REG_TS_EVENT_2_SEC 0x0570
+#define REG_TS_EVENT_2_SUB_NANOSEC 0x0574
+
+#define REG_TS_EVENT_3_NANOSEC 0x0578
+#define REG_TS_EVENT_3_SEC 0x057C
+#define REG_TS_EVENT_3_SUB_NANOSEC 0x0580
+
+#define REG_TS_EVENT_4_NANOSEC 0x0584
+#define REG_TS_EVENT_4_SEC 0x0588
+#define REG_TS_EVENT_4_SUB_NANOSEC 0x058C
+
+#define REG_TS_EVENT_5_NANOSEC 0x0590
+#define REG_TS_EVENT_5_SEC 0x0594
+#define REG_TS_EVENT_5_SUB_NANOSEC 0x0598
+
+#define REG_TS_EVENT_6_NANOSEC 0x059C
+#define REG_TS_EVENT_6_SEC 0x05A0
+#define REG_TS_EVENT_6_SUB_NANOSEC 0x05A4
+
+#define REG_TS_EVENT_7_NANOSEC 0x05A8
+#define REG_TS_EVENT_7_SEC 0x05AC
+#define REG_TS_EVENT_7_SUB_NANOSEC 0x05B0
+
+#define TS_EVENT_EDGE_M 0x1
+#define TS_EVENT_EDGE_S 30
+#define TS_EVENT_NANOSEC_M (BIT(30) - 1)
+
+#define TS_EVENT_SUB_NANOSEC_M 0x7
+
+#define TS_EVENT_SAMPLE \
+ (REG_TS_EVENT_1_NANOSEC - REG_TS_EVENT_0_NANOSEC)
+
+#define PORT_CTRL_ADDR(port, addr) ((addr) | (((port) + 1) << 12))
+
+#define REG_GLOBAL_RR_INDEX__1 0x0600
+
+/* DLR */
+#define REG_DLR_SRC_PORT__4 0x0604
+
+#define DLR_SRC_PORT_UNICAST BIT(31)
+#define DLR_SRC_PORT_M 0x3
+#define DLR_SRC_PORT_BOTH 0
+#define DLR_SRC_PORT_EACH 1
+
+#define REG_DLR_IP_ADDR__4 0x0608
+
+#define REG_DLR_CTRL__1 0x0610
+
+#define DLR_RESET_SEQ_ID BIT(3)
+#define DLR_BACKUP_AUTO_ON BIT(2)
+#define DLR_BEACON_TX_ENABLE BIT(1)
+#define DLR_ASSIST_ENABLE BIT(0)
+
+#define REG_DLR_STATE__1 0x0611
+
+#define DLR_NODE_STATE_M 0x3
+#define DLR_NODE_STATE_S 1
+#define DLR_NODE_STATE_IDLE 0
+#define DLR_NODE_STATE_FAULT 1
+#define DLR_NODE_STATE_NORMAL 2
+#define DLR_RING_STATE_FAULT 0
+#define DLR_RING_STATE_NORMAL 1
+
+#define REG_DLR_PRECEDENCE__1 0x0612
+
+#define REG_DLR_BEACON_INTERVAL__4 0x0614
+
+#define REG_DLR_BEACON_TIMEOUT__4 0x0618
+
+#define REG_DLR_TIMEOUT_WINDOW__4 0x061C
+
+#define DLR_TIMEOUT_WINDOW_M (BIT(22) - 1)
+
+#define REG_DLR_VLAN_ID__2 0x0620
+
+#define DLR_VLAN_ID_M (BIT(12) - 1)
+
+#define REG_DLR_DEST_ADDR_0 0x0622
+#define REG_DLR_DEST_ADDR_1 0x0623
+#define REG_DLR_DEST_ADDR_2 0x0624
+#define REG_DLR_DEST_ADDR_3 0x0625
+#define REG_DLR_DEST_ADDR_4 0x0626
+#define REG_DLR_DEST_ADDR_5 0x0627
+
+#define REG_DLR_PORT_MAP__4 0x0628
+
+#define REG_DLR_CLASS__1 0x062C
+
+#define DLR_FRAME_QID_M 0x3
+
+/* HSR */
+#define REG_HSR_PORT_MAP__4 0x0640
+
+#define REG_HSR_ALU_CTRL_0__1 0x0644
+
+#define HSR_DUPLICATE_DISCARD BIT(7)
+#define HSR_NODE_UNICAST BIT(6)
+#define HSR_AGE_CNT_DEFAULT_M 0x7
+#define HSR_AGE_CNT_DEFAULT_S 3
+#define HSR_LEARN_MCAST_DISABLE BIT(2)
+#define HSR_HASH_OPTION_M 0x3
+#define HSR_HASH_DISABLE 0
+#define HSR_HASH_UPPER_BITS 1
+#define HSR_HASH_LOWER_BITS 2
+#define HSR_HASH_XOR_BOTH_BITS 3
+
+#define REG_HSR_ALU_CTRL_1__1 0x0645
+
+#define HSR_LEARN_UCAST_DISABLE BIT(7)
+#define HSR_FLUSH_TABLE BIT(5)
+#define HSR_PROC_MCAST_SRC BIT(3)
+#define HSR_AGING_ENABLE BIT(2)
+
+#define REG_HSR_ALU_CTRL_2__2 0x0646
+
+#define REG_HSR_ALU_AGE_PERIOD__4 0x0648
+
+#define REG_HSR_ALU_INT_STATUS__1 0x064C
+#define REG_HSR_ALU_INT_MASK__1 0x064D
+
+#define HSR_WINDOW_OVERFLOW_INT BIT(3)
+#define HSR_LEARN_FAIL_INT BIT(2)
+#define HSR_ALMOST_FULL_INT BIT(1)
+#define HSR_WRITE_FAIL_INT BIT(0)
+
+#define REG_HSR_ALU_ENTRY_0__2 0x0650
+
+#define HSR_ENTRY_INDEX_M (BIT(10) - 1)
+#define HSR_FAIL_INDEX_M (BIT(8) - 1)
+
+#define REG_HSR_ALU_ENTRY_1__2 0x0652
+
+#define HSR_FAIL_LEARN_INDEX_M (BIT(8) - 1)
+
+#define REG_HSR_ALU_ENTRY_3__2 0x0654
+
+#define HSR_CPU_ACCESS_ENTRY_INDEX_M (BIT(8) - 1)
+
+/* 0 - Operation */
+#define REG_PORT_DEFAULT_VID 0x0000
+
+#define REG_PORT_CUSTOM_VID 0x0002
+#define REG_PORT_AVB_SR_1_VID 0x0004
+#define REG_PORT_AVB_SR_2_VID 0x0006
+
+#define REG_PORT_AVB_SR_1_TYPE 0x0008
+#define REG_PORT_AVB_SR_2_TYPE 0x000A
+
+#define REG_PORT_PME_STATUS 0x0013
+#define REG_PORT_PME_CTRL 0x0017
+
+#define PME_WOL_MAGICPKT BIT(2)
+#define PME_WOL_LINKUP BIT(1)
+#define PME_WOL_ENERGY BIT(0)
+
+#define REG_PORT_INT_STATUS 0x001B
+#define REG_PORT_INT_MASK 0x001F
+
+#define PORT_SGMII_INT BIT(3)
+#define PORT_PTP_INT BIT(2)
+#define PORT_PHY_INT BIT(1)
+#define PORT_ACL_INT BIT(0)
+
+#define PORT_INT_MASK \
+ (PORT_SGMII_INT | PORT_PTP_INT | PORT_PHY_INT | PORT_ACL_INT)
+
+#define REG_PORT_CTRL_0 0x0020
+
+#define PORT_MAC_LOOPBACK BIT(7)
+#define PORT_FORCE_TX_FLOW_CTRL BIT(4)
+#define PORT_FORCE_RX_FLOW_CTRL BIT(3)
+#define PORT_TAIL_TAG_ENABLE BIT(2)
+#define PORT_QUEUE_SPLIT_ENABLE 0x3
+
+#define REG_PORT_CTRL_1 0x0021
+
+#define PORT_SRP_ENABLE 0x3
+
+#define REG_PORT_STATUS_0 0x0030
+
+#define PORT_INTF_SPEED_M 0x3
+#define PORT_INTF_SPEED_S 3
+#define PORT_INTF_FULL_DUPLEX BIT(2)
+#define PORT_TX_FLOW_CTRL BIT(1)
+#define PORT_RX_FLOW_CTRL BIT(0)
+
+#define REG_PORT_STATUS_1 0x0034
+
+/* 1 - PHY */
+#define REG_PORT_PHY_CTRL 0x0100
+
+#define PORT_PHY_RESET BIT(15)
+#define PORT_PHY_LOOPBACK BIT(14)
+#define PORT_SPEED_100MBIT BIT(13)
+#define PORT_AUTO_NEG_ENABLE BIT(12)
+#define PORT_POWER_DOWN BIT(11)
+#define PORT_ISOLATE BIT(10)
+#define PORT_AUTO_NEG_RESTART BIT(9)
+#define PORT_FULL_DUPLEX BIT(8)
+#define PORT_COLLISION_TEST BIT(7)
+#define PORT_SPEED_1000MBIT BIT(6)
+
+#define REG_PORT_PHY_STATUS 0x0102
+
+#define PORT_100BT4_CAPABLE BIT(15)
+#define PORT_100BTX_FD_CAPABLE BIT(14)
+#define PORT_100BTX_CAPABLE BIT(13)
+#define PORT_10BT_FD_CAPABLE BIT(12)
+#define PORT_10BT_CAPABLE BIT(11)
+#define PORT_EXTENDED_STATUS BIT(8)
+#define PORT_MII_SUPPRESS_CAPABLE BIT(6)
+#define PORT_AUTO_NEG_ACKNOWLEDGE BIT(5)
+#define PORT_REMOTE_FAULT BIT(4)
+#define PORT_AUTO_NEG_CAPABLE BIT(3)
+#define PORT_LINK_STATUS BIT(2)
+#define PORT_JABBER_DETECT BIT(1)
+#define PORT_EXTENDED_CAPABILITY BIT(0)
+
+#define REG_PORT_PHY_ID_HI 0x0104
+#define REG_PORT_PHY_ID_LO 0x0106
+
+#define KSZ9477_ID_HI 0x0022
+#define KSZ9477_ID_LO 0x1622
+
+#define REG_PORT_PHY_AUTO_NEGOTIATION 0x0108
+
+#define PORT_AUTO_NEG_NEXT_PAGE BIT(15)
+#define PORT_AUTO_NEG_REMOTE_FAULT BIT(13)
+#define PORT_AUTO_NEG_ASYM_PAUSE BIT(11)
+#define PORT_AUTO_NEG_SYM_PAUSE BIT(10)
+#define PORT_AUTO_NEG_100BT4 BIT(9)
+#define PORT_AUTO_NEG_100BTX_FD BIT(8)
+#define PORT_AUTO_NEG_100BTX BIT(7)
+#define PORT_AUTO_NEG_10BT_FD BIT(6)
+#define PORT_AUTO_NEG_10BT BIT(5)
+#define PORT_AUTO_NEG_SELECTOR 0x001F
+#define PORT_AUTO_NEG_802_3 0x0001
+
+#define PORT_AUTO_NEG_PAUSE \
+ (PORT_AUTO_NEG_ASYM_PAUSE | PORT_AUTO_NEG_SYM_PAUSE)
+
+#define REG_PORT_PHY_REMOTE_CAPABILITY 0x010A
+
+#define PORT_REMOTE_NEXT_PAGE BIT(15)
+#define PORT_REMOTE_ACKNOWLEDGE BIT(14)
+#define PORT_REMOTE_REMOTE_FAULT BIT(13)
+#define PORT_REMOTE_ASYM_PAUSE BIT(11)
+#define PORT_REMOTE_SYM_PAUSE BIT(10)
+#define PORT_REMOTE_100BTX_FD BIT(8)
+#define PORT_REMOTE_100BTX BIT(7)
+#define PORT_REMOTE_10BT_FD BIT(6)
+#define PORT_REMOTE_10BT BIT(5)
+
+#define REG_PORT_PHY_1000_CTRL 0x0112
+
+#define PORT_AUTO_NEG_MANUAL BIT(12)
+#define PORT_AUTO_NEG_MASTER BIT(11)
+#define PORT_AUTO_NEG_MASTER_PREFERRED BIT(10)
+#define PORT_AUTO_NEG_1000BT_FD BIT(9)
+#define PORT_AUTO_NEG_1000BT BIT(8)
+
+#define REG_PORT_PHY_1000_STATUS 0x0114
+
+#define PORT_MASTER_FAULT BIT(15)
+#define PORT_LOCAL_MASTER BIT(14)
+#define PORT_LOCAL_RX_OK BIT(13)
+#define PORT_REMOTE_RX_OK BIT(12)
+#define PORT_REMOTE_1000BT_FD BIT(11)
+#define PORT_REMOTE_1000BT BIT(10)
+#define PORT_REMOTE_IDLE_CNT_M 0x0F
+
+#define PORT_PHY_1000_STATIC_STATUS \
+ (PORT_LOCAL_RX_OK | \
+ PORT_REMOTE_RX_OK | \
+ PORT_REMOTE_1000BT_FD | \
+ PORT_REMOTE_1000BT)
+
+#define REG_PORT_PHY_MMD_SETUP 0x011A
+
+#define PORT_MMD_OP_MODE_M 0x3
+#define PORT_MMD_OP_MODE_S 14
+#define PORT_MMD_OP_INDEX 0
+#define PORT_MMD_OP_DATA_NO_INCR 1
+#define PORT_MMD_OP_DATA_INCR_RW 2
+#define PORT_MMD_OP_DATA_INCR_W 3
+#define PORT_MMD_DEVICE_ID_M 0x1F
+
+#define MMD_SETUP(mode, dev) \
+ (((u16)(mode) << PORT_MMD_OP_MODE_S) | (dev))
+
+#define REG_PORT_PHY_MMD_INDEX_DATA 0x011C
+
+#define MMD_DEVICE_ID_DSP 1
+
+#define MMD_DSP_SQI_CHAN_A 0xAC
+#define MMD_DSP_SQI_CHAN_B 0xAD
+#define MMD_DSP_SQI_CHAN_C 0xAE
+#define MMD_DSP_SQI_CHAN_D 0xAF
+
+#define DSP_SQI_ERR_DETECTED BIT(15)
+#define DSP_SQI_AVG_ERR 0x7FFF
+
+#define MMD_DEVICE_ID_COMMON 2
+
+#define MMD_DEVICE_ID_EEE_ADV 7
+
+#define MMD_EEE_ADV 0x3C
+#define EEE_ADV_100MBIT BIT(1)
+#define EEE_ADV_1GBIT BIT(2)
+
+#define MMD_EEE_LP_ADV 0x3D
+#define MMD_EEE_MSG_CODE 0x3F
+
+#define MMD_DEVICE_ID_AFED 0x1C
+
+#define REG_PORT_PHY_EXTENDED_STATUS 0x011E
+
+#define PORT_100BTX_FD_ABLE BIT(15)
+#define PORT_100BTX_ABLE BIT(14)
+#define PORT_10BT_FD_ABLE BIT(13)
+#define PORT_10BT_ABLE BIT(12)
+
+#define REG_PORT_SGMII_ADDR__4 0x0200
+#define PORT_SGMII_AUTO_INCR BIT(23)
+#define PORT_SGMII_DEVICE_ID_M 0x1F
+#define PORT_SGMII_DEVICE_ID_S 16
+#define PORT_SGMII_ADDR_M (BIT(21) - 1)
+
+#define REG_PORT_SGMII_DATA__4 0x0204
+#define PORT_SGMII_DATA_M (BIT(16) - 1)
+
+#define MMD_DEVICE_ID_PMA 0x01
+#define MMD_DEVICE_ID_PCS 0x03
+#define MMD_DEVICE_ID_PHY_XS 0x04
+#define MMD_DEVICE_ID_DTE_XS 0x05
+#define MMD_DEVICE_ID_AN 0x07
+#define MMD_DEVICE_ID_VENDOR_CTRL 0x1E
+#define MMD_DEVICE_ID_VENDOR_MII 0x1F
+
+#define SR_MII MMD_DEVICE_ID_VENDOR_MII
+
+#define MMD_SR_MII_CTRL 0x0000
+
+#define SR_MII_RESET BIT(15)
+#define SR_MII_LOOPBACK BIT(14)
+#define SR_MII_SPEED_100MBIT BIT(13)
+#define SR_MII_AUTO_NEG_ENABLE BIT(12)
+#define SR_MII_POWER_DOWN BIT(11)
+#define SR_MII_AUTO_NEG_RESTART BIT(9)
+#define SR_MII_FULL_DUPLEX BIT(8)
+#define SR_MII_SPEED_1000MBIT BIT(6)
+
+#define MMD_SR_MII_STATUS 0x0001
+#define MMD_SR_MII_ID_1 0x0002
+#define MMD_SR_MII_ID_2 0x0003
+#define MMD_SR_MII_AUTO_NEGOTIATION 0x0004
+
+#define SR_MII_AUTO_NEG_NEXT_PAGE BIT(15)
+#define SR_MII_AUTO_NEG_REMOTE_FAULT_M 0x3
+#define SR_MII_AUTO_NEG_REMOTE_FAULT_S 12
+#define SR_MII_AUTO_NEG_NO_ERROR 0
+#define SR_MII_AUTO_NEG_OFFLINE 1
+#define SR_MII_AUTO_NEG_LINK_FAILURE 2
+#define SR_MII_AUTO_NEG_ERROR 3
+#define SR_MII_AUTO_NEG_PAUSE_M 0x3
+#define SR_MII_AUTO_NEG_PAUSE_S 7
+#define SR_MII_AUTO_NEG_NO_PAUSE 0
+#define SR_MII_AUTO_NEG_ASYM_PAUSE_TX 1
+#define SR_MII_AUTO_NEG_SYM_PAUSE 2
+#define SR_MII_AUTO_NEG_ASYM_PAUSE_RX 3
+#define SR_MII_AUTO_NEG_HALF_DUPLEX BIT(6)
+#define SR_MII_AUTO_NEG_FULL_DUPLEX BIT(5)
+
+#define MMD_SR_MII_REMOTE_CAPABILITY 0x0005
+#define MMD_SR_MII_AUTO_NEG_EXP 0x0006
+#define MMD_SR_MII_AUTO_NEG_EXT 0x000F
+
+#define MMD_SR_MII_DIGITAL_CTRL_1 0x8000
+
+#define MMD_SR_MII_AUTO_NEG_CTRL 0x8001
+
+#define SR_MII_8_BIT BIT(8)
+#define SR_MII_SGMII_LINK_UP BIT(4)
+#define SR_MII_TX_CFG_PHY_MASTER BIT(3)
+#define SR_MII_PCS_MODE_M 0x3
+#define SR_MII_PCS_MODE_S 1
+#define SR_MII_PCS_SGMII 2
+#define SR_MII_AUTO_NEG_COMPLETE_INTR BIT(0)
+
+#define MMD_SR_MII_AUTO_NEG_STATUS 0x8002
+
+#define SR_MII_STAT_LINK_UP BIT(4)
+#define SR_MII_STAT_M 0x3
+#define SR_MII_STAT_S 2
+#define SR_MII_STAT_10_MBPS 0
+#define SR_MII_STAT_100_MBPS 1
+#define SR_MII_STAT_1000_MBPS 2
+#define SR_MII_STAT_FULL_DUPLEX BIT(1)
+
+#define MMD_SR_MII_PHY_CTRL 0x80A0
+
+#define SR_MII_PHY_LANE_SEL_M 0xF
+#define SR_MII_PHY_LANE_SEL_S 8
+#define SR_MII_PHY_WRITE BIT(1)
+#define SR_MII_PHY_START_BUSY BIT(0)
+
+#define MMD_SR_MII_PHY_ADDR 0x80A1
+
+#define SR_MII_PHY_ADDR_M (BIT(16) - 1)
+
+#define MMD_SR_MII_PHY_DATA 0x80A2
+
+#define SR_MII_PHY_DATA_M (BIT(16) - 1)
+
+#define SR_MII_PHY_JTAG_CHIP_ID_HI 0x000C
+#define SR_MII_PHY_JTAG_CHIP_ID_LO 0x000D
+
+#define REG_PORT_PHY_REMOTE_LB_LED 0x0122
+
+#define PORT_REMOTE_LOOPBACK BIT(8)
+#define PORT_LED_SELECT (3 << 6)
+#define PORT_LED_CTRL (3 << 4)
+#define PORT_LED_CTRL_TEST BIT(3)
+#define PORT_10BT_PREAMBLE BIT(2)
+#define PORT_LINK_MD_10BT_ENABLE BIT(1)
+#define PORT_LINK_MD_PASS BIT(0)
+
+#define REG_PORT_PHY_LINK_MD 0x0124
+
+#define PORT_START_CABLE_DIAG BIT(15)
+#define PORT_TX_DISABLE BIT(14)
+#define PORT_CABLE_DIAG_PAIR_M 0x3
+#define PORT_CABLE_DIAG_PAIR_S 12
+#define PORT_CABLE_DIAG_SELECT_M 0x3
+#define PORT_CABLE_DIAG_SELECT_S 10
+#define PORT_CABLE_DIAG_RESULT_M 0x3
+#define PORT_CABLE_DIAG_RESULT_S 8
+#define PORT_CABLE_STAT_NORMAL 0
+#define PORT_CABLE_STAT_OPEN 1
+#define PORT_CABLE_STAT_SHORT 2
+#define PORT_CABLE_STAT_FAILED 3
+#define PORT_CABLE_FAULT_COUNTER 0x00FF
+
+#define REG_PORT_PHY_PMA_STATUS 0x0126
+
+#define PORT_1000_LINK_GOOD BIT(1)
+#define PORT_100_LINK_GOOD BIT(0)
+
+#define REG_PORT_PHY_DIGITAL_STATUS 0x0128
+
+#define PORT_LINK_DETECT BIT(14)
+#define PORT_SIGNAL_DETECT BIT(13)
+#define PORT_PHY_STAT_MDI BIT(12)
+#define PORT_PHY_STAT_MASTER BIT(11)
+
+#define REG_PORT_PHY_RXER_COUNTER 0x012A
+
+#define REG_PORT_PHY_INT_ENABLE 0x0136
+#define REG_PORT_PHY_INT_STATUS 0x0137
+
+#define JABBER_INT BIT(7)
+#define RX_ERR_INT BIT(6)
+#define PAGE_RX_INT BIT(5)
+#define PARALLEL_DETECT_FAULT_INT BIT(4)
+#define LINK_PARTNER_ACK_INT BIT(3)
+#define LINK_DOWN_INT BIT(2)
+#define REMOTE_FAULT_INT BIT(1)
+#define LINK_UP_INT BIT(0)
+
+#define REG_PORT_PHY_DIGITAL_DEBUG_1 0x0138
+
+#define PORT_REG_CLK_SPEED_25_MHZ BIT(14)
+#define PORT_PHY_FORCE_MDI BIT(7)
+#define PORT_PHY_AUTO_MDIX_DISABLE BIT(6)
+
+/* Same as PORT_PHY_LOOPBACK */
+#define PORT_PHY_PCS_LOOPBACK BIT(0)
+
+#define REG_PORT_PHY_DIGITAL_DEBUG_2 0x013A
+
+#define REG_PORT_PHY_DIGITAL_DEBUG_3 0x013C
+
+#define PORT_100BT_FIXED_LATENCY BIT(15)
+
+#define REG_PORT_PHY_PHY_CTRL 0x013E
+
+#define PORT_INT_PIN_HIGH BIT(14)
+#define PORT_ENABLE_JABBER BIT(9)
+#define PORT_STAT_SPEED_1000MBIT BIT(6)
+#define PORT_STAT_SPEED_100MBIT BIT(5)
+#define PORT_STAT_SPEED_10MBIT BIT(4)
+#define PORT_STAT_FULL_DUPLEX BIT(3)
+
+/* Same as PORT_PHY_STAT_MASTER */
+#define PORT_STAT_MASTER BIT(2)
+#define PORT_RESET BIT(1)
+#define PORT_LINK_STATUS_FAIL BIT(0)
+
+/* 3 - xMII */
+#define REG_PORT_XMII_CTRL_0 0x0300
+
+#define PORT_SGMII_SEL BIT(7)
+#define PORT_MII_FULL_DUPLEX BIT(6)
+#define PORT_MII_100MBIT BIT(4)
+#define PORT_GRXC_ENABLE BIT(0)
+
+#define REG_PORT_XMII_CTRL_1 0x0301
+
+#define PORT_RMII_CLK_SEL BIT(7)
+/* S1 */
+#define PORT_MII_1000MBIT_S1 BIT(6)
+/* S2 */
+#define PORT_MII_NOT_1GBIT BIT(6)
+#define PORT_MII_SEL_EDGE BIT(5)
+#define PORT_RGMII_ID_IG_ENABLE BIT(4)
+#define PORT_RGMII_ID_EG_ENABLE BIT(3)
+#define PORT_MII_MAC_MODE BIT(2)
+#define PORT_MII_SEL_M 0x3
+/* S1 */
+#define PORT_MII_SEL_S1 0x0
+#define PORT_RMII_SEL_S1 0x1
+#define PORT_GMII_SEL_S1 0x2
+#define PORT_RGMII_SEL_S1 0x3
+/* S2 */
+#define PORT_RGMII_SEL 0x0
+#define PORT_RMII_SEL 0x1
+#define PORT_GMII_SEL 0x2
+#define PORT_MII_SEL 0x3
+
+/* 4 - MAC */
+#define REG_PORT_MAC_CTRL_0 0x0400
+
+#define PORT_BROADCAST_STORM BIT(1)
+#define PORT_JUMBO_FRAME BIT(0)
+
+#define REG_PORT_MAC_CTRL_1 0x0401
+
+#define PORT_BACK_PRESSURE BIT(3)
+#define PORT_PASS_ALL BIT(0)
+
+#define REG_PORT_MAC_CTRL_2 0x0402
+
+#define PORT_100BT_EEE_DISABLE BIT(7)
+#define PORT_1000BT_EEE_DISABLE BIT(6)
+
+#define REG_PORT_MAC_IN_RATE_LIMIT 0x0403
+
+#define PORT_IN_PORT_BASED_S 6
+#define PORT_RATE_PACKET_BASED_S 5
+#define PORT_IN_FLOW_CTRL_S 4
+#define PORT_COUNT_IFG_S 1
+#define PORT_COUNT_PREAMBLE_S 0
+#define PORT_IN_PORT_BASED BIT(6)
+#define PORT_IN_PACKET_BASED BIT(5)
+#define PORT_IN_FLOW_CTRL BIT(4)
+#define PORT_IN_LIMIT_MODE_M 0x3
+#define PORT_IN_LIMIT_MODE_S 2
+#define PORT_IN_ALL 0
+#define PORT_IN_UNICAST 1
+#define PORT_IN_MULTICAST 2
+#define PORT_IN_BROADCAST 3
+#define PORT_COUNT_IFG BIT(1)
+#define PORT_COUNT_PREAMBLE BIT(0)
+
+#define REG_PORT_IN_RATE_0 0x0410
+#define REG_PORT_IN_RATE_1 0x0411
+#define REG_PORT_IN_RATE_2 0x0412
+#define REG_PORT_IN_RATE_3 0x0413
+#define REG_PORT_IN_RATE_4 0x0414
+#define REG_PORT_IN_RATE_5 0x0415
+#define REG_PORT_IN_RATE_6 0x0416
+#define REG_PORT_IN_RATE_7 0x0417
+
+#define REG_PORT_OUT_RATE_0 0x0420
+#define REG_PORT_OUT_RATE_1 0x0421
+#define REG_PORT_OUT_RATE_2 0x0422
+#define REG_PORT_OUT_RATE_3 0x0423
+
+#define PORT_RATE_LIMIT_M (BIT(7) - 1)
+
+/* 5 - MIB Counters */
+#define REG_PORT_MIB_CTRL_STAT__4 0x0500
+
+#define MIB_COUNTER_OVERFLOW BIT(31)
+#define MIB_COUNTER_VALID BIT(30)
+#define MIB_COUNTER_READ BIT(25)
+#define MIB_COUNTER_FLUSH_FREEZE BIT(24)
+#define MIB_COUNTER_INDEX_M (BIT(8) - 1)
+#define MIB_COUNTER_INDEX_S 16
+#define MIB_COUNTER_DATA_HI_M 0xF
+
+#define REG_PORT_MIB_DATA 0x0504
+
+/* 6 - ACL */
+#define REG_PORT_ACL_0 0x0600
+
+#define ACL_FIRST_RULE_M 0xF
+
+#define REG_PORT_ACL_1 0x0601
+
+#define ACL_MODE_M 0x3
+#define ACL_MODE_S 4
+#define ACL_MODE_DISABLE 0
+#define ACL_MODE_LAYER_2 1
+#define ACL_MODE_LAYER_3 2
+#define ACL_MODE_LAYER_4 3
+#define ACL_ENABLE_M 0x3
+#define ACL_ENABLE_S 2
+#define ACL_ENABLE_2_COUNT 0
+#define ACL_ENABLE_2_TYPE 1
+#define ACL_ENABLE_2_MAC 2
+#define ACL_ENABLE_2_BOTH 3
+#define ACL_ENABLE_3_IP 1
+#define ACL_ENABLE_3_SRC_DST_COMP 2
+#define ACL_ENABLE_4_PROTOCOL 0
+#define ACL_ENABLE_4_TCP_PORT_COMP 1
+#define ACL_ENABLE_4_UDP_PORT_COMP 2
+#define ACL_ENABLE_4_TCP_SEQN_COMP 3
+#define ACL_SRC BIT(1)
+#define ACL_EQUAL BIT(0)
+
+#define REG_PORT_ACL_2 0x0602
+#define REG_PORT_ACL_3 0x0603
+
+#define ACL_MAX_PORT 0xFFFF
+
+#define REG_PORT_ACL_4 0x0604
+#define REG_PORT_ACL_5 0x0605
+
+#define ACL_MIN_PORT 0xFFFF
+#define ACL_IP_ADDR 0xFFFFFFFF
+#define ACL_TCP_SEQNUM 0xFFFFFFFF
+
+#define REG_PORT_ACL_6 0x0606
+
+#define ACL_RESERVED 0xF8
+#define ACL_PORT_MODE_M 0x3
+#define ACL_PORT_MODE_S 1
+#define ACL_PORT_MODE_DISABLE 0
+#define ACL_PORT_MODE_EITHER 1
+#define ACL_PORT_MODE_IN_RANGE 2
+#define ACL_PORT_MODE_OUT_OF_RANGE 3
+
+#define REG_PORT_ACL_7 0x0607
+
+#define ACL_TCP_FLAG_ENABLE BIT(0)
+
+#define REG_PORT_ACL_8 0x0608
+
+#define ACL_TCP_FLAG_M 0xFF
+
+#define REG_PORT_ACL_9 0x0609
+
+#define ACL_TCP_FLAG 0xFF
+#define ACL_ETH_TYPE 0xFFFF
+#define ACL_IP_M 0xFFFFFFFF
+
+#define REG_PORT_ACL_A 0x060A
+
+#define ACL_PRIO_MODE_M 0x3
+#define ACL_PRIO_MODE_S 6
+#define ACL_PRIO_MODE_DISABLE 0
+#define ACL_PRIO_MODE_HIGHER 1
+#define ACL_PRIO_MODE_LOWER 2
+#define ACL_PRIO_MODE_REPLACE 3
+#define ACL_PRIO_M KS_PRIO_M
+#define ACL_PRIO_S 3
+#define ACL_VLAN_PRIO_REPLACE BIT(2)
+#define ACL_VLAN_PRIO_M KS_PRIO_M
+#define ACL_VLAN_PRIO_HI_M 0x3
+
+#define REG_PORT_ACL_B 0x060B
+
+#define ACL_VLAN_PRIO_LO_M 0x8
+#define ACL_VLAN_PRIO_S 7
+#define ACL_MAP_MODE_M 0x3
+#define ACL_MAP_MODE_S 5
+#define ACL_MAP_MODE_DISABLE 0
+#define ACL_MAP_MODE_OR 1
+#define ACL_MAP_MODE_AND 2
+#define ACL_MAP_MODE_REPLACE 3
+
+#define ACL_CNT_M (BIT(11) - 1)
+#define ACL_CNT_S 5
+
+#define REG_PORT_ACL_C 0x060C
+
+#define REG_PORT_ACL_D 0x060D
+#define ACL_MSEC_UNIT BIT(6)
+#define ACL_INTR_MODE BIT(5)
+#define ACL_PORT_MAP 0x7F
+
+#define REG_PORT_ACL_E 0x060E
+#define REG_PORT_ACL_F 0x060F
+
+#define REG_PORT_ACL_BYTE_EN_MSB 0x0610
+#define REG_PORT_ACL_BYTE_EN_LSB 0x0611
+
+#define ACL_ACTION_START 0xA
+#define ACL_ACTION_LEN 4
+#define ACL_INTR_CNT_START 0xD
+#define ACL_RULESET_START 0xE
+#define ACL_RULESET_LEN 2
+#define ACL_TABLE_LEN 16
+
+#define ACL_ACTION_ENABLE 0x003C
+#define ACL_MATCH_ENABLE 0x7FC3
+#define ACL_RULESET_ENABLE 0x8003
+#define ACL_BYTE_ENABLE 0xFFFF
+
+#define REG_PORT_ACL_CTRL_0 0x0612
+
+#define PORT_ACL_WRITE_DONE BIT(6)
+#define PORT_ACL_READ_DONE BIT(5)
+#define PORT_ACL_WRITE BIT(4)
+#define PORT_ACL_INDEX_M 0xF
+
+#define REG_PORT_ACL_CTRL_1 0x0613
+
+/* 8 - Classification and Policing */
+#define REG_PORT_MRI_MIRROR_CTRL 0x0800
+
+#define PORT_MIRROR_RX BIT(6)
+#define PORT_MIRROR_TX BIT(5)
+#define PORT_MIRROR_SNIFFER BIT(1)
+
+#define REG_PORT_MRI_PRIO_CTRL 0x0801
+
+#define PORT_HIGHEST_PRIO BIT(7)
+#define PORT_OR_PRIO BIT(6)
+#define PORT_MAC_PRIO_ENABLE BIT(4)
+#define PORT_VLAN_PRIO_ENABLE BIT(3)
+#define PORT_802_1P_PRIO_ENABLE BIT(2)
+#define PORT_DIFFSERV_PRIO_ENABLE BIT(1)
+#define PORT_ACL_PRIO_ENABLE BIT(0)
+
+#define REG_PORT_MRI_MAC_CTRL 0x0802
+
+#define PORT_USER_PRIO_CEILING BIT(7)
+#define PORT_DROP_NON_VLAN BIT(4)
+#define PORT_DROP_TAG BIT(3)
+#define PORT_BASED_PRIO_M KS_PRIO_M
+#define PORT_BASED_PRIO_S 0
+
+#define REG_PORT_MRI_AUTHEN_CTRL 0x0803
+
+#define PORT_ACL_ENABLE BIT(2)
+#define PORT_AUTHEN_MODE 0x3
+#define PORT_AUTHEN_PASS 0
+#define PORT_AUTHEN_BLOCK 1
+#define PORT_AUTHEN_TRAP 2
+
+#define REG_PORT_MRI_INDEX__4 0x0804
+
+#define MRI_INDEX_P_M 0x7
+#define MRI_INDEX_P_S 16
+#define MRI_INDEX_Q_M 0x3
+#define MRI_INDEX_Q_S 0
+
+#define REG_PORT_MRI_TC_MAP__4 0x0808
+
+#define PORT_TC_MAP_M 0xf
+#define PORT_TC_MAP_S 4
+
+#define REG_PORT_MRI_POLICE_CTRL__4 0x080C
+
+#define POLICE_DROP_ALL BIT(10)
+#define POLICE_PACKET_TYPE_M 0x3
+#define POLICE_PACKET_TYPE_S 8
+#define POLICE_PACKET_DROPPED 0
+#define POLICE_PACKET_GREEN 1
+#define POLICE_PACKET_YELLOW 2
+#define POLICE_PACKET_RED 3
+#define PORT_BASED_POLICING BIT(7)
+#define NON_DSCP_COLOR_M 0x3
+#define NON_DSCP_COLOR_S 5
+#define COLOR_MARK_ENABLE BIT(4)
+#define COLOR_REMAP_ENABLE BIT(3)
+#define POLICE_DROP_SRP BIT(2)
+#define POLICE_COLOR_NOT_AWARE BIT(1)
+#define POLICE_ENABLE BIT(0)
+
+#define REG_PORT_POLICE_COLOR_0__4 0x0810
+#define REG_PORT_POLICE_COLOR_1__4 0x0814
+#define REG_PORT_POLICE_COLOR_2__4 0x0818
+#define REG_PORT_POLICE_COLOR_3__4 0x081C
+
+#define POLICE_COLOR_MAP_S 2
+#define POLICE_COLOR_MAP_M (BIT(POLICE_COLOR_MAP_S) - 1)
+
+#define REG_PORT_POLICE_RATE__4 0x0820
+
+#define POLICE_CIR_S 16
+#define POLICE_PIR_S 0
+
+#define REG_PORT_POLICE_BURST_SIZE__4 0x0824
+
+#define POLICE_BURST_SIZE_M 0x3FFF
+#define POLICE_CBS_S 16
+#define POLICE_PBS_S 0
+
+#define REG_PORT_WRED_PM_CTRL_0__4 0x0830
+
+#define WRED_PM_CTRL_M (BIT(11) - 1)
+
+#define WRED_PM_MAX_THRESHOLD_S 16
+#define WRED_PM_MIN_THRESHOLD_S 0
+
+#define REG_PORT_WRED_PM_CTRL_1__4 0x0834
+
+#define WRED_PM_MULTIPLIER_S 16
+#define WRED_PM_AVG_QUEUE_SIZE_S 0
+
+#define REG_PORT_WRED_QUEUE_CTRL_0__4 0x0840
+#define REG_PORT_WRED_QUEUE_CTRL_1__4 0x0844
+
+#define REG_PORT_WRED_QUEUE_PMON__4 0x0848
+
+#define WRED_RANDOM_DROP_ENABLE BIT(31)
+#define WRED_PMON_FLUSH BIT(30)
+#define WRED_DROP_GYR_DISABLE BIT(29)
+#define WRED_DROP_YR_DISABLE BIT(28)
+#define WRED_DROP_R_DISABLE BIT(27)
+#define WRED_DROP_ALL BIT(26)
+#define WRED_PMON_M (BIT(24) - 1)
+
+/* 9 - Shaping */
+
+#define REG_PORT_MTI_QUEUE_INDEX__4 0x0900
+
+#define REG_PORT_MTI_QUEUE_CTRL_0__4 0x0904
+
+#define MTI_PVID_REPLACE BIT(0)
+
+#define REG_PORT_MTI_QUEUE_CTRL_0 0x0914
+
+#define MTI_SCHEDULE_MODE_M 0x3
+#define MTI_SCHEDULE_MODE_S 6
+#define MTI_SCHEDULE_STRICT_PRIO 0
+#define MTI_SCHEDULE_WRR 2
+#define MTI_SHAPING_M 0x3
+#define MTI_SHAPING_S 4
+#define MTI_SHAPING_OFF 0
+#define MTI_SHAPING_SRP 1
+#define MTI_SHAPING_TIME_AWARE 2
+
+#define REG_PORT_MTI_QUEUE_CTRL_1 0x0915
+
+#define MTI_TX_RATIO_M (BIT(7) - 1)
+
+#define REG_PORT_MTI_QUEUE_CTRL_2__2 0x0916
+#define REG_PORT_MTI_HI_WATER_MARK 0x0916
+#define REG_PORT_MTI_QUEUE_CTRL_3__2 0x0918
+#define REG_PORT_MTI_LO_WATER_MARK 0x0918
+#define REG_PORT_MTI_QUEUE_CTRL_4__2 0x091A
+#define REG_PORT_MTI_CREDIT_INCREMENT 0x091A
+
+/* A - QM */
+
+#define REG_PORT_QM_CTRL__4 0x0A00
+
+#define PORT_QM_DROP_PRIO_M 0x3
+
+#define REG_PORT_VLAN_MEMBERSHIP__4 0x0A04
+
+#define REG_PORT_QM_QUEUE_INDEX__4 0x0A08
+
+#define PORT_QM_QUEUE_INDEX_S 24
+#define PORT_QM_BURST_SIZE_S 16
+#define PORT_QM_MIN_RESV_SPACE_M (BIT(11) - 1)
+
+#define REG_PORT_QM_WATER_MARK__4 0x0A0C
+
+#define PORT_QM_HI_WATER_MARK_S 16
+#define PORT_QM_LO_WATER_MARK_S 0
+#define PORT_QM_WATER_MARK_M (BIT(11) - 1)
+
+#define REG_PORT_QM_TX_CNT_0__4 0x0A10
+
+#define PORT_QM_TX_CNT_USED_S 0
+#define PORT_QM_TX_CNT_M (BIT(11) - 1)
+
+#define REG_PORT_QM_TX_CNT_1__4 0x0A14
+
+#define PORT_QM_TX_CNT_CALCULATED_S 16
+#define PORT_QM_TX_CNT_AVAIL_S 0
+
+/* B - LUE */
+#define REG_PORT_LUE_CTRL 0x0B00
+
+#define PORT_VLAN_LOOKUP_VID_0 BIT(7)
+#define PORT_INGRESS_FILTER BIT(6)
+#define PORT_DISCARD_NON_VID BIT(5)
+#define PORT_MAC_BASED_802_1X BIT(4)
+#define PORT_SRC_ADDR_FILTER BIT(3)
+
+#define REG_PORT_LUE_MSTP_INDEX 0x0B01
+
+#define REG_PORT_LUE_MSTP_STATE 0x0B04
+
+#define PORT_TX_ENABLE BIT(2)
+#define PORT_RX_ENABLE BIT(1)
+#define PORT_LEARN_DISABLE BIT(0)
+
+/* C - PTP */
+
+#define REG_PTP_PORT_RX_DELAY__2 0x0C00
+#define REG_PTP_PORT_TX_DELAY__2 0x0C02
+#define REG_PTP_PORT_ASYM_DELAY__2 0x0C04
+
+#define REG_PTP_PORT_XDELAY_TS 0x0C08
+#define REG_PTP_PORT_XDELAY_TS_H 0x0C08
+#define REG_PTP_PORT_XDELAY_TS_L 0x0C0A
+
+#define REG_PTP_PORT_SYNC_TS 0x0C0C
+#define REG_PTP_PORT_SYNC_TS_H 0x0C0C
+#define REG_PTP_PORT_SYNC_TS_L 0x0C0E
+
+#define REG_PTP_PORT_PDRESP_TS 0x0C10
+#define REG_PTP_PORT_PDRESP_TS_H 0x0C10
+#define REG_PTP_PORT_PDRESP_TS_L 0x0C12
+
+#define REG_PTP_PORT_TX_INT_STATUS__2 0x0C14
+#define REG_PTP_PORT_TX_INT_ENABLE__2 0x0C16
+
+#define PTP_PORT_SYNC_INT BIT(15)
+#define PTP_PORT_XDELAY_REQ_INT BIT(14)
+#define PTP_PORT_PDELAY_RESP_INT BIT(13)
+
+#define REG_PTP_PORT_LINK_DELAY__4 0x0C18
+
+#define PRIO_QUEUES 4
+#define RX_PRIO_QUEUES 8
+
+#define KS_PRIO_IN_REG 2
+
+#define TOTAL_PORT_NUM 7
+
+#define KSZ9477_COUNTER_NUM 0x20
+#define TOTAL_KSZ9477_COUNTER_NUM (KSZ9477_COUNTER_NUM + 2 + 2)
+
+#define SWITCH_COUNTER_NUM KSZ9477_COUNTER_NUM
+#define TOTAL_SWITCH_COUNTER_NUM TOTAL_KSZ9477_COUNTER_NUM
+
+#define P_BCAST_STORM_CTRL REG_PORT_MAC_CTRL_0
+#define P_PRIO_CTRL REG_PORT_MRI_PRIO_CTRL
+#define P_MIRROR_CTRL REG_PORT_MRI_MIRROR_CTRL
+#define P_STP_CTRL REG_PORT_LUE_MSTP_STATE
+#define P_PHY_CTRL REG_PORT_PHY_CTRL
+#define P_NEG_RESTART_CTRL REG_PORT_PHY_CTRL
+#define P_LINK_STATUS REG_PORT_PHY_STATUS
+#define P_SPEED_STATUS REG_PORT_PHY_PHY_CTRL
+#define P_RATE_LIMIT_CTRL REG_PORT_MAC_IN_RATE_LIMIT
+
+#define S_LINK_AGING_CTRL REG_SW_LUE_CTRL_1
+#define S_MIRROR_CTRL REG_SW_MRI_CTRL_0
+#define S_REPLACE_VID_CTRL REG_SW_MAC_CTRL_2
+#define S_802_1P_PRIO_CTRL REG_SW_MAC_802_1P_MAP_0
+#define S_TOS_PRIO_CTRL REG_SW_MAC_TOS_PRIO_0
+#define S_FLUSH_TABLE_CTRL REG_SW_LUE_CTRL_1
+
+#define SW_FLUSH_DYN_MAC_TABLE SW_FLUSH_MSTP_TABLE
+
+#define MAX_TIMESTAMP_UNIT 2
+#define MAX_TRIG_UNIT 3
+#define MAX_TIMESTAMP_EVENT_UNIT 8
+#define MAX_GPIO 4
+
+#define PTP_TRIG_UNIT_M (BIT(MAX_TRIG_UNIT) - 1)
+#define PTP_TS_UNIT_M (BIT(MAX_TIMESTAMP_UNIT) - 1)
+
+/* Driver set switch broadcast storm protection at 10% rate. */
+#define BROADCAST_STORM_PROT_RATE 10
+
+/* 148,800 frames * 67 ms / 100 */
+#define BROADCAST_STORM_VALUE 9969
+
+#endif /* KSZ9477_REGS_H */
diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
new file mode 100644
index 0000000..81a4d9d
--- /dev/null
+++ b/drivers/net/dsa/microchip/ksz_common.c
@@ -0,0 +1,1255 @@
+/*
+ * Microchip switch driver main logic
+ *
+ * Copyright (C) 2017
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <linux/delay.h>
+#include <linux/export.h>
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_data/microchip-ksz.h>
+#include <linux/phy.h>
+#include <linux/etherdevice.h>
+#include <linux/if_bridge.h>
+#include <net/dsa.h>
+#include <net/switchdev.h>
+
+#include "ksz_priv.h"
+
+static struct {
+ int index;
+ char string[ETH_GSTRING_LEN];
+} mib_names[TOTAL_SWITCH_COUNTER_NUM] = {
+ { 0x00, "rx_hi" },
+ { 0x01, "rx_undersize" },
+ { 0x02, "rx_fragments" },
+ { 0x03, "rx_oversize" },
+ { 0x04, "rx_jabbers" },
+ { 0x05, "rx_symbol_err" },
+ { 0x06, "rx_crc_err" },
+ { 0x07, "rx_align_err" },
+ { 0x08, "rx_mac_ctrl" },
+ { 0x09, "rx_pause" },
+ { 0x0A, "rx_bcast" },
+ { 0x0B, "rx_mcast" },
+ { 0x0C, "rx_ucast" },
+ { 0x0D, "rx_64_or_less" },
+ { 0x0E, "rx_65_127" },
+ { 0x0F, "rx_128_255" },
+ { 0x10, "rx_256_511" },
+ { 0x11, "rx_512_1023" },
+ { 0x12, "rx_1024_1522" },
+ { 0x13, "rx_1523_2000" },
+ { 0x14, "rx_2001" },
+ { 0x15, "tx_hi" },
+ { 0x16, "tx_late_col" },
+ { 0x17, "tx_pause" },
+ { 0x18, "tx_bcast" },
+ { 0x19, "tx_mcast" },
+ { 0x1A, "tx_ucast" },
+ { 0x1B, "tx_deferred" },
+ { 0x1C, "tx_total_col" },
+ { 0x1D, "tx_exc_col" },
+ { 0x1E, "tx_single_col" },
+ { 0x1F, "tx_mult_col" },
+ { 0x80, "rx_total" },
+ { 0x81, "tx_total" },
+ { 0x82, "rx_discards" },
+ { 0x83, "tx_discards" },
+};
+
+static void ksz_cfg(struct ksz_device *dev, u32 addr, u8 bits, bool set)
+{
+ u8 data;
+
+ ksz_read8(dev, addr, &data);
+ if (set)
+ data |= bits;
+ else
+ data &= ~bits;
+ ksz_write8(dev, addr, data);
+}
+
+static void ksz_cfg32(struct ksz_device *dev, u32 addr, u32 bits, bool set)
+{
+ u32 data;
+
+ ksz_read32(dev, addr, &data);
+ if (set)
+ data |= bits;
+ else
+ data &= ~bits;
+ ksz_write32(dev, addr, data);
+}
+
+static void ksz_port_cfg(struct ksz_device *dev, int port, int offset, u8 bits,
+ bool set)
+{
+ u32 addr;
+ u8 data;
+
+ addr = PORT_CTRL_ADDR(port, offset);
+ ksz_read8(dev, addr, &data);
+
+ if (set)
+ data |= bits;
+ else
+ data &= ~bits;
+
+ ksz_write8(dev, addr, data);
+}
+
+static void ksz_port_cfg32(struct ksz_device *dev, int port, int offset,
+ u32 bits, bool set)
+{
+ u32 addr;
+ u32 data;
+
+ addr = PORT_CTRL_ADDR(port, offset);
+ ksz_read32(dev, addr, &data);
+
+ if (set)
+ data |= bits;
+ else
+ data &= ~bits;
+
+ ksz_write32(dev, addr, data);
+}
+
+static int get_vlan_table(struct dsa_switch *ds, u16 vid, u32 *vlan_table)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data;
+ int timeout = 1000;
+
+ ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
+ ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_READ | VLAN_START);
+
+ /* wait to be cleared */
+ data = 0;
+ do {
+ ksz_read8(dev, REG_SW_VLAN_CTRL, &data);
+ if (!(data & VLAN_START))
+ break;
+ usleep_range(1, 10);
+ } while (timeout-- > 0);
+
+ if (!timeout)
+ return -ETIMEDOUT;
+
+ ksz_read32(dev, REG_SW_VLAN_ENTRY__4, &vlan_table[0]);
+ ksz_read32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, &vlan_table[1]);
+ ksz_read32(dev, REG_SW_VLAN_ENTRY_PORTS__4, &vlan_table[2]);
+
+ ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
+
+ return 0;
+}
+
+static int set_vlan_table(struct dsa_switch *ds, u16 vid, u32 *vlan_table)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data;
+ int timeout = 1000;
+
+ ksz_write32(dev, REG_SW_VLAN_ENTRY__4, vlan_table[0]);
+ ksz_write32(dev, REG_SW_VLAN_ENTRY_UNTAG__4, vlan_table[1]);
+ ksz_write32(dev, REG_SW_VLAN_ENTRY_PORTS__4, vlan_table[2]);
+
+ ksz_write16(dev, REG_SW_VLAN_ENTRY_INDEX__2, vid & VLAN_INDEX_M);
+ ksz_write8(dev, REG_SW_VLAN_CTRL, VLAN_START | VLAN_WRITE);
+
+ do {
+ ksz_read8(dev, REG_SW_VLAN_CTRL, &data);
+ if (!(data & VLAN_START))
+ break;
+ usleep_range(1, 10);
+ } while (timeout-- > 0);
+
+ if (!timeout)
+ return -ETIMEDOUT;
+
+ ksz_write8(dev, REG_SW_VLAN_CTRL, 0);
+
+ mutex_lock(&dev->vlancache_mutex);
+
+ /* update vlan cache table */
+ dev->vlan_cache[vid].table[0] = vlan_table[0];
+ dev->vlan_cache[vid].table[1] = vlan_table[1];
+ dev->vlan_cache[vid].table[2] = vlan_table[2];
+
+ mutex_unlock(&dev->vlancache_mutex);
+
+ return 0;
+}
+
+static void read_table(struct dsa_switch *ds, u32 *table)
+{
+ struct ksz_device *dev = ds->priv;
+
+ ksz_read32(dev, REG_SW_ALU_VAL_A, &table[0]);
+ ksz_read32(dev, REG_SW_ALU_VAL_B, &table[1]);
+ ksz_read32(dev, REG_SW_ALU_VAL_C, &table[2]);
+ ksz_read32(dev, REG_SW_ALU_VAL_D, &table[3]);
+}
+
+static void write_table(struct dsa_switch *ds, u32 *table)
+{
+ struct ksz_device *dev = ds->priv;
+
+ ksz_write32(dev, REG_SW_ALU_VAL_A, table[0]);
+ ksz_write32(dev, REG_SW_ALU_VAL_B, table[1]);
+ ksz_write32(dev, REG_SW_ALU_VAL_C, table[2]);
+ ksz_write32(dev, REG_SW_ALU_VAL_D, table[3]);
+}
+
+static int wait_alu_ready(struct ksz_device *dev, u32 waiton, int timeout)
+{
+ u32 data;
+
+ do {
+ ksz_read32(dev, REG_SW_ALU_CTRL__4, &data);
+ if (!(data & waiton))
+ break;
+ usleep_range(1, 10);
+ } while (timeout-- > 0);
+
+ if (timeout <= 0)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int wait_alu_sta_ready(struct ksz_device *dev, u32 waiton, int timeout)
+{
+ u32 data;
+
+ do {
+ ksz_read32(dev, REG_SW_ALU_STAT_CTRL__4, &data);
+ if (!(data & waiton))
+ break;
+ usleep_range(1, 10);
+ } while (timeout-- > 0);
+
+ if (timeout <= 0)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static int ksz_reset_switch(struct dsa_switch *ds)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data8;
+ u16 data16;
+ u32 data32;
+
+ /* reset switch */
+ ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true);
+
+ /* turn off SPI DO Edge select */
+ ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8);
+ data8 &= ~SPI_AUTO_EDGE_DETECTION;
+ ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
+
+ /* default configuration */
+ ksz_read8(dev, REG_SW_LUE_CTRL_1, &data8);
+ data8 = SW_AGING_ENABLE | SW_LINK_AUTO_AGING |
+ SW_SRC_ADDR_FILTER | SW_FLUSH_STP_TABLE | SW_FLUSH_MSTP_TABLE;
+ ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
+
+ /* disable interrupts */
+ ksz_write32(dev, REG_SW_INT_MASK__4, SWITCH_INT_MASK);
+ ksz_write32(dev, REG_SW_PORT_INT_MASK__4, 0x7F);
+ ksz_read32(dev, REG_SW_PORT_INT_STATUS__4, &data32);
+
+ /* set broadcast storm protection 10% rate */
+ ksz_read16(dev, REG_SW_MAC_CTRL_2, &data16);
+ data16 &= ~BROADCAST_STORM_RATE;
+ data16 |= (BROADCAST_STORM_VALUE * BROADCAST_STORM_PROT_RATE) / 100;
+ ksz_write16(dev, REG_SW_MAC_CTRL_2, data16);
+
+ return 0;
+}
+
+static void ksz_config_cpu_port(struct dsa_switch *ds)
+{
+ struct ksz_device *dev = ds->priv;
+ int i;
+
+ ds->num_ports = dev->port_cnt;
+
+ for (i = 0; i < ds->num_ports; i++) {
+ if (dsa_is_cpu_port(ds, i) && (dev->cpu_ports & (1 << i))) {
+ dev->cpu_port = i;
+ /* enable tag tail for host port */
+ ksz_port_cfg(dev, i, REG_PORT_CTRL_0,
+ PORT_TAIL_TAG_ENABLE, true);
+ }
+ }
+}
+
+static int ksz_setup(struct dsa_switch *ds)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret = 0;
+
+ dev->vlan_cache = devm_kcalloc(dev->dev, sizeof(struct vlan_table),
+ dev->num_vlans, GFP_KERNEL);
+ if (!dev->vlan_cache)
+ return -ENOMEM;
+
+ ret = ksz_reset_switch(ds);
+ if (ret) {
+ dev_err(ds->dev, "failed to reset switch\n");
+ return ret;
+ }
+
+ /* accept packet up to 2000bytes */
+ ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_LEGAL_PACKET_DISABLE, true);
+
+ ksz_config_cpu_port(ds);
+
+ ksz_cfg(dev, REG_SW_MAC_CTRL_1, MULTICAST_STORM_DISABLE, true);
+
+ /* queue based egress rate limit */
+ ksz_cfg(dev, REG_SW_MAC_CTRL_5, SW_OUT_RATE_LIMIT_QUEUE_BASED, true);
+
+ /* start switch */
+ ksz_cfg(dev, REG_SW_OPERATION, SW_START, true);
+
+ return 0;
+}
+
+static enum dsa_tag_protocol ksz_get_tag_protocol(struct dsa_switch *ds)
+{
+ return DSA_TAG_PROTO_KSZ;
+}
+
+static int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg)
+{
+ struct ksz_device *dev = ds->priv;
+ u16 val = 0;
+
+ ksz_pread16(dev, addr, 0x100 + (reg << 1), &val);
+
+ return val;
+}
+
+static int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val)
+{
+ struct ksz_device *dev = ds->priv;
+
+ ksz_pwrite16(dev, addr, 0x100 + (reg << 1), val);
+
+ return 0;
+}
+
+static int ksz_enable_port(struct dsa_switch *ds, int port,
+ struct phy_device *phy)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data8;
+ u16 data16;
+
+ ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, false);
+
+ /* set back pressure */
+ ksz_port_cfg(dev, port, REG_PORT_MAC_CTRL_1, PORT_BACK_PRESSURE, true);
+
+ /* set flow control */
+ ksz_port_cfg(dev, port, REG_PORT_CTRL_0,
+ PORT_FORCE_TX_FLOW_CTRL | PORT_FORCE_RX_FLOW_CTRL, true);
+
+ /* enable broadcast storm limit */
+ ksz_port_cfg(dev, port, P_BCAST_STORM_CTRL, PORT_BROADCAST_STORM, true);
+
+ /* disable DiffServ priority */
+ ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_DIFFSERV_PRIO_ENABLE, false);
+
+ /* replace priority */
+ ksz_port_cfg(dev, port, REG_PORT_MRI_MAC_CTRL,
+ PORT_USER_PRIO_CEILING, false);
+ ksz_port_cfg32(dev, port, REG_PORT_MTI_QUEUE_CTRL_0__4,
+ MTI_PVID_REPLACE, false);
+
+ /* enable 802.1p priority */
+ ksz_port_cfg(dev, port, P_PRIO_CTRL, PORT_802_1P_PRIO_ENABLE, true);
+
+ /* configure MAC to 1G & RGMII mode */
+ ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
+ data8 |= PORT_RGMII_ID_EG_ENABLE;
+ data8 &= ~PORT_MII_NOT_1GBIT;
+ data8 &= ~PORT_MII_SEL_M;
+ data8 |= PORT_RGMII_SEL;
+ ksz_pwrite8(dev, port, REG_PORT_XMII_CTRL_1, data8);
+
+ /* clear pending interrupts */
+ ksz_pread16(dev, port, REG_PORT_PHY_INT_ENABLE, &data16);
+
+ return 0;
+}
+
+static void ksz_disable_port(struct dsa_switch *ds, int port,
+ struct phy_device *phy)
+{
+ struct ksz_device *dev = ds->priv;
+
+ /* there is no port disable */
+ ksz_port_cfg(dev, port, REG_PORT_CTRL_0, PORT_MAC_LOOPBACK, true);
+}
+
+static int ksz_sset_count(struct dsa_switch *ds)
+{
+ return TOTAL_SWITCH_COUNTER_NUM;
+}
+
+static void ksz_get_strings(struct dsa_switch *ds, int port, uint8_t *buf)
+{
+ int i;
+
+ for (i = 0; i < TOTAL_SWITCH_COUNTER_NUM; i++) {
+ memcpy(buf + i * ETH_GSTRING_LEN, mib_names[i].string,
+ ETH_GSTRING_LEN);
+ }
+}
+
+static void ksz_get_ethtool_stats(struct dsa_switch *ds, int port,
+ uint64_t *buf)
+{
+ struct ksz_device *dev = ds->priv;
+ int i;
+ u32 data;
+ int timeout;
+
+ mutex_lock(&dev->stats_mutex);
+
+ for (i = 0; i < TOTAL_SWITCH_COUNTER_NUM; i++) {
+ data = MIB_COUNTER_READ;
+ data |= ((mib_names[i].index & 0xFF) << MIB_COUNTER_INDEX_S);
+ ksz_pwrite32(dev, port, REG_PORT_MIB_CTRL_STAT__4, data);
+
+ timeout = 1000;
+ do {
+ ksz_pread32(dev, port, REG_PORT_MIB_CTRL_STAT__4,
+ &data);
+ usleep_range(1, 10);
+ if (!(data & MIB_COUNTER_READ))
+ break;
+ } while (timeout-- > 0);
+
+ /* failed to read MIB. get out of loop */
+ if (!timeout) {
+ dev_dbg(dev->dev, "Failed to get MIB\n");
+ break;
+ }
+
+ /* count resets upon read */
+ ksz_pread32(dev, port, REG_PORT_MIB_DATA, &data);
+
+ dev->mib_value[i] += (uint64_t)data;
+ buf[i] = dev->mib_value[i];
+ }
+
+ mutex_unlock(&dev->stats_mutex);
+}
+
+static void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data;
+
+ ksz_pread8(dev, port, P_STP_CTRL, &data);
+ data &= ~(PORT_TX_ENABLE | PORT_RX_ENABLE | PORT_LEARN_DISABLE);
+
+ switch (state) {
+ case BR_STATE_DISABLED:
+ data |= PORT_LEARN_DISABLE;
+ break;
+ case BR_STATE_LISTENING:
+ data |= (PORT_RX_ENABLE | PORT_LEARN_DISABLE);
+ break;
+ case BR_STATE_LEARNING:
+ data |= PORT_RX_ENABLE;
+ break;
+ case BR_STATE_FORWARDING:
+ data |= (PORT_TX_ENABLE | PORT_RX_ENABLE);
+ break;
+ case BR_STATE_BLOCKING:
+ data |= PORT_LEARN_DISABLE;
+ break;
+ default:
+ dev_err(ds->dev, "invalid STP state: %d\n", state);
+ return;
+ }
+
+ ksz_pwrite8(dev, port, P_STP_CTRL, data);
+}
+
+static void ksz_port_fast_age(struct dsa_switch *ds, int port)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data8;
+
+ ksz_read8(dev, REG_SW_LUE_CTRL_1, &data8);
+ data8 |= SW_FAST_AGING;
+ ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
+
+ data8 &= ~SW_FAST_AGING;
+ ksz_write8(dev, REG_SW_LUE_CTRL_1, data8);
+}
+
+static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port, bool flag)
+{
+ struct ksz_device *dev = ds->priv;
+
+ if (flag) {
+ ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,
+ PORT_VLAN_LOOKUP_VID_0, true);
+ ksz_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY, true);
+ ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, true);
+ } else {
+ ksz_cfg(dev, REG_SW_LUE_CTRL_0, SW_VLAN_ENABLE, false);
+ ksz_cfg32(dev, REG_SW_QM_CTRL__4, UNICAST_VLAN_BOUNDARY, false);
+ ksz_port_cfg(dev, port, REG_PORT_LUE_CTRL,
+ PORT_VLAN_LOOKUP_VID_0, false);
+ }
+
+ return 0;
+}
+
+static int ksz_port_vlan_prepare(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_vlan *vlan,
+ struct switchdev_trans *trans)
+{
+ /* nothing needed */
+
+ return 0;
+}
+
+static void ksz_port_vlan_add(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_vlan *vlan,
+ struct switchdev_trans *trans)
+{
+ struct ksz_device *dev = ds->priv;
+ u32 vlan_table[3];
+ u16 vid;
+ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+
+ for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
+ if (get_vlan_table(ds, vid, vlan_table)) {
+ dev_dbg(dev->dev, "Failed to get vlan table\n");
+ return;
+ }
+
+ vlan_table[0] = VLAN_VALID | (vid & VLAN_FID_M);
+ if (untagged)
+ vlan_table[1] |= BIT(port);
+ else
+ vlan_table[1] &= ~BIT(port);
+ vlan_table[1] &= ~(BIT(dev->cpu_port));
+
+ vlan_table[2] |= BIT(port) | BIT(dev->cpu_port);
+
+ if (set_vlan_table(ds, vid, vlan_table)) {
+ dev_dbg(dev->dev, "Failed to set vlan table\n");
+ return;
+ }
+
+ /* change PVID */
+ if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
+ ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, vid);
+ }
+}
+
+static int ksz_port_vlan_del(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_vlan *vlan)
+{
+ struct ksz_device *dev = ds->priv;
+ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
+ u32 vlan_table[3];
+ u16 vid;
+ u16 pvid;
+
+ ksz_pread16(dev, port, REG_PORT_DEFAULT_VID, &pvid);
+ pvid = pvid & 0xFFF;
+
+ for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
+ if (get_vlan_table(ds, vid, vlan_table)) {
+ dev_dbg(dev->dev, "Failed to get vlan table\n");
+ return -ETIMEDOUT;
+ }
+
+ vlan_table[2] &= ~BIT(port);
+
+ if (pvid == vid)
+ pvid = 1;
+
+ if (untagged)
+ vlan_table[1] &= ~BIT(port);
+
+ if (set_vlan_table(ds, vid, vlan_table)) {
+ dev_dbg(dev->dev, "Failed to set vlan table\n");
+ return -ETIMEDOUT;
+ }
+ }
+
+ ksz_pwrite16(dev, port, REG_PORT_DEFAULT_VID, pvid);
+
+ return 0;
+}
+
+static int ksz_port_vlan_dump(struct dsa_switch *ds, int port,
+ struct switchdev_obj_port_vlan *vlan,
+ switchdev_obj_dump_cb_t *cb)
+{
+ struct ksz_device *dev = ds->priv;
+ u16 vid;
+ u16 data;
+ struct vlan_table *vlan_cache;
+ int err = 0;
+
+ mutex_lock(&dev->vlancache_mutex);
+
+ /* use dev->vlan_cache due to lack of searching valid vlan entry */
+ for (vid = vlan->vid_begin; vid < dev->num_vlans; vid++) {
+ vlan_cache = &dev->vlan_cache[vid];
+
+ if (!(vlan_cache->table[0] & VLAN_VALID))
+ continue;
+
+ vlan->vid_begin = vid;
+ vlan->vid_end = vid;
+ vlan->flags = 0;
+ if (vlan_cache->table[2] & BIT(port)) {
+ if (vlan_cache->table[1] & BIT(port))
+ vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
+ ksz_pread16(dev, port, REG_PORT_DEFAULT_VID, &data);
+ if (vid == (data & 0xFFFFF))
+ vlan->flags |= BRIDGE_VLAN_INFO_PVID;
+
+ err = cb(&vlan->obj);
+ if (err)
+ break;
+ }
+ }
+
+ mutex_unlock(&dev->vlancache_mutex);
+
+ return err;
+}
+
+static int ksz_port_fdb_prepare(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_fdb *fdb,
+ struct switchdev_trans *trans)
+{
+ /* nothing needed */
+
+ return 0;
+}
+
+struct alu_struct {
+ /* entry 1 */
+ u8 is_static:1;
+ u8 is_src_filter:1;
+ u8 is_dst_filter:1;
+ u8 prio_age:3;
+ u32 _reserv_0_1:23;
+ u8 mstp:3;
+ /* entry 2 */
+ u8 is_override:1;
+ u8 is_use_fid:1;
+ u32 _reserv_1_1:23;
+ u8 port_forward:7;
+ /* entry 3 & 4*/
+ u32 _reserv_2_1:9;
+ u8 fid:7;
+ u8 mac[ETH_ALEN];
+};
+
+static void ksz_port_fdb_add(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_fdb *fdb,
+ struct switchdev_trans *trans)
+{
+ struct ksz_device *dev = ds->priv;
+ u32 alu_table[4];
+ u32 data;
+
+ mutex_lock(&dev->alu_mutex);
+
+ /* find any entry with mac & vid */
+ data = fdb->vid << ALU_FID_INDEX_S;
+ data |= ((fdb->addr[0] << 8) | fdb->addr[1]);
+ ksz_write32(dev, REG_SW_ALU_INDEX_0, data);
+
+ data = ((fdb->addr[2] << 24) | (fdb->addr[3] << 16));
+ data |= ((fdb->addr[4] << 8) | fdb->addr[5]);
+ ksz_write32(dev, REG_SW_ALU_INDEX_1, data);
+
+ /* start read operation */
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);
+
+ /* wait to be finished */
+ if (wait_alu_ready(dev, ALU_START, 1000) < 0) {
+ dev_dbg(dev->dev, "Failed to read ALU\n");
+ goto exit;
+ }
+
+ /* read ALU entry */
+ read_table(ds, alu_table);
+
+ /* update ALU entry */
+ alu_table[0] = ALU_V_STATIC_VALID;
+ alu_table[1] |= BIT(port);
+ if (fdb->vid)
+ alu_table[1] |= ALU_V_USE_FID;
+ alu_table[2] = (fdb->vid << ALU_V_FID_S);
+ alu_table[2] |= ((fdb->addr[0] << 8) | fdb->addr[1]);
+ alu_table[3] = ((fdb->addr[2] << 24) | (fdb->addr[3] << 16));
+ alu_table[3] |= ((fdb->addr[4] << 8) | fdb->addr[5]);
+
+ write_table(ds, alu_table);
+
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);
+
+ /* wait to be finished */
+ if (wait_alu_ready(dev, ALU_START, 1000) < 0)
+ dev_dbg(dev->dev, "Failed to read ALU\n");
+
+exit:
+ mutex_unlock(&dev->alu_mutex);
+}
+
+static int ksz_port_fdb_del(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_fdb *fdb)
+{
+ struct ksz_device *dev = ds->priv;
+ u32 alu_table[4];
+ u32 data;
+ int ret = 0;
+
+ mutex_lock(&dev->alu_mutex);
+
+ /* read any entry with mac & vid */
+ data = fdb->vid << ALU_FID_INDEX_S;
+ data |= ((fdb->addr[0] << 8) | fdb->addr[1]);
+ ksz_write32(dev, REG_SW_ALU_INDEX_0, data);
+
+ data = ((fdb->addr[2] << 24) | (fdb->addr[3] << 16));
+ data |= ((fdb->addr[4] << 8) | fdb->addr[5]);
+ ksz_write32(dev, REG_SW_ALU_INDEX_1, data);
+
+ /* start read operation */
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_READ | ALU_START);
+
+ /* wait to be finished */
+ ret = wait_alu_ready(dev, ALU_START, 1000);
+ if (ret < 0) {
+ dev_dbg(dev->dev, "Failed to read ALU\n");
+ goto exit;
+ }
+
+ ksz_read32(dev, REG_SW_ALU_VAL_A, &alu_table[0]);
+ if (alu_table[0] & ALU_V_STATIC_VALID) {
+ ksz_read32(dev, REG_SW_ALU_VAL_B, &alu_table[1]);
+ ksz_read32(dev, REG_SW_ALU_VAL_C, &alu_table[2]);
+ ksz_read32(dev, REG_SW_ALU_VAL_D, &alu_table[3]);
+
+ /* clear forwarding port */
+ alu_table[2] &= ~BIT(port);
+
+ /* if there is no port to forward, clear table */
+ if ((alu_table[2] & ALU_V_PORT_MAP) == 0) {
+ alu_table[0] = 0;
+ alu_table[1] = 0;
+ alu_table[2] = 0;
+ alu_table[3] = 0;
+ }
+ } else {
+ alu_table[0] = 0;
+ alu_table[1] = 0;
+ alu_table[2] = 0;
+ alu_table[3] = 0;
+ }
+
+ write_table(ds, alu_table);
+
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_WRITE | ALU_START);
+
+ /* wait to be finished */
+ ret = wait_alu_ready(dev, ALU_START, 1000);
+ if (ret < 0)
+ dev_dbg(dev->dev, "Failed to write ALU\n");
+
+exit:
+ mutex_unlock(&dev->alu_mutex);
+
+ return ret;
+}
+
+static void convert_alu(struct alu_struct *alu, u32 *alu_table)
+{
+ alu->is_static = !!(alu_table[0] & ALU_V_STATIC_VALID);
+ alu->is_src_filter = !!(alu_table[0] & ALU_V_SRC_FILTER);
+ alu->is_dst_filter = !!(alu_table[0] & ALU_V_DST_FILTER);
+ alu->prio_age = (alu_table[0] >> ALU_V_PRIO_AGE_CNT_S) &
+ ALU_V_PRIO_AGE_CNT_M;
+ alu->mstp = alu_table[0] & ALU_V_MSTP_M;
+
+ alu->is_override = !!(alu_table[1] & ALU_V_OVERRIDE);
+ alu->is_use_fid = !!(alu_table[1] & ALU_V_USE_FID);
+ alu->port_forward = alu_table[1] & ALU_V_PORT_MAP;
+
+ alu->fid = (alu_table[2] >> ALU_V_FID_S) & ALU_V_FID_M;
+
+ alu->mac[0] = (alu_table[2] >> 8) & 0xFF;
+ alu->mac[1] = alu_table[2] & 0xFF;
+ alu->mac[2] = (alu_table[3] >> 24) & 0xFF;
+ alu->mac[3] = (alu_table[3] >> 16) & 0xFF;
+ alu->mac[4] = (alu_table[3] >> 8) & 0xFF;
+ alu->mac[5] = alu_table[3] & 0xFF;
+}
+
+static int ksz_port_fdb_dump(struct dsa_switch *ds, int port,
+ struct switchdev_obj_port_fdb *fdb,
+ switchdev_obj_dump_cb_t *cb)
+{
+ struct ksz_device *dev = ds->priv;
+ int ret = 0;
+ u32 data;
+ u32 alu_table[4];
+ struct alu_struct alu;
+ int timeout;
+
+ mutex_lock(&dev->alu_mutex);
+
+ /* start ALU search */
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, ALU_START | ALU_SEARCH);
+
+ do {
+ timeout = 1000;
+ do {
+ ksz_read32(dev, REG_SW_ALU_CTRL__4, &data);
+ if ((data & ALU_VALID) || !(data & ALU_START))
+ break;
+ usleep_range(1, 10);
+ } while (timeout-- > 0);
+
+ if (!timeout) {
+ dev_dbg(dev->dev, "Failed to search ALU\n");
+ ret = -ETIMEDOUT;
+ goto exit;
+ }
+
+ /* read ALU table */
+ read_table(ds, alu_table);
+
+ convert_alu(&alu, alu_table);
+
+ if (alu.port_forward & BIT(port)) {
+ fdb->vid = alu.fid;
+ if (alu.is_static)
+ fdb->ndm_state = NUD_NOARP;
+ else
+ fdb->ndm_state = NUD_REACHABLE;
+ ether_addr_copy(fdb->addr, alu.mac);
+
+ ret = cb(&fdb->obj);
+ if (ret)
+ goto exit;
+ }
+ } while (data & ALU_START);
+
+exit:
+
+ /* stop ALU search */
+ ksz_write32(dev, REG_SW_ALU_CTRL__4, 0);
+
+ mutex_unlock(&dev->alu_mutex);
+
+ return ret;
+}
+
+static int ksz_port_mdb_prepare(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_mdb *mdb,
+ struct switchdev_trans *trans)
+{
+ /* nothing to do */
+ return 0;
+}
+
+static void ksz_port_mdb_add(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_mdb *mdb,
+ struct switchdev_trans *trans)
+{
+ struct ksz_device *dev = ds->priv;
+ u32 static_table[4];
+ u32 data;
+ int index;
+ u32 mac_hi, mac_lo;
+
+ mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
+ mac_lo = ((mdb->addr[2] << 24) | (mdb->addr[3] << 16));
+ mac_lo |= ((mdb->addr[4] << 8) | mdb->addr[5]);
+
+ mutex_lock(&dev->alu_mutex);
+
+ for (index = 0; index < dev->num_statics; index++) {
+ /* find empty slot first */
+ data = (index << ALU_STAT_INDEX_S) |
+ ALU_STAT_READ | ALU_STAT_START;
+ ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
+
+ /* wait to be finished */
+ if (wait_alu_sta_ready(dev, ALU_STAT_START, 1000) < 0) {
+ dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
+ goto exit;
+ }
+
+ /* read ALU static table */
+ read_table(ds, static_table);
+
+ if (static_table[0] & ALU_V_STATIC_VALID) {
+ /* check this has same vid & mac address */
+ if (((static_table[2] >> ALU_V_FID_S) == (mdb->vid)) &&
+ ((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
+ (static_table[3] == mac_lo)) {
+ /* found matching one */
+ break;
+ }
+ } else {
+ /* found empty one */
+ break;
+ }
+ }
+
+ /* no available entry */
+ if (index == dev->num_statics)
+ goto exit;
+
+ /* add entry */
+ static_table[0] = ALU_V_STATIC_VALID;
+ static_table[1] |= BIT(port);
+ if (mdb->vid)
+ static_table[1] |= ALU_V_USE_FID;
+ static_table[2] = (mdb->vid << ALU_V_FID_S);
+ static_table[2] |= mac_hi;
+ static_table[3] = mac_lo;
+
+ write_table(ds, static_table);
+
+ data = (index << ALU_STAT_INDEX_S) | ALU_STAT_START;
+ ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
+
+ /* wait to be finished */
+ if (wait_alu_sta_ready(dev, ALU_STAT_START, 1000) < 0)
+ dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
+
+exit:
+ mutex_unlock(&dev->alu_mutex);
+}
+
+static int ksz_port_mdb_del(struct dsa_switch *ds, int port,
+ const struct switchdev_obj_port_mdb *mdb)
+{
+ struct ksz_device *dev = ds->priv;
+ u32 static_table[4];
+ u32 data;
+ int index;
+ int ret = 0;
+ u32 mac_hi, mac_lo;
+
+ mac_hi = ((mdb->addr[0] << 8) | mdb->addr[1]);
+ mac_lo = ((mdb->addr[2] << 24) | (mdb->addr[3] << 16));
+ mac_lo |= ((mdb->addr[4] << 8) | mdb->addr[5]);
+
+ mutex_lock(&dev->alu_mutex);
+
+ for (index = 0; index < dev->num_statics; index++) {
+ /* find empty slot first */
+ data = (index << ALU_STAT_INDEX_S) |
+ ALU_STAT_READ | ALU_STAT_START;
+ ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
+
+ /* wait to be finished */
+ ret = wait_alu_sta_ready(dev, ALU_STAT_START, 1000);
+ if (ret < 0) {
+ dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
+ goto exit;
+ }
+
+ /* read ALU static table */
+ read_table(ds, static_table);
+
+ mutex_unlock(&dev->alu_mutex);
+
+ if (static_table[0] & ALU_V_STATIC_VALID) {
+ /* check this has same vid & mac address */
+
+ if (((static_table[2] >> ALU_V_FID_S) == (mdb->vid)) &&
+ ((static_table[2] & ALU_V_MAC_ADDR_HI) == mac_hi) &&
+ (static_table[3] == mac_lo)) {
+ /* found matching one */
+ break;
+ }
+ }
+ }
+
+ /* no available entry */
+ if (index == dev->num_statics) {
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ /* clear port */
+ static_table[1] &= ~BIT(port);
+
+ if ((static_table[1] & ALU_V_PORT_MAP) == 0) {
+ /* delete entry */
+ static_table[0] = 0;
+ static_table[1] = 0;
+ static_table[2] = 0;
+ static_table[3] = 0;
+ }
+
+ write_table(ds, static_table);
+
+ data = (index << ALU_STAT_INDEX_S) | ALU_STAT_START;
+ ksz_write32(dev, REG_SW_ALU_STAT_CTRL__4, data);
+
+ /* wait to be finished */
+ ret = wait_alu_sta_ready(dev, ALU_STAT_START, 1000);
+ if (ret < 0)
+ dev_dbg(dev->dev, "Failed to read ALU STATIC\n");
+
+exit:
+ mutex_unlock(&dev->alu_mutex);
+
+ return ret;
+}
+
+static int ksz_port_mdb_dump(struct dsa_switch *ds, int port,
+ struct switchdev_obj_port_mdb *mdb,
+ switchdev_obj_dump_cb_t *cb)
+{
+ /* this is not called by switch layer */
+ return 0;
+}
+
+static int ksz_port_mirror_add(struct dsa_switch *ds, int port,
+ struct dsa_mall_mirror_tc_entry *mirror,
+ bool ingress)
+{
+ struct ksz_device *dev = ds->priv;
+
+ if (ingress)
+ ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, true);
+ else
+ ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, true);
+
+ ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_SNIFFER, false);
+
+ /* configure mirror port */
+ ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
+ PORT_MIRROR_SNIFFER, true);
+
+ ksz_cfg(dev, S_MIRROR_CTRL, SW_MIRROR_RX_TX, false);
+
+ return 0;
+}
+
+static void ksz_port_mirror_del(struct dsa_switch *ds, int port,
+ struct dsa_mall_mirror_tc_entry *mirror)
+{
+ struct ksz_device *dev = ds->priv;
+ u8 data;
+
+ if (mirror->ingress)
+ ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_RX, false);
+ else
+ ksz_port_cfg(dev, port, P_MIRROR_CTRL, PORT_MIRROR_TX, false);
+
+ ksz_pread8(dev, port, P_MIRROR_CTRL, &data);
+
+ if (!(data & (PORT_MIRROR_RX | PORT_MIRROR_TX)))
+ ksz_port_cfg(dev, mirror->to_local_port, P_MIRROR_CTRL,
+ PORT_MIRROR_SNIFFER, false);
+}
+
+static const struct dsa_switch_ops ksz_switch_ops = {
+ .get_tag_protocol = ksz_get_tag_protocol,
+ .setup = ksz_setup,
+ .phy_read = ksz_phy_read16,
+ .phy_write = ksz_phy_write16,
+ .port_enable = ksz_enable_port,
+ .port_disable = ksz_disable_port,
+ .get_strings = ksz_get_strings,
+ .get_ethtool_stats = ksz_get_ethtool_stats,
+ .get_sset_count = ksz_sset_count,
+ .port_stp_state_set = ksz_port_stp_state_set,
+ .port_fast_age = ksz_port_fast_age,
+ .port_vlan_filtering = ksz_port_vlan_filtering,
+ .port_vlan_prepare = ksz_port_vlan_prepare,
+ .port_vlan_add = ksz_port_vlan_add,
+ .port_vlan_del = ksz_port_vlan_del,
+ .port_vlan_dump = ksz_port_vlan_dump,
+ .port_fdb_prepare = ksz_port_fdb_prepare,
+ .port_fdb_dump = ksz_port_fdb_dump,
+ .port_fdb_add = ksz_port_fdb_add,
+ .port_fdb_del = ksz_port_fdb_del,
+ .port_mdb_prepare = ksz_port_mdb_prepare,
+ .port_mdb_add = ksz_port_mdb_add,
+ .port_mdb_del = ksz_port_mdb_del,
+ .port_mdb_dump = ksz_port_mdb_dump,
+ .port_mirror_add = ksz_port_mirror_add,
+ .port_mirror_del = ksz_port_mirror_del,
+};
+
+struct ksz_chip_data {
+ u32 chip_id;
+ const char *dev_name;
+ int num_vlans;
+ int num_alus;
+ int num_statics;
+ int cpu_ports;
+ int port_cnt;
+};
+
+static const struct ksz_chip_data ksz_switch_chips[] = {
+ {
+ .chip_id = 0x00947700,
+ .dev_name = "KSZ9477",
+ .num_vlans = 4096,
+ .num_alus = 4096,
+ .num_statics = 16,
+ .cpu_ports = 0x7F, /* can be configured as cpu port */
+ .port_cnt = 7, /* total physical port count */
+ },
+};
+
+static int ksz_switch_init(struct ksz_device *dev)
+{
+ int i;
+
+ mutex_init(&dev->reg_mutex);
+ mutex_init(&dev->stats_mutex);
+ mutex_init(&dev->alu_mutex);
+ mutex_init(&dev->vlancache_mutex);
+
+ dev->ds->ops = &ksz_switch_ops;
+
+ for (i = 0; i < ARRAY_SIZE(ksz_switch_chips); i++) {
+ const struct ksz_chip_data *chip = &ksz_switch_chips[i];
+
+ if (dev->chip_id == chip->chip_id) {
+ dev->name = chip->dev_name;
+ dev->num_vlans = chip->num_vlans;
+ dev->num_alus = chip->num_alus;
+ dev->num_statics = chip->num_statics;
+ dev->port_cnt = chip->port_cnt;
+ dev->cpu_ports = chip->cpu_ports;
+
+ break;
+ }
+ }
+
+ /* no switch found */
+ if (!dev->port_cnt)
+ return -ENODEV;
+
+ return 0;
+}
+
+struct ksz_device *ksz_switch_alloc(struct device *base,
+ const struct ksz_io_ops *ops,
+ void *priv)
+{
+ struct dsa_switch *ds;
+ struct ksz_device *swdev;
+
+ ds = dsa_switch_alloc(base, DSA_MAX_PORTS);
+ if (!ds)
+ return NULL;
+
+ swdev = devm_kzalloc(base, sizeof(*swdev), GFP_KERNEL);
+ if (!swdev)
+ return NULL;
+
+ ds->priv = swdev;
+ swdev->dev = base;
+
+ swdev->ds = ds;
+ swdev->priv = priv;
+ swdev->ops = ops;
+
+ return swdev;
+}
+EXPORT_SYMBOL(ksz_switch_alloc);
+
+int ksz_switch_detect(struct ksz_device *dev)
+{
+ u8 data8;
+ u32 id32;
+ int ret;
+
+ /* turn off SPI DO Edge select */
+ ret = ksz_read8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, &data8);
+ if (ret)
+ return ret;
+
+ data8 &= ~SPI_AUTO_EDGE_DETECTION;
+ ret = ksz_write8(dev, REG_SW_GLOBAL_SERIAL_CTRL_0, data8);
+ if (ret)
+ return ret;
+
+ /* read chip id */
+ ret = ksz_read32(dev, REG_CHIP_ID0__1, &id32);
+ if (ret)
+ return ret;
+
+ dev->chip_id = id32;
+
+ return 0;
+}
+EXPORT_SYMBOL(ksz_switch_detect);
+
+int ksz_switch_register(struct ksz_device *dev)
+{
+ int ret;
+
+ if (dev->pdata)
+ dev->chip_id = dev->pdata->chip_id;
+
+ if (ksz_switch_detect(dev))
+ return -EINVAL;
+
+ ret = ksz_switch_init(dev);
+ if (ret)
+ return ret;
+
+ return dsa_register_switch(dev->ds, dev->ds->dev);
+}
+EXPORT_SYMBOL(ksz_switch_register);
+
+void ksz_switch_remove(struct ksz_device *dev)
+{
+ dsa_unregister_switch(dev->ds);
+}
+EXPORT_SYMBOL(ksz_switch_remove);
+
+MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
+MODULE_DESCRIPTION("Microchip KSZ Series Switch DSA Driver");
diff --git a/drivers/net/dsa/microchip/ksz_priv.h b/drivers/net/dsa/microchip/ksz_priv.h
new file mode 100644
index 0000000..aa933ce
--- /dev/null
+++ b/drivers/net/dsa/microchip/ksz_priv.h
@@ -0,0 +1,210 @@
+/*
+ * Microchip KSZ series switch common definitions
+ *
+ * Copyright (C) 2017
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef __KSZ_PRIV_H
+#define __KSZ_PRIV_H
+
+#include <linux/kernel.h>
+#include <linux/mutex.h>
+#include <linux/phy.h>
+#include <linux/etherdevice.h>
+#include <net/dsa.h>
+
+#include "ksz_9477_reg.h"
+
+struct ksz_io_ops;
+
+struct vlan_table {
+ u32 table[3];
+};
+
+struct ksz_device {
+ struct dsa_switch *ds;
+ struct ksz_platform_data *pdata;
+ const char *name;
+
+ struct mutex reg_mutex; /* register access */
+ struct mutex stats_mutex; /* status access */
+ struct mutex alu_mutex; /* ALU access */
+ struct mutex vlancache_mutex; /* vlan_cache access */
+ const struct ksz_io_ops *ops;
+
+ struct device *dev;
+
+ void *priv;
+
+ /* chip specific data */
+ u32 chip_id;
+ int num_vlans;
+ int num_alus;
+ int num_statics;
+ int cpu_port; /* port connected to CPU */
+ int cpu_ports; /* port bitmap can be cpu port */
+ int port_cnt;
+
+ struct vlan_table *vlan_cache;
+
+ u64 mib_value[TOTAL_SWITCH_COUNTER_NUM];
+};
+
+struct ksz_io_ops {
+ int (*read8)(struct ksz_device *dev, u32 reg, u8 *value);
+ int (*read16)(struct ksz_device *dev, u32 reg, u16 *value);
+ int (*read24)(struct ksz_device *dev, u32 reg, u32 *value);
+ int (*read32)(struct ksz_device *dev, u32 reg, u32 *value);
+ int (*write8)(struct ksz_device *dev, u32 reg, u8 value);
+ int (*write16)(struct ksz_device *dev, u32 reg, u16 value);
+ int (*write24)(struct ksz_device *dev, u32 reg, u32 value);
+ int (*write32)(struct ksz_device *dev, u32 reg, u32 value);
+ int (*phy_read16)(struct ksz_device *dev, int addr, int reg,
+ u16 *value);
+ int (*phy_write16)(struct ksz_device *dev, int addr, int reg,
+ u16 value);
+};
+
+struct ksz_device *ksz_switch_alloc(struct device *base,
+ const struct ksz_io_ops *ops, void *priv);
+int ksz_switch_detect(struct ksz_device *dev);
+int ksz_switch_register(struct ksz_device *dev);
+void ksz_switch_remove(struct ksz_device *dev);
+
+static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->read8(dev, reg, val);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->read16(dev, reg, val);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_read24(struct ksz_device *dev, u32 reg, u32 *val)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->read24(dev, reg, val);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->read32(dev, reg, val);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->write8(dev, reg, value);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->write16(dev, reg, value);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_write24(struct ksz_device *dev, u32 reg, u32 value)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->write24(dev, reg, value);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
+{
+ int ret;
+
+ mutex_lock(&dev->reg_mutex);
+ ret = dev->ops->write32(dev, reg, value);
+ mutex_unlock(&dev->reg_mutex);
+
+ return ret;
+}
+
+static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
+ u8 *data)
+{
+ ksz_read8(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
+ u16 *data)
+{
+ ksz_read16(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
+ u32 *data)
+{
+ ksz_read32(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
+ u8 data)
+{
+ ksz_write8(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
+ u16 data)
+{
+ ksz_write16(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
+ u32 data)
+{
+ ksz_write32(dev, PORT_CTRL_ADDR(port, offset), data);
+}
+
+#endif
diff --git a/drivers/net/dsa/microchip/ksz_spi.c b/drivers/net/dsa/microchip/ksz_spi.c
new file mode 100644
index 0000000..8a47dea
--- /dev/null
+++ b/drivers/net/dsa/microchip/ksz_spi.c
@@ -0,0 +1,215 @@
+/*
+ * Microchip KSZ series register access through SPI
+ *
+ * Copyright (C) 2017
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include <asm/unaligned.h>
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+
+#include "ksz_priv.h"
+
+/* SPI frame opcodes */
+#define KS_SPIOP_RD 3
+#define KS_SPIOP_WR 2
+
+#define SPI_ADDR_SHIFT 24
+#define SPI_ADDR_MASK (BIT(SPI_ADDR_SHIFT) - 1)
+#define SPI_TURNAROUND_SHIFT 5
+
+static int ksz_spi_read_reg(struct spi_device *spi, u32 reg, u8 *val,
+ unsigned int len)
+{
+ u32 txbuf;
+ int ret;
+
+ txbuf = reg & SPI_ADDR_MASK;
+ txbuf |= KS_SPIOP_RD << SPI_ADDR_SHIFT;
+ txbuf <<= SPI_TURNAROUND_SHIFT;
+ txbuf = cpu_to_be32(txbuf);
+
+ ret = spi_write_then_read(spi, &txbuf, 4, val, len);
+ return ret;
+}
+
+static int ksz_spi_read(struct ksz_device *dev, u32 reg, u8 *data,
+ unsigned int len)
+{
+ struct spi_device *spi = dev->priv;
+
+ return ksz_spi_read_reg(spi, reg, data, len);
+}
+
+static int ksz_spi_read8(struct ksz_device *dev, u32 reg, u8 *val)
+{
+ return ksz_spi_read(dev, reg, val, 1);
+}
+
+static int ksz_spi_read16(struct ksz_device *dev, u32 reg, u16 *val)
+{
+ int ret = ksz_spi_read(dev, reg, (u8 *)val, 2);
+
+ if (!ret)
+ *val = be16_to_cpu(*val);
+
+ return ret;
+}
+
+static int ksz_spi_read24(struct ksz_device *dev, u32 reg, u32 *val)
+{
+ int ret;
+
+ *val = 0;
+ ret = ksz_spi_read(dev, reg, (u8 *)val, 3);
+ if (!ret) {
+ *val = be32_to_cpu(*val);
+ /* convert to 24bit */
+ *val >>= 8;
+ }
+
+ return ret;
+}
+
+static int ksz_spi_read32(struct ksz_device *dev, u32 reg, u32 *val)
+{
+ int ret = ksz_spi_read(dev, reg, (u8 *)val, 4);
+
+ if (!ret)
+ *val = be32_to_cpu(*val);
+
+ return ret;
+}
+
+static int ksz_spi_write_reg(struct spi_device *spi, u32 reg, u8 *val,
+ unsigned int len)
+{
+ u32 txbuf;
+ u8 data[12];
+ int i;
+
+ txbuf = reg & SPI_ADDR_MASK;
+ txbuf |= (KS_SPIOP_WR << SPI_ADDR_SHIFT);
+ txbuf <<= SPI_TURNAROUND_SHIFT;
+ txbuf = cpu_to_be32(txbuf);
+
+ data[0] = txbuf & 0xFF;
+ data[1] = (txbuf & 0xFF00) >> 8;
+ data[2] = (txbuf & 0xFF0000) >> 16;
+ data[3] = (txbuf & 0xFF000000) >> 24;
+ for (i = 0; i < len; i++)
+ data[i + 4] = val[i];
+
+ return spi_write(spi, &data, 4 + len);
+}
+
+static int ksz_spi_write8(struct ksz_device *dev, u32 reg, u8 value)
+{
+ struct spi_device *spi = dev->priv;
+
+ return ksz_spi_write_reg(spi, reg, &value, 1);
+}
+
+static int ksz_spi_write16(struct ksz_device *dev, u32 reg, u16 value)
+{
+ struct spi_device *spi = dev->priv;
+
+ value = cpu_to_be16(value);
+ return ksz_spi_write_reg(spi, reg, (u8 *)&value, 2);
+}
+
+static int ksz_spi_write24(struct ksz_device *dev, u32 reg, u32 value)
+{
+ struct spi_device *spi = dev->priv;
+
+ /* make it to big endian 24bit from MSB */
+ value <<= 8;
+ value = cpu_to_be32(value);
+ return ksz_spi_write_reg(spi, reg, (u8 *)&value, 3);
+}
+
+static int ksz_spi_write32(struct ksz_device *dev, u32 reg, u32 value)
+{
+ struct spi_device *spi = dev->priv;
+
+ value = cpu_to_be32(value);
+ return ksz_spi_write_reg(spi, reg, (u8 *)&value, 4);
+}
+
+static const struct ksz_io_ops ksz_spi_ops = {
+ .read8 = ksz_spi_read8,
+ .read16 = ksz_spi_read16,
+ .read24 = ksz_spi_read24,
+ .read32 = ksz_spi_read32,
+ .write8 = ksz_spi_write8,
+ .write16 = ksz_spi_write16,
+ .write24 = ksz_spi_write24,
+ .write32 = ksz_spi_write32,
+};
+
+static int ksz_spi_probe(struct spi_device *spi)
+{
+ struct ksz_device *dev;
+ int ret;
+
+ dev = ksz_switch_alloc(&spi->dev, &ksz_spi_ops, spi);
+ if (!dev)
+ return -ENOMEM;
+
+ if (spi->dev.platform_data)
+ dev->pdata = spi->dev.platform_data;
+
+ ret = ksz_switch_register(dev);
+ if (ret)
+ return ret;
+
+ spi_set_drvdata(spi, dev);
+
+ return 0;
+}
+
+static int ksz_spi_remove(struct spi_device *spi)
+{
+ struct ksz_device *dev = spi_get_drvdata(spi);
+
+ if (dev)
+ ksz_switch_remove(dev);
+
+ return 0;
+}
+
+static const struct of_device_id ksz_dt_ids[] = {
+ { .compatible = "microchip,ksz9477" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, ksz_dt_ids);
+
+static struct spi_driver ksz_spi_driver = {
+ .driver = {
+ .name = "ksz9477-switch",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(ksz_dt_ids),
+ },
+ .probe = ksz_spi_probe,
+ .remove = ksz_spi_remove,
+};
+
+module_spi_driver(ksz_spi_driver);
+
+MODULE_AUTHOR("Woojung Huh <Woojung.Huh@microchip.com>");
+MODULE_DESCRIPTION("Microchip KSZ Series Switch SPI access Driver");
diff --git a/include/linux/platform_data/microchip-ksz.h b/include/linux/platform_data/microchip-ksz.h
new file mode 100644
index 0000000..84789ca
--- /dev/null
+++ b/include/linux/platform_data/microchip-ksz.h
@@ -0,0 +1,29 @@
+/*
+ * Microchip KSZ series switch platform data
+ *
+ * Copyright (C) 2017
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef __MICROCHIP_KSZ_H
+#define __MICROCHIP_KSZ_H
+
+#include <linux/kernel.h>
+
+struct ksz_platform_data {
+ u32 chip_id;
+ u16 enabled_ports;
+};
+
+#endif
--
2.7.4
^ permalink raw reply related
* [PATCH v3 net-next 2/5] phy: micrel: add Microchip KSZ 9477 Switch PHY support
From: Woojung.Huh @ 2017-05-19 22:57 UTC (permalink / raw)
To: andrew, f.fainelli, vivien.didelot, sergei.shtylyov
Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
Adding Microchip 9477 Phy included in KSZ9477 Switch.
Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
---
drivers/net/phy/micrel.c | 11 +++++++++++
include/linux/micrel_phy.h | 2 ++
2 files changed, 13 insertions(+)
diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 4cfd541..46e80bc 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -20,6 +20,7 @@
* ksz8081, ksz8091,
* ksz8061,
* Switch : ksz8873, ksz886x
+ * ksz9477
*/
#include <linux/kernel.h>
@@ -996,6 +997,16 @@ static struct phy_driver ksphy_driver[] = {
.read_status = ksz8873mll_read_status,
.suspend = genphy_suspend,
.resume = genphy_resume,
+}, {
+ .phy_id = PHY_ID_KSZ9477,
+ .phy_id_mask = MICREL_PHY_ID_MASK,
+ .name = "Microchip KSZ9477",
+ .features = PHY_GBIT_FEATURES,
+ .config_init = kszphy_config_init,
+ .config_aneg = genphy_config_aneg,
+ .read_status = genphy_read_status,
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
} };
module_phy_driver(ksphy_driver);
diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
index f541da6..472fa4d 100644
--- a/include/linux/micrel_phy.h
+++ b/include/linux/micrel_phy.h
@@ -37,6 +37,8 @@
#define PHY_ID_KSZ8795 0x00221550
+#define PHY_ID_KSZ9477 0x00221631
+
/* struct phy_device dev_flags definitions */
#define MICREL_PHY_50MHZ_CLK 0x00000001
#define MICREL_PHY_FXEN 0x00000002
--
2.7.4
^ permalink raw reply related
* [PATCH v3 net-next 4/5] dsa: Add spi support to Microchip KSZ switches
From: Woojung.Huh @ 2017-05-19 22:57 UTC (permalink / raw)
To: andrew, f.fainelli, vivien.didelot, sergei.shtylyov
Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
A sample SPI configuration for Microchip KSZ switches.
Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
Documentation/devicetree/bindings/net/dsa/ksz.txt | 73 +++++++++++++++++++++++
1 file changed, 73 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/dsa/ksz.txt
diff --git a/Documentation/devicetree/bindings/net/dsa/ksz.txt b/Documentation/devicetree/bindings/net/dsa/ksz.txt
new file mode 100644
index 0000000..8a13966
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/ksz.txt
@@ -0,0 +1,73 @@
+Microchip KSZ Series Ethernet switches
+==================================
+
+Required properties:
+
+- compatible: For external switch chips, compatible string must be exactly one
+ of: "microchip,ksz9477"
+
+See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional
+required and optional properties.
+
+Examples:
+
+Ethernet switch connected via SPI to the host, CPU port wired to eth0:
+
+ eth0: ethernet@10001000 {
+ fixed-link {
+ reg = <7>
+ speed = <1000>;
+ duplex-full;
+ };
+ };
+
+ spi1: spi@f8008000 {
+ pinctrl-0 = <&pinctrl_spi_ksz>;
+ cs-gpios = <&pioC 25 0>;
+ id = <1>;
+ status = "okay";
+
+ ksz9477: ksz9477@0 {
+ compatible = "microchip,ksz9477";
+ reg = <0>;
+
+ spi-max-frequency = <44000000>;
+ spi-cpha;
+ spi-cpol;
+
+ status = "okay";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan5";
+ };
+ port@5 {
+ reg = <5>;
+ label = "cpu";
+ ethernet = <ð0>;
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
--
2.7.4
^ permalink raw reply related
* [PATCH v3 net-next 5/5] dsa: add maintainer of Microchip KSZ switches
From: Woojung.Huh @ 2017-05-19 22:57 UTC (permalink / raw)
To: andrew, f.fainelli, davem, sergei.shtylyov; +Cc: netdev, davem, UNGLinuxDriver
From: Woojung Huh <Woojung.Huh@microchip.com>
Adding maintainer of Microchip KSZ switches.
Signed-off-by: Woojung Huh <Woojung.Huh@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
MAINTAINERS | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f7d568b..a72b40c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8454,6 +8454,16 @@ F: drivers/media/platform/atmel/atmel-isc.c
F: drivers/media/platform/atmel/atmel-isc-regs.h
F: devicetree/bindings/media/atmel-isc.txt
+MICROCHIP KSZ SERIES ETHERNET SWITCH DRIVER
+M: Woojung Huh <Woojung.Huh@microchip.com>
+M: Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
+L: netdev@vger.kernel.org
+S: Maintained
+F: net/dsa/tag_ksz.c
+F: drivers/net/dsa/microchip/*
+F: include/linux/platform_data/microchip-ksz.h
+F: Documentation/devicetree/bindings/net/dsa/ksz.txt
+
MICROCHIP USB251XB DRIVER
M: Richard Leitner <richard.leitner@skidata.com>
L: linux-usb@vger.kernel.org
--
2.7.4
^ permalink raw reply related
* Re: Alignment in BPF verifier
From: Daniel Borkmann @ 2017-05-19 23:05 UTC (permalink / raw)
To: David Miller, ecree; +Cc: ast, alexei.starovoitov, netdev
In-Reply-To: <20170519.163957.1950740987459934279.davem@davemloft.net>
On 05/19/2017 10:39 PM, David Miller wrote:
> From: Edward Cree <ecree@solarflare.com>
> Date: Fri, 19 May 2017 21:00:13 +0100
>
>> Well, I've managed to get somewhat confused by reg->id.
>> In particular, I'm unsure which bpf_reg_types can have an id, and what
>> exactly it means. There seems to be some code that checks around map value
>> pointers, which seems strange as maps have fixed sizes (and the comments in
>> enum bpf_reg_type make it seem like id is a PTR_TO_PACKET thing) - is this
Besides PTR_TO_PACKET also PTR_TO_MAP_VALUE_OR_NULL uses it to
track all registers (incl. spilled ones) with the same reg->id
that originated from the same map lookup. After the reg type is
then migrated to either PTR_TO_MAP_VALUE (resp. CONST_PTR_TO_MAP
for map in map) or UNKNOWN_VALUE depending on the branch, the
reg->id is then reset to 0 again. Whole reason for this is that
LLVM generates code where it can move and/or spill a reg of type
PTR_TO_MAP_VALUE_OR_NULL to other regs before we do the NULL
test on it, and later on it expects that the spilled or moved
regs work wrt access. So they're marked with an id and then all
of them are type migrated. So here meaning of reg->id is different
than in PTR_TO_PACKET case. Example:
0: (b7) r1 = 10
1: (7b) *(u64 *)(r10 -8) = r1
2: (bf) r2 = r10
3: (07) r2 += -8
4: (18) r1 = 0x59c00000
6: (85) call 1 //map lookup
7: (bf) r4 = r0
8: (15) if r0 == 0x0 goto pc+1
R0=map_value(ks=8,vs=8) R4=map_value_or_null(ks=8,vs=8) R10=fp
9: (7a) *(u64 *)(r4 +0) = 0
>> maybe because of map-of-maps support, can the contained maps have differing
>> element sizes? Or do we allow *(map_value + var + imm), if map_value + var
>> was appropriately bounds-checked?
>>
>> Does the 'id' identify the variable that was added to an object pointer, or
>> the object itself? Or does it blur these and identify (what the comment in
>> enum bpf_reg_type calls) "skb->data + (u16) var"?
>
> The reg->id value changes any time a variable gets added to a packet
> pointer.
>
> You will also notice right now that only packet pointers have their
> alignment tracked.
>
> I have changes pending that will do that for MAP pointers too, but
> it needs more work.
>
^ permalink raw reply
* Re: [PATCH v2 1/3] bpf: Use 1<<16 as ceiling for immediate alignment in verifier.
From: David Miller @ 2017-05-19 23:16 UTC (permalink / raw)
To: ast; +Cc: ecree, daniel, alexei.starovoitov, netdev
In-Reply-To: <a4a1fe92-fa35-1d3f-1b3c-e094d715db2c@fb.com>
From: Alexei Starovoitov <ast@fb.com>
Date: Fri, 19 May 2017 14:37:56 -0700
> On 5/19/17 1:41 PM, David Miller wrote:
>> From: Edward Cree <ecree@solarflare.com>
>> Date: Fri, 19 May 2017 18:17:42 +0100
>>
>>> One question: is there a way to build the verifier as userland code
>>> (or at least as a module), or will I have to reboot every time I
>>> want to test a change?
>>
>> There currently is no such machanism, you will have to reboot every
>> time.
>>
>> I have considered working on making the code buildable outside of the
>> kernel. It shouldn't be too hard.
>
> it's not hard.
> We did it twice and both times abandoned.
> First time to have 'user space verifier' to check programs before
> loading and second time for fuzzing via llvm.
> Abandoned since it diverges very quickly from kernel.
>
Well, my idea was the create an environment in which kernel verifier.c
could be built as-is.
Maybe there would be some small compromises in verifier.c such as an
ifdef test or two, but that should be it.
It really is just a piece of what amounts to compiler infrastructure
and not very kernel specific.
^ permalink raw reply
* Re: [PATCH net] bonding: fix accounting of active ports in 3ad
From: David Miller @ 2017-05-19 23:17 UTC (permalink / raw)
To: jarod; +Cc: linux-kernel, j.vosburgh, vfalico, andy, netdev
In-Reply-To: <95c9a6b9-ac60-caa1-416d-c74e1aea08f4@redhat.com>
From: Jarod Wilson <jarod@redhat.com>
Date: Fri, 19 May 2017 18:15:57 -0400
> On 2017-05-19 5:14 PM, David Miller wrote:
>> From: Jarod Wilson <jarod@redhat.com>
>> Date: Wed, 17 May 2017 11:11:44 -0400
>>
>>> As of 7bb11dc9f59d and 0622cab0341c, bond slaves in a 3ad bond are not
>>> removed from the aggregator when they are down, and the active slave
>>> count
>>> is NOT equal to number of ports in the aggregator, but rather the
>>> number
>>> of ports in the aggregator that are still enabled.
>> ...
>>> Remedy it by using the same logic introduced in
>>> 7bb11dc9f59d in __bond_3ad_get_active_agg_info(), so sysfs, procfs and
>> ^^^^^^^^^^^^
>>> netlink all report the number of active ports.
>> I think you mean to reference commit 0622cab0341c here not
>> 7bb11dc9f59d.
>
> D'oh, yes, you are entirely correct. Should I submit a v2 with that
> correction?
Yes, please.
^ permalink raw reply
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