* [PATCH net-next v3 3/4] net-next: mediatek: add support for MediaTek MT7622 SoC
From: sean.wang @ 2017-07-31 10:05 UTC (permalink / raw)
To: john, davem
Cc: nbd, netdev, linux-kernel, linux-mediatek, keyhaede, Sean Wang
In-Reply-To: <cover.1501494522.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
This patch adds the driver for ethernet controller on MT7622 SoC. It has
the similar handling logic as the previously MT7623 does, but there are
additions against with MT7623 SoC, the shared SGMII given for the dual
GMACs and including 5-ports 10/100 embedded switch support (ESW) as the
GMAC1 option, thus more clocks consumers for the extra feature are
introduced here. So for ease portability and maintenance, those
differences all are being kept inside the platform data as other drivers
usually do. Currently testing successfully is done with those patches for
the conditions such as GMAC2 with IP1001 PHY via RGMII and GMAC1/2 with
RTL8211F PHY via SGMII.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 67 ++++++++++++++++++++++++++++-
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 54 ++++++++++++++++++++++-
2 files changed, 117 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index ad48623..9f44246 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -52,7 +52,8 @@ static const struct mtk_ethtool_stats {
};
static const char * const mtk_clks_source_name[] = {
- "ethif", "esw", "gp1", "gp2", "trgpll"
+ "ethif", "esw", "gp0", "gp1", "gp2", "trgpll", "sgmii_tx250m",
+ "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll"
};
void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
@@ -162,6 +163,47 @@ static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, int speed)
mtk_w32(eth, val, TRGMII_TCK_CTRL);
}
+static void mtk_gmac_sgmii_hw_setup(struct mtk_eth *eth, int mac_id)
+{
+ u32 val;
+
+ /* Setup the link timer and QPHY power up inside SGMIISYS */
+ regmap_write(eth->sgmiisys, SGMSYS_PCS_LINK_TIMER,
+ SGMII_LINK_TIMER_DEFAULT);
+
+ regmap_read(eth->sgmiisys, SGMSYS_SGMII_MODE, &val);
+ val |= SGMII_REMOTE_FAULT_DIS;
+ regmap_write(eth->sgmiisys, SGMSYS_SGMII_MODE, val);
+
+ regmap_read(eth->sgmiisys, SGMSYS_PCS_CONTROL_1, &val);
+ val |= SGMII_AN_RESTART;
+ regmap_write(eth->sgmiisys, SGMSYS_PCS_CONTROL_1, val);
+
+ regmap_read(eth->sgmiisys, SGMSYS_QPHY_PWR_STATE_CTRL, &val);
+ val &= ~SGMII_PHYA_PWD;
+ regmap_write(eth->sgmiisys, SGMSYS_QPHY_PWR_STATE_CTRL, val);
+
+ /* Determine MUX for which GMAC uses the SGMII interface */
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_DUAL_GMAC_SHARED_SGMII)) {
+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
+ val &= ~SYSCFG0_SGMII_MASK;
+ val |= !mac_id ? SYSCFG0_SGMII_GMAC1 : SYSCFG0_SGMII_GMAC2;
+ regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val);
+
+ dev_info(eth->dev, "setup shared sgmii for gmac=%d\n",
+ mac_id);
+ }
+
+ /* Setup the GMAC1 going through SGMII path when SoC also support
+ * ESW on GMAC1
+ */
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_GMAC1_ESW | MTK_GMAC1_SGMII) &&
+ !mac_id) {
+ mtk_w32(eth, 0, MTK_MAC_MISC);
+ dev_info(eth->dev, "setup gmac1 going through sgmii");
+ }
+}
+
static void mtk_phy_link_adjust(struct net_device *dev)
{
struct mtk_mac *mac = netdev_priv(dev);
@@ -269,6 +311,7 @@ static int mtk_phy_connect(struct net_device *dev)
if (!np)
return -ENODEV;
+ mac->ge_mode = 0;
switch (of_get_phy_mode(np)) {
case PHY_INTERFACE_MODE_TRGMII:
mac->trgmii = true;
@@ -276,7 +319,10 @@ static int mtk_phy_connect(struct net_device *dev)
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII:
- mac->ge_mode = 0;
+ break;
+ case PHY_INTERFACE_MODE_SGMII:
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII))
+ mtk_gmac_sgmii_hw_setup(eth, mac->id);
break;
case PHY_INTERFACE_MODE_MII:
mac->ge_mode = 1;
@@ -2421,6 +2467,7 @@ static int mtk_get_chip_id(struct mtk_eth *eth, u32 *chip_id)
static bool mtk_is_hwlro_supported(struct mtk_eth *eth)
{
switch (eth->chip_id) {
+ case MT7622_ETH:
case MT7623_ETH:
return true;
}
@@ -2460,6 +2507,16 @@ static int mtk_probe(struct platform_device *pdev)
return PTR_ERR(eth->ethsys);
}
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) {
+ eth->sgmiisys =
+ syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "mediatek,sgmiisys");
+ if (IS_ERR(eth->sgmiisys)) {
+ dev_err(&pdev->dev, "no sgmiisys regmap found\n");
+ return PTR_ERR(eth->sgmiisys);
+ }
+ }
+
eth->pctl = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
"mediatek,pctl");
if (IS_ERR(eth->pctl)) {
@@ -2593,6 +2650,11 @@ static const struct mtk_soc_data mt2701_data = {
.required_clks = MT7623_CLKS_BITMAP
};
+static const struct mtk_soc_data mt7622_data = {
+ .caps = MTK_DUAL_GMAC_SHARED_SGMII | MTK_GMAC1_ESW,
+ .required_clks = MT7622_CLKS_BITMAP
+};
+
static const struct mtk_soc_data mt7623_data = {
.caps = MTK_GMAC1_TRGMII,
.required_clks = MT7623_CLKS_BITMAP
@@ -2600,6 +2662,7 @@ static const struct mtk_soc_data mt7623_data = {
const struct of_device_id of_mtk_match[] = {
{ .compatible = "mediatek,mt2701-eth", .data = &mt2701_data},
+ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data},
{ .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{},
};
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 8ade23df..4594862 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -302,6 +302,9 @@
#define PHY_IAC_REG_SHIFT 25
#define PHY_IAC_TIMEOUT HZ
+#define MTK_MAC_MISC 0x1000c
+#define MTK_MUX_TO_ESW BIT(0)
+
/* Mac control registers */
#define MTK_MAC_MCR(x) (0x10100 + (x * 0x100))
#define MAC_MCR_MAX_RX_1536 BIT(24)
@@ -357,11 +360,15 @@
#define ETHSYS_CHIPID0_3 0x0
#define ETHSYS_CHIPID4_7 0x4
#define MT7623_ETH 7623
+#define MT7622_ETH 7622
/* ethernet subsystem config register */
#define ETHSYS_SYSCFG0 0x14
#define SYSCFG0_GE_MASK 0x3
#define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2)))
+#define SYSCFG0_SGMII_MASK (3 << 8)
+#define SYSCFG0_SGMII_GMAC1 ((2 << 8) & GENMASK(9, 8))
+#define SYSCFG0_SGMII_GMAC2 ((3 << 8) & GENMASK(9, 8))
/* ethernet subsystem clock register */
#define ETHSYS_CLKCFG0 0x2c
@@ -372,6 +379,23 @@
#define RSTCTRL_FE BIT(6)
#define RSTCTRL_PPE BIT(31)
+/* SGMII subsystem config registers */
+/* Register to auto-negotiation restart */
+#define SGMSYS_PCS_CONTROL_1 0x0
+#define SGMII_AN_RESTART BIT(9)
+
+/* Register to programmable link timer, the unit in 2 * 8ns */
+#define SGMSYS_PCS_LINK_TIMER 0x18
+#define SGMII_LINK_TIMER_DEFAULT (0x186a0 & GENMASK(19, 0))
+
+/* Register to control remote fault */
+#define SGMSYS_SGMII_MODE 0x20
+#define SGMII_REMOTE_FAULT_DIS BIT(8)
+
+/* Register to power up QPHY */
+#define SGMSYS_QPHY_PWR_STATE_CTRL 0xe8
+#define SGMII_PHYA_PWD BIT(4)
+
struct mtk_rx_dma {
unsigned int rxd1;
unsigned int rxd2;
@@ -437,15 +461,31 @@ enum mtk_tx_flags {
enum mtk_clks_map {
MTK_CLK_ETHIF,
MTK_CLK_ESW,
+ MTK_CLK_GP0,
MTK_CLK_GP1,
MTK_CLK_GP2,
MTK_CLK_TRGPLL,
+ MTK_CLK_SGMII_TX_250M,
+ MTK_CLK_SGMII_RX_250M,
+ MTK_CLK_SGMII_CDR_REF,
+ MTK_CLK_SGMII_CDR_FB,
+ MTK_CLK_SGMII_CK,
+ MTK_CLK_ETH2PLL,
MTK_CLK_MAX
};
#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \
BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \
BIT(MTK_CLK_TRGPLL))
+#define MT7622_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \
+ BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \
+ BIT(MTK_CLK_GP2) | \
+ BIT(MTK_CLK_SGMII_TX_250M) | \
+ BIT(MTK_CLK_SGMII_RX_250M) | \
+ BIT(MTK_CLK_SGMII_CDR_REF) | \
+ BIT(MTK_CLK_SGMII_CDR_FB) | \
+ BIT(MTK_CLK_SGMII_CK) | \
+ BIT(MTK_CLK_ETH2PLL))
enum mtk_dev_state {
MTK_HW_INIT,
MTK_RESETTING
@@ -516,9 +556,16 @@ struct mtk_rx_ring {
#define MTK_TRGMII BIT(0)
#define MTK_GMAC1_TRGMII (BIT(1) | MTK_TRGMII)
+#define MTK_ESW BIT(4)
+#define MTK_GMAC1_ESW (BIT(5) | MTK_ESW)
+#define MTK_SGMII BIT(8)
+#define MTK_GMAC1_SGMII (BIT(9) | MTK_SGMII)
+#define MTK_GMAC2_SGMII (BIT(10) | MTK_SGMII)
+#define MTK_DUAL_GMAC_SHARED_SGMII (BIT(11) | MTK_GMAC1_SGMII | \
+ MTK_GMAC2_SGMII)
#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
-/* struct mtk_soc_data - This is the structure holding all differences
+/* struct mtk_eth_data - This is the structure holding all differences
* among various plaforms
* @caps Flags shown the extra capability for the SoC
* @required_clks Flags shown the bitmap for required clocks on
@@ -547,6 +594,8 @@ struct mtk_soc_data {
* @msg_enable: Ethtool msg level
* @ethsys: The register map pointing at the range used to setup
* MII modes
+ * @sgmiisys: The register map pointing at the range used to setup
+ * SGMII modes
* @pctl: The register map pointing at the range used to setup
* GMAC port drive/slew values
* @dma_refcnt: track how many netdevs are using the DMA engine
@@ -560,7 +609,7 @@ struct mtk_soc_data {
* @clks: clock array for all clocks required
* @mii_bus: If there is a bus we need to create an instance for it
* @pending_work: The workqueue used to reset the dma ring
- * @state Initialization and runtime state of the device
+ * @state: Initialization and runtime state of the device
* @soc: Holding specific data among vaious SoCs
*/
@@ -577,6 +626,7 @@ struct mtk_eth {
u32 msg_enable;
unsigned long sysclk;
struct regmap *ethsys;
+ struct regmap *sgmiisys;
struct regmap *pctl;
u32 chip_id;
bool hwlro;
--
2.7.4
^ permalink raw reply related
* [PATCH net-next v3 2/4] net-next: mediatek: add platform data to adapt into various hardware
From: sean.wang @ 2017-07-31 10:05 UTC (permalink / raw)
To: john, davem
Cc: nbd, netdev, linux-kernel, linux-mediatek, keyhaede, Sean Wang
In-Reply-To: <cover.1501494522.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
This patch is the preparation patch in order to adapt into various
hardware through adding platform data which holds specific characteristics
among MediaTek SoCs and introducing the unified clock handler for those
distinct clock requirements depending on different features such as
TRGMII and SGMII getting support on the target SoC. And finally, add
enhancement with given the generic description for Kconfig and remove the
unnecessary machine type dependency in Makefile.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
drivers/net/ethernet/mediatek/Kconfig | 6 +--
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 75 ++++++++++++++++++++++++-----
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 23 ++++++++-
3 files changed, 88 insertions(+), 16 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/Kconfig b/drivers/net/ethernet/mediatek/Kconfig
index 698bb89..f9149d2 100644
--- a/drivers/net/ethernet/mediatek/Kconfig
+++ b/drivers/net/ethernet/mediatek/Kconfig
@@ -7,11 +7,11 @@ config NET_VENDOR_MEDIATEK
if NET_VENDOR_MEDIATEK
config NET_MEDIATEK_SOC
- tristate "MediaTek MT7623 Gigabit ethernet support"
- depends on NET_VENDOR_MEDIATEK && (MACH_MT7623 || MACH_MT2701)
+ tristate "MediaTek SoC Gigabit Ethernet support"
+ depends on NET_VENDOR_MEDIATEK
select PHYLIB
---help---
This driver supports the gigabit ethernet MACs in the
- MediaTek MT2701/MT7623 chipset family.
+ MediaTek SoC family.
endif #NET_VENDOR_MEDIATEK
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index b3d0c2e..ad48623 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -184,7 +184,8 @@ static void mtk_phy_link_adjust(struct net_device *dev)
break;
};
- if (mac->id == 0 && !mac->trgmii)
+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_GMAC1_TRGMII) &&
+ !mac->id && !mac->trgmii)
mtk_gmac0_rgmii_adjust(mac->hw, dev->phydev->speed);
if (dev->phydev->link)
@@ -1832,9 +1833,36 @@ static void ethsys_reset(struct mtk_eth *eth, u32 reset_bits)
mdelay(10);
}
+static void mtk_clk_disable(struct mtk_eth *eth)
+{
+ int clk;
+
+ for (clk = MTK_CLK_MAX - 1; clk >= 0; clk--)
+ clk_disable_unprepare(eth->clks[clk]);
+}
+
+static int mtk_clk_enable(struct mtk_eth *eth)
+{
+ int clk, ret;
+
+ for (clk = 0; clk < MTK_CLK_MAX ; clk++) {
+ ret = clk_prepare_enable(eth->clks[clk]);
+ if (ret)
+ goto err_disable_clks;
+ }
+
+ return 0;
+
+err_disable_clks:
+ while (--clk >= 0)
+ clk_disable_unprepare(eth->clks[clk]);
+
+ return ret;
+}
+
static int mtk_hw_init(struct mtk_eth *eth)
{
- int i, val;
+ int i, val, ret;
if (test_and_set_bit(MTK_HW_INIT, ð->state))
return 0;
@@ -1842,10 +1870,10 @@ static int mtk_hw_init(struct mtk_eth *eth)
pm_runtime_enable(eth->dev);
pm_runtime_get_sync(eth->dev);
- clk_prepare_enable(eth->clks[MTK_CLK_ETHIF]);
- clk_prepare_enable(eth->clks[MTK_CLK_ESW]);
- clk_prepare_enable(eth->clks[MTK_CLK_GP1]);
- clk_prepare_enable(eth->clks[MTK_CLK_GP2]);
+ ret = mtk_clk_enable(eth);
+ if (ret)
+ goto err_disable_pm;
+
ethsys_reset(eth, RSTCTRL_FE);
ethsys_reset(eth, RSTCTRL_PPE);
@@ -1913,6 +1941,12 @@ static int mtk_hw_init(struct mtk_eth *eth)
}
return 0;
+
+err_disable_pm:
+ pm_runtime_put_sync(eth->dev);
+ pm_runtime_disable(eth->dev);
+
+ return ret;
}
static int mtk_hw_deinit(struct mtk_eth *eth)
@@ -1920,10 +1954,7 @@ static int mtk_hw_deinit(struct mtk_eth *eth)
if (!test_and_clear_bit(MTK_HW_INIT, ð->state))
return 0;
- clk_disable_unprepare(eth->clks[MTK_CLK_GP2]);
- clk_disable_unprepare(eth->clks[MTK_CLK_GP1]);
- clk_disable_unprepare(eth->clks[MTK_CLK_ESW]);
- clk_disable_unprepare(eth->clks[MTK_CLK_ETHIF]);
+ mtk_clk_disable(eth);
pm_runtime_put_sync(eth->dev);
pm_runtime_disable(eth->dev);
@@ -2401,6 +2432,7 @@ static int mtk_probe(struct platform_device *pdev)
{
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
struct device_node *mac_np;
+ const struct of_device_id *match;
struct mtk_eth *eth;
int err;
int i;
@@ -2409,6 +2441,9 @@ static int mtk_probe(struct platform_device *pdev)
if (!eth)
return -ENOMEM;
+ match = of_match_device(of_mtk_match, &pdev->dev);
+ eth->soc = (struct mtk_soc_data *)match->data;
+
eth->dev = &pdev->dev;
eth->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(eth->base))
@@ -2445,7 +2480,12 @@ static int mtk_probe(struct platform_device *pdev)
if (IS_ERR(eth->clks[i])) {
if (PTR_ERR(eth->clks[i]) == -EPROBE_DEFER)
return -EPROBE_DEFER;
- return -ENODEV;
+ if (eth->soc->required_clks & BIT(i)) {
+ dev_err(&pdev->dev, "clock %s not found\n",
+ mtk_clks_source_name[i]);
+ return -EINVAL;
+ }
+ eth->clks[i] = NULL;
}
}
@@ -2548,8 +2588,19 @@ static int mtk_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_soc_data mt2701_data = {
+ .caps = MTK_GMAC1_TRGMII,
+ .required_clks = MT7623_CLKS_BITMAP
+};
+
+static const struct mtk_soc_data mt7623_data = {
+ .caps = MTK_GMAC1_TRGMII,
+ .required_clks = MT7623_CLKS_BITMAP
+};
+
const struct of_device_id of_mtk_match[] = {
- { .compatible = "mediatek,mt2701-eth" },
+ { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data},
+ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data},
{},
};
MODULE_DEVICE_TABLE(of, of_mtk_match);
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 5868a09..8ade23df 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -443,6 +443,9 @@ enum mtk_clks_map {
MTK_CLK_MAX
};
+#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \
+ BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \
+ BIT(MTK_CLK_TRGPLL))
enum mtk_dev_state {
MTK_HW_INIT,
MTK_RESETTING
@@ -511,6 +514,21 @@ struct mtk_rx_ring {
u32 crx_idx_reg;
};
+#define MTK_TRGMII BIT(0)
+#define MTK_GMAC1_TRGMII (BIT(1) | MTK_TRGMII)
+#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x))
+
+/* struct mtk_soc_data - This is the structure holding all differences
+ * among various plaforms
+ * @caps Flags shown the extra capability for the SoC
+ * @required_clks Flags shown the bitmap for required clocks on
+ * the target SoC
+ */
+struct mtk_soc_data {
+ u32 caps;
+ u32 required_clks;
+};
+
/* currently no SoC has more than 2 macs */
#define MTK_MAX_DEVS 2
@@ -542,7 +560,8 @@ struct mtk_rx_ring {
* @clks: clock array for all clocks required
* @mii_bus: If there is a bus we need to create an instance for it
* @pending_work: The workqueue used to reset the dma ring
- * @state Initialization and runtime state of the device.
+ * @state Initialization and runtime state of the device
+ * @soc: Holding specific data among vaious SoCs
*/
struct mtk_eth {
@@ -574,6 +593,8 @@ struct mtk_eth {
struct mii_bus *mii_bus;
struct work_struct pending_work;
unsigned long state;
+
+ const struct mtk_soc_data *soc;
};
/* struct mtk_mac - the structure that holds the info about the MACs of the
--
2.7.4
^ permalink raw reply related
* [PATCH net-next v3 1/4] dt-bindings: net: mediatek: add support for MediaTek MT7623 and MT7622 SoC
From: sean.wang @ 2017-07-31 10:05 UTC (permalink / raw)
To: john, davem
Cc: nbd, netdev, linux-kernel, linux-mediatek, keyhaede, Sean Wang
In-Reply-To: <cover.1501494522.git.sean.wang@mediatek.com>
From: Sean Wang <sean.wang@mediatek.com>
The patch adds the supplements in the dt-binding document for MediaTek
MT7622 SoC with extra SGMII system controller and relevant clock consumers
listed as the requirements for those SoCs equipped with the SGMII circuit.
Also, add the missing binding information for MT7623 SoC here which relies
on the fallback binding of MT2701.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
Documentation/devicetree/bindings/net/mediatek-net.txt | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt
index c7194e8..1d1168b 100644
--- a/Documentation/devicetree/bindings/net/mediatek-net.txt
+++ b/Documentation/devicetree/bindings/net/mediatek-net.txt
@@ -7,24 +7,30 @@ have dual GMAC each represented by a child node..
* Ethernet controller node
Required properties:
-- compatible: Should be "mediatek,mt2701-eth"
+- compatible: Should be
+ "mediatek,mt2701-eth": for MT2701 SoC
+ "mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC
+ "mediatek,mt7622-eth": for MT7622 SoC
- reg: Address and length of the register set for the device
- interrupts: Should contain the three frame engines interrupts in numeric
order. These are fe_int0, fe_int1 and fe_int2.
- clocks: the clock used by the core
- clock-names: the names of the clock listed in the clocks property. These are
- "ethif", "esw", "gp2", "gp1"
+ "ethif", "esw", "gp2", "gp1" : For MT2701 and MT7623 SoC
+ "ethif", "esw", "gp0", "gp1", "gp2", "sgmii_tx250m", "sgmii_rx250m",
+ "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll" : For MT7622 SoC
- power-domains: phandle to the power domain that the ethernet is part of
- resets: Should contain a phandle to the ethsys reset signal
- reset-names: Should contain the reset signal name "eth"
- mediatek,ethsys: phandle to the syscon node that handles the port setup
+- mediatek,sgmiisys: phandle to the syscon node that handles the SGMII setup
+ which is required for those SoCs equipped with SGMII such as MT7622 SoC.
- mediatek,pctl: phandle to the syscon node that handles the ports slew rate
and driver current
Optional properties:
- interrupt-parent: Should be the phandle for the interrupt controller
that services interrupts for this device
-
* Ethernet MAC node
Required properties:
--
2.7.4
^ permalink raw reply related
* [PATCH net-next v3 0/4] net-next: mediatek: add support for ethernet on MT7622 SoC
From: sean.wang-NuS5LvNUpcJWk0Htik3J/w @ 2017-07-31 10:05 UTC (permalink / raw)
To: john-Pj+rj9U5foFAfugRpC6u6w, davem-fT/PcQaiUtIeIZ0/mPfg9Q
Cc: nbd-p3rKhJxN3npAfugRpC6u6w, keyhaede-Re5JQEeQqe8AvxtiuMwx3w,
netdev-u79uwXL29TY76Z2rM5mHXA, Sean Wang,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Changes since v2:
- update John's mail
Changes since v1:
- add refinement for ethernet clock management
- take out the code block for ESW, add it until ESW driver is actually introduced
The series adds the driver for ethernet controller found on MT7622 SoC.
There are additions against with previous MT7623 SoC such as shared SGMII
given for the dual GMACs and built-in 5-ports 10/100 embedded switch support
(ESW). Thus more clocks consumers and SGMII hardware setup for the extra
features are all introduced here and as for the support for ESW that would be
planned to add in the separate patch integrating with DSA infrastructure
in the future.
Currently testing successfully is done with those patches for the conditions
such as GMAC2 with IP1001 PHY via RGMII and GMAC1/2 with RTL8211F PHY via SGMII.
Sean Wang (4):
dt-bindings: net: mediatek: add support for MediaTek MT7623 and MT7622
SoC
net-next: mediatek: add platform data to adapt into various hardware
net-next: mediatek: add support for MediaTek MT7622 SoC
MAINTAINERS: add Sean/Nelson as MediaTek ethernet maintainers
.../devicetree/bindings/net/mediatek-net.txt | 12 +-
MAINTAINERS | 4 +-
drivers/net/ethernet/mediatek/Kconfig | 6 +-
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 142 +++++++++++++++++++--
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 73 ++++++++++-
5 files changed, 215 insertions(+), 22 deletions(-)
--
2.7.4
^ permalink raw reply
* Re: [patch net-next 16/20] net: sched: cls_bpf: no need to call tcf_exts_change for newly allocated struct
From: Daniel Borkmann @ 2017-07-31 10:02 UTC (permalink / raw)
To: Jiri Pirko, netdev; +Cc: davem, jhs, xiyou.wangcong, mlxsw
In-Reply-To: <20170728144042.6380-17-jiri@resnulli.us>
On 07/28/2017 04:40 PM, Jiri Pirko wrote:
> From: Jiri Pirko <jiri@mellanox.com>
>
> As the prog struct was allocated right before cls_bpf_set_parms call,
> no need to use tcf_exts_change to do atomic change, and we can just
> fill-up the unused exts struct directly by tcf_exts_validate.
>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
^ permalink raw reply
* Re: [PATCH 1/2] ipv6: constify inet6_protocol structures
From: Eric Dumazet @ 2017-07-31 9:56 UTC (permalink / raw)
To: Julia Lawall; +Cc: David S. Miller, bhumirks, netdev
In-Reply-To: <1501273138-22771-2-git-send-email-Julia.Lawall@lip6.fr>
On Fri, 2017-07-28 at 22:18 +0200, Julia Lawall wrote:
> The inet6_protocol structure is only passed as the first argument to
> inet6_add_protocol or inet6_del_protocol, both of which are declared as
> const. Thus the inet6_protocol structure itself can be const.
>
> Also drop __read_mostly where present on the newly const structures.
>
> Done with the help of Coccinelle.
>
> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
>
> ---
> net/ipv6/ip6_gre.c | 2 +-
> net/ipv6/tcp_ipv6.c | 2 +-
> net/ipv6/udp.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c
> index 67ff2aa..33865d6 100644
> --- a/net/ipv6/ip6_gre.c
> +++ b/net/ipv6/ip6_gre.c
> @@ -1080,7 +1080,7 @@ static void ip6gre_fb_tunnel_init(struct net_device *dev)
> }
>
>
> -static struct inet6_protocol ip6gre_protocol __read_mostly = {
> +static const struct inet6_protocol ip6gre_protocol = {
> .handler = gre_rcv,
> .err_handler = ip6gre_err,
> .flags = INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL,
> diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c
> index 90a3257..2968a33 100644
> --- a/net/ipv6/tcp_ipv6.c
> +++ b/net/ipv6/tcp_ipv6.c
> @@ -1945,7 +1945,7 @@ struct proto tcpv6_prot = {
> .diag_destroy = tcp_abort,
> };
>
> -static struct inet6_protocol tcpv6_protocol = {
> +static const struct inet6_protocol tcpv6_protocol = {
> .early_demux = tcp_v6_early_demux,
> .early_demux_handler = tcp_v6_early_demux,
> .handler = tcp_v6_rcv,
> diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c
> index 4a3e656..5f8b8d7 100644
> --- a/net/ipv6/udp.c
> +++ b/net/ipv6/udp.c
> @@ -1448,7 +1448,7 @@ int compat_udpv6_getsockopt(struct sock *sk, int level, int optname,
> }
> #endif
>
> -static struct inet6_protocol udpv6_protocol = {
> +static const struct inet6_protocol udpv6_protocol = {
> .early_demux = udp_v6_early_demux,
> .early_demux_handler = udp_v6_early_demux,
> .handler = udpv6_rcv,
>
This change breaks the kernel if one of these sysctls are changed:
tcp_early_demux, udp_early_demux
Check commit dddb64bcb346 ("net: Add sysctl to toggle early demux for
tcp and udp") why at least 2 structures were no longer const.
(none):~# echo 0 >/proc/sys/net/ipv4/udp_early_demux
[ 101.746108] BUG: unable to handle kernel paging request at ffffffffb98cf5c0
[ 101.753093] IP: proc_udp_early_demux+0x46/0x60
[ 101.757565] PGD 13f540a067
[ 101.757565] P4D 13f540a067
[ 101.760372] PUD 13f540b063
[ 101.763171] PMD 80000013f50001e1
[ 101.765960]
[ 101.770790] Oops: 0003 [#1] SMP
[ 101.774376] gsmi: Log Shutdown Reason 0x03
[ 101.778473] Modules linked in: w1_therm wire cdc_acm ehci_pci ehci_hcd mlx4_en ib_uverbs mlx4_ib ib_core mlx4_core
[ 101.788890] CPU: 3 PID: 8819 Comm: bash Not tainted 4.13.0-smp-DEV #290
[ 101.795549] Hardware name: Intel RML,PCH/Iota_QC_19, BIOS 2.40.0 06/22/2016
[ 101.802517] task: ffff8e733b9c4140 task.stack: ffffa43548cd0000
[ 101.808445] RIP: 0010:proc_udp_early_demux+0x46/0x60
[ 101.813445] RSP: 0018:ffffa43548cd3e60 EFLAGS: 00010246
[ 101.818676] RAX: 0000000000000000 RBX: 0000000000000001 RCX: 0000000000000000
[ 101.825816] RDX: ffffffffb98cf5c0 RSI: 0000000000000000 RDI: ffff8e733f400100
[ 101.832957] RBP: ffffa43548cd3e68 R08: 0000000000000000 R09: 0000000000000001
[ 101.840096] R10: 0000000000000008 R11: f000000000000000 R12: 0000000000000001
[ 101.847260] R13: ffffffffffffffea R14: 0000000000000002 R15: ffffffffb9d00380
[ 101.854434] FS: 00007f7e1f34a700(0000) GS:ffff8e733f8c0000(0000) knlGS:0000000000000000
[ 101.862518] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 101.868263] CR2: ffffffffb98cf5c0 CR3: 000000100f0c8000 CR4: 00000000001406e0
[ 101.875439] Call Trace:
[ 101.877888] proc_sys_call_handler+0xf3/0x190
[ 101.882260] proc_sys_write+0x14/0x20
[ 101.885944] vfs_write+0xc8/0x1e0
[ 101.889261] SyS_write+0x48/0xa0
[ 101.892520] entry_SYSCALL_64_fastpath+0x13/0x94
[ 101.897137] RIP: 0033:0x7f7e1ebd64a0
[ 101.900707] RSP: 002b:00007ffcbb851c58 EFLAGS: 00000246 ORIG_RAX: 0000000000000001
[ 101.908306] RAX: ffffffffffffffda RBX: 000000000232aba8 RCX: 00007f7e1ebd64a0
[ 101.915437] RDX: 0000000000000002 RSI: 00000000022ea808 RDI: 0000000000000001
[ 101.922567] RBP: 00007ffcbb851c50 R08: 00007f7e1ef691b0 R09: 00007f7e1f34a700
[ 101.929698] R10: 000000000048926a R11: 0000000000000246 R12: 000000000232b288
[ 101.936871] R13: 0000000002325e28 R14: 00000000022f0ce8 R15: 0000000000000000
[ 101.944012] Code: 15 e8 07 84 00 8b 0d 9a 3c 7d 00 48 85 d2 74 09 31 f6 85 c9 75 21 48 89 32 48 8b 15 4d 30 84 00 48 85 d2 74 09 31 f6 85 c9 75 06 <48> 89 32 5b 5d c3 48 8b 72 08 eb f4 48 8b 72 08 eb d9 0f 1f 84
[ 101.962907] RIP: proc_udp_early_demux+0x46/0x60 RSP: ffffa43548cd3e60
[ 101.969353] CR2: ffffffffb98cf5c0
[ 101.972680] ---[ end trace 116c0975bf9e19dd ]---
[ 101.977307] Kernel panic - not syncing: Fatal exception
[ 101.982590] Kernel Offset: 0x37e00000 from 0xffffffff81000000 (relocation range: 0xffffffff80000000-0xffffffffbfffffff)
^ permalink raw reply
* Re: [PATCH v5 net-next] net: systemport: Support 64bit statistics
From: Eric Dumazet @ 2017-07-31 9:37 UTC (permalink / raw)
To: Jianming.qiao; +Cc: f.fainelli, davem, netdev
In-Reply-To: <1501459275-7635-1-git-send-email-jqiaoulk@gmail.com>
On Mon, 2017-07-31 at 01:01 +0100, Jianming.qiao wrote:
...
> + for (q = 0; q < dev->num_tx_queues; q++) {
> + ring = &priv->tx_rings[q];
> + do {
> + start = u64_stats_fetch_begin_irq(&stats64->syncp);
> + tx_bytes += ring->bytes;
> + tx_packets += ring->packets;
> + } while (u64_stats_fetch_retry_irq(&stats64->syncp, start));
> + }
This is broken.
If the retry loop is ever done, tx_bytes and tx_packets get wrong value.
^ permalink raw reply
* Re: [patch net-next 10/20] net: sched: cls_bpf: rename cls_bpf_modify_existing function
From: Daniel Borkmann @ 2017-07-31 9:30 UTC (permalink / raw)
To: Jiri Pirko, netdev; +Cc: davem, jhs, xiyou.wangcong, mlxsw
In-Reply-To: <20170728144042.6380-11-jiri@resnulli.us>
On 07/28/2017 04:40 PM, Jiri Pirko wrote:
> From: Jiri Pirko <jiri@mellanox.com>
>
> The name cls_bpf_modify_existing is highly misleading, as it indeed does
> not modify anything existing. It does not modify at all.
>
> Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Acked-by: Daniel Borkmann <daniel@iogearbox.net>
^ permalink raw reply
* [PATCH] ISDN: eicon: fix array-bounds warning properly
From: Arnd Bergmann @ 2017-07-31 9:04 UTC (permalink / raw)
To: Armin Schindler, Karsten Keil; +Cc: Arnd Bergmann, netdev, linux-kernel
I patched a variant of this warning before, but now saw it come back
in a different configuration with gcc-7 and UBSAN:
drivers/isdn/hardware/eicon/message.c: In function 'mixer_notify_update':
drivers/isdn/hardware/eicon/message.c:11162:54: error: array subscript is above array bounds [-Werror=array-bounds]
((CAPI_MSG *) msg)->info.facility_req.structs[1] = LI_REQ_SILENT_UPDATE & 0xff;
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/isdn/hardware/eicon/message.c:11163:54: error: array subscript is above array bounds [-Werror=array-bounds]
((CAPI_MSG *) msg)->info.facility_req.structs[2] = LI_REQ_SILENT_UPDATE >> 8;
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/isdn/hardware/eicon/message.c:11164:54: error: array subscript is above array bounds [-Werror=array-bounds]
((CAPI_MSG *) msg)->info.facility_req.structs[3] = 0;
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
I spent a long time narrowing down what caused this, as I suspected
yet another false-positive warning in gcc. However, this time it
turned out to be an ancient kernel bug, which probably prevented
this from ever working on 64-bit machines, causing a stack
buffer overflow as indicated by the warning originally.
The problem is that having a 64-bit pointer inside of the CAPI_MSG->info
union leads to the start of the union to become 64-bit aligned by adding
four padding bytes. The structure is however aliased to a fixed-length
array on the stack in mixer_notify_update(), and later copied directly
to the hardware, so both go wrong.
This just removes the fields that were apparently added in a misguided
attempt to make the driver work on 64-bit machines but never actually
used.
Fixes: 950eabbd6dde ("ISDN: eicon: silence misleading array-bounds warning")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/isdn/hardware/eicon/capi20.h | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/drivers/isdn/hardware/eicon/capi20.h b/drivers/isdn/hardware/eicon/capi20.h
index 391e4175b0b5..7b97cd576485 100644
--- a/drivers/isdn/hardware/eicon/capi20.h
+++ b/drivers/isdn/hardware/eicon/capi20.h
@@ -301,14 +301,6 @@ typedef struct {
word Number;
word Flags;
} _DAT_B3_REQP;
-/* DATA-B3-REQUEST 64 BIT Systems */
-typedef struct {
- dword Data;
- word Data_Length;
- word Number;
- word Flags;
- void *pData;
-} _DAT_B3_REQ64P;
/* DATA-B3-CONFIRM */
typedef struct {
word Number;
@@ -321,14 +313,6 @@ typedef struct {
word Number;
word Flags;
} _DAT_B3_INDP;
-/* DATA-B3-INDICATION 64 BIT Systems */
-typedef struct {
- dword Data;
- word Data_Length;
- word Number;
- word Flags;
- void *pData;
-} _DAT_B3_IND64P;
/* DATA-B3-RESPONSE */
typedef struct {
word Number;
@@ -409,10 +393,8 @@ struct _API_MSG {
_DIS_B3_INDP disconnect_b3_ind;
_DIS_B3_RESP disconnect_b3_res;
_DAT_B3_REQP data_b3_req;
- _DAT_B3_REQ64P data_b3_req64;
_DAT_B3_CONP data_b3_con;
_DAT_B3_INDP data_b3_ind;
- _DAT_B3_IND64P data_b3_ind64;
_DAT_B3_RESP data_b3_res;
_RES_B3_REQP reset_b3_req;
_RES_B3_CONP reset_b3_con;
--
2.9.0
^ permalink raw reply related
* RE: [PATCH V5 net-next 2/8] net: hns3: Add support of the HNAE3 framework
From: Salil Mehta @ 2017-07-31 9:04 UTC (permalink / raw)
To: Leon Romanovsky
Cc: davem@davemloft.net, Zhuangyuzeng (Yisen), huangdaode, lipeng (Y),
mehta.salil.lnk@gmail.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rdma@vger.kernel.org,
Linuxarm
In-Reply-To: <20170730095834.GP13672@mtr-leonro.local>
Hi Leon,
> -----Original Message-----
> From: linux-rdma-owner@vger.kernel.org [mailto:linux-rdma-
> owner@vger.kernel.org] On Behalf Of Leon Romanovsky
> Sent: Sunday, July 30, 2017 10:59 AM
> To: Salil Mehta
> Cc: davem@davemloft.net; Zhuangyuzeng (Yisen); huangdaode; lipeng (Y);
> mehta.salil.lnk@gmail.com; netdev@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-rdma@vger.kernel.org; Linuxarm
> Subject: Re: [PATCH V5 net-next 2/8] net: hns3: Add support of the
> HNAE3 framework
>
> On Fri, Jul 28, 2017 at 11:26:46PM +0100, Salil Mehta wrote:
> > This patch adds the support of the HNAE3 (Hisilicon Network
> > Acceleration Engine 3) framework support to the HNS3 driver.
> >
> > Framework facilitates clients like ENET(HNS3 Ethernet Driver), RoCE
> > and user-space Ethernet drivers (like ODP etc.) to register with
> HNAE3
> > devices and their associated operations.
> >
> > Signed-off-by: Daode Huang <huangdaode@hisilicon.com>
> > Signed-off-by: lipeng <lipeng321@huawei.com>
> > Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
> > Signed-off-by: Yisen Zhuang <yisen.zhuang@huawei.com>
> > ---
> > Patch V5: Addressed following comments
> > 1. Leon Romanovsky:
> > https://lkml.org/lkml/2017/7/23/67
> > Patch V4: Addressed following comments
> > 1. Andrew Lunn:
> > https://lkml.org/lkml/2017/6/17/233
> > https://lkml.org/lkml/2017/6/18/105
> > 2. Bo Yu:
> > https://lkml.org/lkml/2017/6/18/112
> > 3. Stephen Hamminger:
> > https://lkml.org/lkml/2017/6/19/778
> > Patch V3: Addressed below comments
> > 1. Andrew Lunn:
> > https://lkml.org/lkml/2017/6/13/1025
> > Patch V2: No change
> > Patch V1: Initial Submit
> > ---
> > drivers/net/ethernet/hisilicon/hns3/hnae3.c | 319
> ++++++++++++++++++++
> > drivers/net/ethernet/hisilicon/hns3/hnae3.h | 444
> ++++++++++++++++++++++++++++
> > 2 files changed, 763 insertions(+)
> > create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.c
> > create mode 100644 drivers/net/ethernet/hisilicon/hns3/hnae3.h
> >
> > diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.c
> b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
> > new file mode 100644
> > index 0000000..d28b69d
> > --- /dev/null
> > +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.c
> > @@ -0,0 +1,319 @@
> > +/*
> > + * Copyright (c) 2016-2017 Hisilicon Limited.
> > + *
> > + * This program is free software; you can redistribute it and/or
> modify
> > + * it under the terms of the GNU General Public License as published
> by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +
> > +#include <linux/list.h>
> > +#include <linux/slab.h>
> > +#include <linux/spinlock.h>
> > +
> > +#include "hnae3.h"
> > +
> > +static LIST_HEAD(hnae3_ae_algo_list);
> > +static LIST_HEAD(hnae3_client_list);
> > +static LIST_HEAD(hnae3_ae_dev_list);
> > +
> > +/* we are keeping things simple and using single lock for all the
> > + * list. This is a non-critical code so other updations, if happen
> > + * in parallel, can wait.
> > + */
> > +static DEFINE_MUTEX(hnae3_common_lock);
> > +
> > +static bool hnae3_client_match(enum hnae3_client_type client_type,
> > + enum hnae3_dev_type dev_type)
> > +{
> > + if (dev_type == HNAE3_DEV_KNIC) {
> > + switch (client_type) {
> > + case HNAE3_CLIENT_KNIC:
> > + case HNAE3_CLIENT_ROCE:
> > + return true;
> > + default:
> > + return false;
> > + }
> > + } else if (dev_type == HNAE3_DEV_UNIC) {
> > + switch (client_type) {
> > + case HNAE3_CLIENT_UNIC:
> > + return true;
> > + default:
> > + return false;
> > + }
> > + } else {
> > + return false;
> > + }
> > +}
>
> Slightly compact version:
>
> static bool hnae3_client_match(enum hnae3_client_type client_type,
> enum hnae3_dev_type dev_type)
> {
> if (dev_type == HNAE3_DEV_KNIC &&
> client_type == HNAE3_CLIENT_KNIC || client_type ==
> HNAE3_CLIENT_ROCE)
> return true;
> if (dev_type == HNAE3_DEV_UNIC && client_type ==
> HNAE3_CLIENT_UNIC)
> return true;
> return false;
> }
Ok will change but I have felt usually with switch code looks more readable.
Thanks
>
>
> > +
> > +static int hnae3_match_n_instantiate(struct hnae3_client *client,
> > + struct hnae3_ae_dev *ae_dev,
> > + bool is_reg, bool *matched)
> > +{
> > + int ret;
> > +
> > + *matched = false;
> > +
> > + /* check if this client matches the type of ae_dev */
> > + if (!(hnae3_client_match(client->type, ae_dev->dev_type) &&
> > + hnae_get_bit(ae_dev->flag, HNAE3_DEV_INITED_B))) {
> > + return 0;
> > + }
> > + /* there is a match of client and dev */
> > + *matched = true;
> > +
> > + if (!(ae_dev->ops && ae_dev->ops->init_client_instance &&
> > + ae_dev->ops->uninit_client_instance)) {
> > + dev_err(&ae_dev->pdev->dev,
> > + "ae_dev or client init/uninit ops are null\n");
> > + return -EOPNOTSUPP;
> > + }
>
> You should check it during registration phase, IMHO in other places it
> is
> safe to assume that you have init/uninit functions.
Yes, makes sense. Will change this.
Thanks
>
> > +
> > + /* now, (un-)instantiate client by calling lower layer */
> > + if (is_reg) {
> > + ret = ae_dev->ops->init_client_instance(client, ae_dev);
> > + if (ret)
> > + dev_err(&ae_dev->pdev->dev,
> > + "fail to instantiate client\n");
> > + return ret;
> > + }
> > +
> > + ae_dev->ops->uninit_client_instance(client, ae_dev);
> > + return 0;
> > +}
> > +
> > +int hnae3_register_client(struct hnae3_client *client)
> > +{
> > + struct hnae3_client *client_tmp;
> > + struct hnae3_ae_dev *ae_dev;
> > + bool matched;
> > + int ret = 0;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > + /* one system should only have one client for every type */
> > + list_for_each_entry(client_tmp, &hnae3_client_list, node) {
> > + if (client_tmp->type == client->type)
> > + goto exit;
> > + }
> > +
> > + list_add_tail(&client->node, &hnae3_client_list);
> > +
> > + /* initialize the client on every matched port */
> > + list_for_each_entry(ae_dev, &hnae3_ae_dev_list, node) {
> > + /* if the client could not be initialized on current port,
> for
> > + * any error reasons, move on to next available port
> > + */
> > + ret = hnae3_match_n_instantiate(client, ae_dev, true,
> &matched);
> > + if (ret)
> > + dev_err(&ae_dev->pdev->dev,
> > + "match and instantiation failed for port\n");
> > + }
> > +
> > +exit:
> > + mutex_unlock(&hnae3_common_lock);
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL(hnae3_register_client);
> > +
> > +void hnae3_unregister_client(struct hnae3_client *client)
> > +{
> > + struct hnae3_ae_dev *ae_dev;
> > + bool matched;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > + /* un-initialize the client on every matched port */
> > + list_for_each_entry(ae_dev, &hnae3_ae_dev_list, node) {
> > + hnae3_match_n_instantiate(client, ae_dev, false, &matched);
> > + }
> > +
> > + list_del(&client->node);
> > + mutex_unlock(&hnae3_common_lock);
> > +}
> > +EXPORT_SYMBOL(hnae3_unregister_client);
> > +
> > +/* hnae_ae_register - register a AE engine to hnae framework
> > + * @hdev: the hnae ae engine device
> > + * @owner: the module who provides this dev
> > + * NOTE: the duplicated name will not be checked
> > + */
> > +int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo)
> > +{
> > + const struct pci_device_id *id;
> > + struct hnae3_ae_dev *ae_dev;
> > + struct hnae3_client *client;
> > + bool matched;
> > + int ret = 0;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > +
> > + list_add_tail(&ae_algo->node, &hnae3_ae_algo_list);
> > +
> > + /* Check if this algo/ops matches the list of ae_devs */
> > + list_for_each_entry(ae_dev, &hnae3_ae_dev_list, node) {
> > + id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev);
> > + if (!id)
> > + continue;
> > +
> > + /* ae_dev init should set flag */
> > + ae_dev->ops = ae_algo->ops;
> > + ret = ae_algo->ops->init_ae_dev(ae_dev);
> > + if (ret) {
> > + dev_err(&ae_dev->pdev->dev, "init ae_dev error.\n");
> > + continue;
> > + }
> > +
> > + hnae_set_bit(ae_dev->flag, HNAE3_DEV_INITED_B, 1);
> > +
> > + /* check the client list for the match with this ae_dev
> type and
> > + * initialize the figure out client instance
> > + */
> > + list_for_each_entry(client, &hnae3_client_list, node) {
> > + ret = hnae3_match_n_instantiate(client, ae_dev, true,
> > + &matched);
> > + if (ret)
> > + dev_err(&ae_dev->pdev->dev,
> > + "match and instantiation failed\n");
> > + if (matched)
> > + break;
> > + }
> > + }
> > +
> > + mutex_unlock(&hnae3_common_lock);
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL(hnae3_register_ae_algo);
> > +
> > +/* hnae_ae_unregister - unregisters a HNAE AE engine
> > + * @cdev: the device to unregister
> > + */
> > +void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo)
> > +{
> > + const struct pci_device_id *id;
> > + struct hnae3_ae_dev *ae_dev;
> > + struct hnae3_client *client;
> > + bool matched;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > + /* Check if there are matched ae_dev */
> > + list_for_each_entry(ae_dev, &hnae3_ae_dev_list, node) {
> > + id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev);
> > + if (!id)
> > + continue;
> > +
> > + /* check the client list for the match with this ae_dev
> type and
> > + * un-initialize the figure out client instance
> > + */
> > + list_for_each_entry(client, &hnae3_client_list, node) {
> > + hnae3_match_n_instantiate(client, ae_dev, false,
> > + &matched);
> > + if (matched)
> > + break;
> > + }
> > +
> > + ae_algo->ops->uninit_ae_dev(ae_dev);
> > + hnae_set_bit(ae_dev->flag, HNAE3_DEV_INITED_B, 0);
> > + }
> > +
> > + list_del(&ae_algo->node);
> > + mutex_unlock(&hnae3_common_lock);
> > +}
> > +EXPORT_SYMBOL(hnae3_unregister_ae_algo);
> > +
> > +/* hnae_ae_register - register a AE engine to hnae framework
> > + * @hdev: the hnae ae engine device
> > + * @owner: the module who provides this dev
> > + * NOTE: the duplicated name will not be checked
> > + */
> > +int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev)
> > +{
> > + const struct pci_device_id *id;
> > + struct hnae3_ae_algo *ae_algo;
> > + struct hnae3_client *client;
> > + bool matched;
> > + int ret = 0;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > + list_add_tail(&ae_dev->node, &hnae3_ae_dev_list);
> > +
> > + /* Check if there are matched ae_algo */
> > + list_for_each_entry(ae_algo, &hnae3_ae_algo_list, node) {
> > + id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev);
> > + if (!id)
> > + continue;
> > +
> > + ae_dev->ops = ae_algo->ops;
> > +
> > + if (!ae_dev->ops) {
> > + dev_err(&ae_dev->pdev->dev, "ae_dev ops are null\n");
> > + goto out_err;
> > + }
> > +
> > + /* ae_dev init should set flag */
> > + ret = ae_dev->ops->init_ae_dev(ae_dev);
> > + if (ret) {
> > + dev_err(&ae_dev->pdev->dev, "init ae_dev error\n");
> > + goto out_err;
> > + }
> > +
> > + hnae_set_bit(ae_dev->flag, HNAE3_DEV_INITED_B, 1);
> > + break;
> > + }
> > +
> > + /* check the client list for the match with this ae_dev type and
> > + * initialize the figure out client instance
> > + */
> > + list_for_each_entry(client, &hnae3_client_list, node) {
> > + ret = hnae3_match_n_instantiate(client, ae_dev, true,
> > + &matched);
> > + if (ret)
> > + dev_err(&ae_dev->pdev->dev,
> > + "match and instantiation failed\n");
> > + if (matched)
> > + break;
> > + }
> > +
> > +out_err:
> > + mutex_unlock(&hnae3_common_lock);
> > +
> > + return ret;
> > +}
> > +EXPORT_SYMBOL(hnae3_register_ae_dev);
> > +
> > +/* hnae_ae_unregister - unregisters a HNAE AE engine
> > + * @cdev: the device to unregister
> > + */
> > +void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev)
> > +{
> > + const struct pci_device_id *id;
> > + struct hnae3_ae_algo *ae_algo;
> > + struct hnae3_client *client;
> > + bool matched;
> > +
> > + mutex_lock(&hnae3_common_lock);
> > + /* Check if there are matched ae_algo */
> > + list_for_each_entry(ae_algo, &hnae3_ae_algo_list, node) {
> > + id = pci_match_id(ae_algo->pdev_id_table, ae_dev->pdev);
> > + if (!id)
> > + continue;
> > +
> > + list_for_each_entry(client, &hnae3_client_list, node) {
> > + hnae3_match_n_instantiate(client, ae_dev, false,
> > + &matched);
> > + if (matched)
> > + break;
> > + }
> > +
> > + ae_algo->ops->uninit_ae_dev(ae_dev);
> > + hnae_set_bit(ae_dev->flag, HNAE3_DEV_INITED_B, 0);
> > + }
> > +
> > + list_del(&ae_dev->node);
> > + mutex_unlock(&hnae3_common_lock);
> > +}
> > +EXPORT_SYMBOL(hnae3_unregister_ae_dev);
> > +
> > +MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
> > +MODULE_LICENSE("GPL");
> > +MODULE_DESCRIPTION("HNAE3(Hisilicon Network Acceleration Engine)
> Framework");
> > diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
> b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
> > new file mode 100644
> > index 0000000..c2f6411
> > --- /dev/null
> > +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
> > @@ -0,0 +1,444 @@
> > +/*
> > + * Copyright (c) 2016-2017 Hisilicon Limited.
> > + *
> > + * This program is free software; you can redistribute it and/or
> modify
> > + * it under the terms of the GNU General Public License as published
> by
> > + * the Free Software Foundation; either version 2 of the License, or
> > + * (at your option) any later version.
> > + */
> > +
> > +#ifndef __HNAE_H
> > +#define __HNAE_H
> > +
> > +/* Names used in this framework:
> > + * ae handle (handle):
> > + * a set of queues provided by AE
> > + * ring buffer queue (rbq):
> > + * the channel between upper layer and the AE, can do tx and
> rx
> > + * ring:
> > + * a tx or rx channel within a rbq
> > + * ring description (desc):
> > + * an element in the ring with packet information
> > + * buffer:
> > + * a memory region referred by desc with the full packet
> payload
> > + *
> > + * "num" means a static number set as a parameter, "count" mean a
> dynamic
> > + * number set while running
> > + * "cb" means control block
> > + */
> > +
> > +#include <linux/acpi.h>
> > +#include <linux/delay.h>
> > +#include <linux/device.h>
> > +#include <linux/module.h>
> > +#include <linux/netdevice.h>
> > +#include <linux/pci.h>
> > +#include <linux/types.h>
> > +
> > +/* Device IDs */
> > +#define HNAE3_DEV_ID_GE 0xA220
> > +#define HNAE3_DEV_ID_25GE 0xA221
> > +#define HNAE3_DEV_ID_25GE_RDMA 0xA222
> > +#define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
> > +#define HNAE3_DEV_ID_50GE_RDMA 0xA224
> > +#define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
> > +#define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
> > +#define HNAE3_DEV_ID_100G_VF 0xA22E
> > +#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
> > +
> > +#define HNAE3_CLASS_NAME_SIZE 16
> > +
> > +#define HNAE3_DEV_INITED_B 0x0
> > +#define HNAE_DEV_SUPPORT_ROCE_B 0x1
> > +
> > +#define ring_ptr_move_fw(ring, p) \
> > + ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
> > +#define ring_ptr_move_bw(ring, p) \
> > + ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)-
> >desc_num)
> > +
> > +enum hns_desc_type {
> > + DESC_TYPE_SKB,
> > + DESC_TYPE_PAGE,
> > +};
> > +
> > +struct hnae3_handle;
> > +
> > +struct hnae3_queue {
> > + void __iomem *io_base;
> > + struct hnae3_ae_algo *ae_algo;
> > + struct hnae3_handle *handle;
> > + int tqp_index; /* index in a handle */
> > + u32 buf_size; /* size for hnae_desc->addr, preset by AE */
> > + u16 desc_num; /* total number of desc */
> > +};
> > +
> > +/*hnae3 loop mode*/
> > +enum hnae3_loop {
> > + HNAE3_MAC_INTER_LOOP_MAC,
> > + HNAE3_MAC_INTER_LOOP_SERDES,
> > + HNAE3_MAC_INTER_LOOP_PHY,
> > + HNAE3_MAC_LOOP_NONE,
> > +};
> > +
> > +enum hnae3_client_type {
> > + HNAE3_CLIENT_KNIC,
> > + HNAE3_CLIENT_UNIC,
> > + HNAE3_CLIENT_ROCE,
> > +};
> > +
> > +enum hnae3_dev_type {
> > + HNAE3_DEV_KNIC,
> > + HNAE3_DEV_UNIC,
> > +};
> > +
> > +/* mac media type */
> > +enum hnae3_media_type {
> > + HNAE3_MEDIA_TYPE_UNKNOWN,
> > + HNAE3_MEDIA_TYPE_FIBER,
> > + HNAE3_MEDIA_TYPE_COPPER,
> > + HNAE3_MEDIA_TYPE_BACKPLANE,
> > +};
> > +
> > +struct hnae3_vector_info {
> > + u8 __iomem *io_addr;
> > + int vector;
> > +};
> > +
> > +#define HNAE3_RING_TYPE_B 0
> > +#define HNAE3_RING_TYPE_TX 0
> > +#define HNAE3_RING_TYPE_RX 1
> > +
> > +struct hnae3_ring_chain_node {
> > + struct hnae3_ring_chain_node *next;
> > + u32 tqp_index;
> > + u32 flag;
> > +};
> > +
> > +#define HNAE3_IS_TX_RING(node) \
> > + (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
> > +
> > +struct hnae3_client_ops {
> > + int (*init_instance)(struct hnae3_handle *handle);
> > + void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
> > + void (*link_status_change)(struct hnae3_handle *handle, bool
> state);
> > +};
> > +
> > +#define HNAE3_CLIENT_NAME_LENGTH 16
> > +struct hnae3_client {
> > + char name[HNAE3_CLIENT_NAME_LENGTH];
> > + u16 version;
> > + unsigned long state;
> > + enum hnae3_client_type type;
> > + const struct hnae3_client_ops *ops;
> > + struct list_head node;
> > +};
> > +
> > +struct hnae3_ae_dev {
> > + struct pci_dev *pdev;
> > + const struct hnae3_ae_ops *ops;
> > + struct list_head node;
> > + u32 flag;
> > + enum hnae3_dev_type dev_type;
> > + void *priv;
> > +};
> > +
> > +/* This struct defines the operation on the handle.
> > + *
> > + * init_ae_dev(): (mandatory)
> > + * Get PF configure from pci_dev and initialize PF hardware
> > + * uninit_ae_dev()
> > + * Disable PF device and release PF resource
> > + * register_client
> > + * Register client to ae_dev
> > + * unregister_client()
> > + * Unregister client from ae_dev
> > + * start()
> > + * Enable the hardware
> > + * stop()
> > + * Disable the hardware
> > + * get_status()
> > + * Get the carrier state of the back channel of the handle, 1 for
> ok, 0 for
> > + * non-ok
> > + * get_ksettings_an_result()
> > + * Get negotiation status,speed and duplex
> > + * update_speed_duplex_h()
> > + * Update hardware speed and duplex
> > + * get_media_type()
> > + * Get media type of MAC
> > + * adjust_link()
> > + * Adjust link status
> > + * set_loopback()
> > + * Set loopback
> > + * set_promisc_mode
> > + * Set promisc mode
> > + * set_mtu()
> > + * set mtu
> > + * get_pauseparam()
> > + * get tx and rx of pause frame use
> > + * set_pauseparam()
> > + * set tx and rx of pause frame use
> > + * set_autoneg()
> > + * set auto autonegotiation of pause frame use
> > + * get_autoneg()
> > + * get auto autonegotiation of pause frame use
> > + * get_coalesce_usecs()
> > + * get usecs to delay a TX interrupt after a packet is sent
> > + * get_rx_max_coalesced_frames()
> > + * get Maximum number of packets to be sent before a TX interrupt.
> > + * set_coalesce_usecs()
> > + * set usecs to delay a TX interrupt after a packet is sent
> > + * set_coalesce_frames()
> > + * set Maximum number of packets to be sent before a TX interrupt.
> > + * get_mac_addr()
> > + * get mac address
> > + * set_mac_addr()
> > + * set mac address
> > + * add_uc_addr
> > + * Add unicast addr to mac table
> > + * rm_uc_addr
> > + * Remove unicast addr from mac table
> > + * set_mc_addr()
> > + * Set multicast address
> > + * add_mc_addr
> > + * Add multicast address to mac table
> > + * rm_mc_addr
> > + * Remove multicast address from mac table
> > + * update_stats()
> > + * Update Old network device statistics
> > + * get_ethtool_stats()
> > + * Get ethtool network device statistics
> > + * get_strings()
> > + * Get a set of strings that describe the requested objects
> > + * get_sset_count()
> > + * Get number of strings that @get_strings will write
> > + * update_led_status()
> > + * Update the led status
> > + * set_led_id()
> > + * Set led id
> > + * get_regs()
> > + * Get regs dump
> > + * get_regs_len()
> > + * Get the len of the regs dump
> > + * get_rss_key_size()
> > + * Get rss key size
> > + * get_rss_indir_size()
> > + * Get rss indirection table size
> > + * get_rss()
> > + * Get rss table
> > + * set_rss()
> > + * Set rss table
> > + * get_tc_size()
> > + * Get tc size of handle
> > + * get_vector()
> > + * Get vector number and vector information
> > + * map_ring_to_vector()
> > + * Map rings to vector
> > + * unmap_ring_from_vector()
> > + * Unmap rings from vector
> > + * add_tunnel_udp()
> > + * Add tunnel information to hardware
> > + * del_tunnel_udp()
> > + * Delete tunnel information from hardware
> > + * reset_queue()
> > + * Reset queue
> > + * get_fw_version()
> > + * Get firmware version
> > + * get_mdix_mode()
> > + * Get media typr of phy
> > + * set_vlan_filter()
> > + * Set vlan filter config of Ports
> > + * set_vf_vlan_filter()
> > + * Set vlan filter config of vf
> > + */
> > +struct hnae3_ae_ops {
> > + int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
> > + void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
> > +
> > + int (*init_client_instance)(struct hnae3_client *client,
> > + struct hnae3_ae_dev *ae_dev);
> > + void (*uninit_client_instance)(struct hnae3_client *client,
> > + struct hnae3_ae_dev *ae_dev);
> > + int (*start)(struct hnae3_handle *handle);
> > + void (*stop)(struct hnae3_handle *handle);
> > + int (*get_status)(struct hnae3_handle *handle);
> > + void (*get_ksettings_an_result)(struct hnae3_handle *handle,
> > + u8 *auto_neg, u32 *speed, u8 *duplex);
> > +
> > + int (*update_speed_duplex_h)(struct hnae3_handle *handle);
> > + int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int
> speed,
> > + u8 duplex);
> > +
> > + void (*get_media_type)(struct hnae3_handle *handle, u8
> *media_type);
> > + void (*adjust_link)(struct hnae3_handle *handle, int speed, int
> duplex);
> > + int (*set_loopback)(struct hnae3_handle *handle,
> > + enum hnae3_loop loop_mode, bool en);
> > +
> > + void (*set_promisc_mode)(struct hnae3_handle *handle, u32 en);
> > + int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
> > +
> > + void (*get_pauseparam)(struct hnae3_handle *handle,
> > + u32 *auto_neg, u32 *rx_en, u32 *tx_en);
> > + int (*set_pauseparam)(struct hnae3_handle *handle,
> > + u32 auto_neg, u32 rx_en, u32 tx_en);
> > +
> > + int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
> > + int (*get_autoneg)(struct hnae3_handle *handle);
> > +
> > + void (*get_coalesce_usecs)(struct hnae3_handle *handle,
> > + u32 *tx_usecs, u32 *rx_usecs);
> > + void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
> > + u32 *tx_frames, u32 *rx_frames);
> > + int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32
> timeout);
> > + int (*set_coalesce_frames)(struct hnae3_handle *handle,
> > + u32 coalesce_frames);
> > + void (*get_coalesce_range)(struct hnae3_handle *handle,
> > + u32 *tx_frames_low, u32 *rx_frames_low,
> > + u32 *tx_frames_high, u32 *rx_frames_high,
> > + u32 *tx_usecs_low, u32 *rx_usecs_low,
> > + u32 *tx_usecs_high, u32 *rx_usecs_high);
> > +
> > + void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
> > + int (*set_mac_addr)(struct hnae3_handle *handle, void *p);
> > + int (*add_uc_addr)(struct hnae3_handle *handle,
> > + const unsigned char *addr);
> > + int (*rm_uc_addr)(struct hnae3_handle *handle,
> > + const unsigned char *addr);
> > + int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
> > + int (*add_mc_addr)(struct hnae3_handle *handle,
> > + const unsigned char *addr);
> > + int (*rm_mc_addr)(struct hnae3_handle *handle,
> > + const unsigned char *addr);
> > +
> > + void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
> > + void (*update_stats)(struct hnae3_handle *handle,
> > + struct net_device_stats *net_stats);
> > + void (*get_stats)(struct hnae3_handle *handle, u64 *data);
> > +
> > + void (*get_strings)(struct hnae3_handle *handle,
> > + u32 stringset, u8 *data);
> > + int (*get_sset_count)(struct hnae3_handle *handle, int
> stringset);
> > +
> > + void (*get_regs)(struct hnae3_handle *handle, void *data);
> > + int (*get_regs_len)(struct hnae3_handle *handle);
> > +
> > + u32 (*get_rss_key_size)(struct hnae3_handle *handle);
> > + u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
> > + int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
> > + u8 *hfunc);
> > + int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
> > + const u8 *key, const u8 hfunc);
> > +
> > + int (*get_tc_size)(struct hnae3_handle *handle);
> > +
> > + int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
> > + struct hnae3_vector_info *vector_info);
> > + int (*map_ring_to_vector)(struct hnae3_handle *handle,
> > + int vector_num,
> > + struct hnae3_ring_chain_node *vr_chain);
> > + int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
> > + int vector_num,
> > + struct hnae3_ring_chain_node *vr_chain);
> > +
> > + int (*add_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
> > + int (*del_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
> > +
> > + void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
> > + u32 (*get_fw_version)(struct hnae3_handle *handle);
> > + void (*get_mdix_mode)(struct hnae3_handle *handle,
> > + u8 *tp_mdix_ctrl, u8 *tp_mdix);
> > +
> > + int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
> > + u16 vlan_id, bool is_kill);
> > + int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
> > + u16 vlan, u8 qos, __be16 proto);
> > +};
> > +
> > +struct hnae3_ae_algo {
> > + const struct hnae3_ae_ops *ops;
> > + struct list_head node;
> > + char name[HNAE3_CLASS_NAME_SIZE];
> > + const struct pci_device_id *pdev_id_table;
> > +};
> > +
> > +#define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16)
> > +#define HNAE3_ITR_COUNTDOWN_START 100
> > +
> > +struct hnae3_tc_info {
> > + u16 tqp_offset; /* TQP offset from base TQP */
> > + u16 tqp_count; /* Total TQPs */
> > + u8 up; /* user priority */
> > + u8 tc; /* TC index */
> > + bool enable; /* If this TC is enable or not */
> > +};
> > +
> > +#define HNAE3_MAX_TC 8
> > +struct hnae3_knic_private_info {
> > + struct net_device *netdev; /* Set by KNIC client when init
> instance */
> > + u16 rss_size; /* Allocated RSS queues */
> > + u16 rx_buf_len;
> > + u16 num_desc;
> > +
> > + u8 num_tc; /* Total number of enabled TCs */
> > + struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW
> TC */
> > +
> > + u16 num_tqps; /* total number of TQPs in this handle
> */
> > + struct hnae3_queue **tqp; /* array base of all TQPs in this
> instance */
> > +};
> > +
> > +struct hnae3_roce_private_info {
> > + struct net_device *netdev;
> > + void __iomem *roce_io_base;
> > + int base_vector;
> > + int num_vectors;
> > +};
> > +
> > +struct hnae3_unic_private_info {
> > + struct net_device *netdev;
> > + u16 rx_buf_len;
> > + u16 num_desc;
> > + u16 num_tqps; /* total number of tqps in this handle */
> > + struct hnae3_queue **tqp; /* array base of all TQPs of this
> instance */
> > +};
> > +
> > +#define HNAE3_SUPPORT_MAC_LOOPBACK 1
> > +#define HNAE3_SUPPORT_PHY_LOOPBACK 2
> > +#define HNAE3_SUPPORT_SERDES_LOOPBACK 4
> > +
> > +struct hnae3_handle {
> > + struct hnae3_client *client;
> > + struct pci_dev *pdev;
> > + void *priv;
> > + struct hnae3_ae_algo *ae_algo; /* the class who provides this
> handle */
> > + u64 flags; /* Indicate the capabilities for this handle*/
> > +
> > + union {
> > + struct net_device *netdev; /* first member */
> > + struct hnae3_knic_private_info kinfo;
> > + struct hnae3_unic_private_info uinfo;
> > + struct hnae3_roce_private_info rinfo;
> > + };
> > +
> > + u32 numa_node_mask; /* for multi-chip support */
> > +};
> > +
> > +#define hnae_set_field(origin, mask, shift, val) \
> > + do { \
> > + (origin) &= (~(mask)); \
> > + (origin) |= ((val) << (shift)) & (mask); \
> > + } while (0)
> > +#define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >>
> (shift))
> > +
> > +#define hnae_set_bit(origin, shift, val) \
> > + hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
> > +#define hnae_get_bit(origin, shift) \
> > + hnae_get_field((origin), (0x1 << (shift)), (shift))
> > +
> > +int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
> > +void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
> > +
> > +void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
> > +int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
> > +
> > +void hnae3_unregister_client(struct hnae3_client *client);
> > +int hnae3_register_client(struct hnae3_client *client);
> > +#endif
> > --
> > 2.7.4
> >
> >
^ permalink raw reply
* Re: [net-next PATCH 11/12] net: add notifier hooks for devmap bpf map
From: Daniel Borkmann @ 2017-07-31 8:55 UTC (permalink / raw)
To: Levin, Alexander (Sasha Levin), John Fastabend
Cc: davem@davemloft.net, ast@fb.com, netdev@vger.kernel.org,
brouer@redhat.com, andy@greyhouse.net
In-Reply-To: <20170730132931.gmzb6r4qaxxpsuir@sasha-lappy>
On 07/30/2017 03:28 PM, Levin, Alexander (Sasha Levin) wrote:
> On Mon, Jul 17, 2017 at 09:30:02AM -0700, John Fastabend wrote:
>> @@ -341,9 +368,11 @@ static int dev_map_update_elem(struct bpf_map *map, void *key, void *value,
>> * Remembering the driver side flush operation will happen before the
>> * net device is removed.
>> */
>> + mutex_lock(&dev_map_list_mutex);
>> old_dev = xchg(&dtab->netdev_map[i], dev);
>> if (old_dev)
>> call_rcu(&old_dev->rcu, __dev_map_entry_free);
>> + mutex_unlock(&dev_map_list_mutex);
>>
>> return 0;
>> }
>
> This function gets called under rcu critical section, where we can't grab mutexes:
Agree, same goes for the delete callback that mutex is not allowed
in this context. If I recall, this was for the devmap netdev notifier
in order to check whether we need to purge dev entries from the map,
so that the device can be unregistered gracefully. Given that devmap
ops like update/delete are only allowed from user space, we could
look into whether this map type actually needs to hold RCU at all
here, or other option is to try and get rid of the mutex altogether.
John, could you take a look for a fix?
Thanks a lot,
Daniel
> BUG: sleeping function called from invalid context at kernel/locking/mutex.c:747
> in_atomic(): 1, irqs_disabled(): 0, pid: 16315, name: syz-executor1
> 1 lock held by syz-executor1/16315:
> #0: (rcu_read_lock){......}, at: [<ffffffff8c363bc2>] map_delete_elem kernel/bpf/syscall.c:577 [inline]
> #0: (rcu_read_lock){......}, at: [<ffffffff8c363bc2>] SYSC_bpf kernel/bpf/syscall.c:1427 [inline]
> #0: (rcu_read_lock){......}, at: [<ffffffff8c363bc2>] SyS_bpf+0x1d32/0x4ba0 kernel/bpf/syscall.c:1388
> Preemption disabled at:
> [<ffffffff8c363bd1>] map_delete_elem kernel/bpf/syscall.c:582 [inline]
> [<ffffffff8c363bd1>] SYSC_bpf kernel/bpf/syscall.c:1427 [inline]
> [<ffffffff8c363bd1>] SyS_bpf+0x1d41/0x4ba0 kernel/bpf/syscall.c:1388
> CPU: 2 PID: 16315 Comm: syz-executor1 Not tainted 4.13.0-rc2-next-20170727 #235
> Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.10.1-1ubuntu1 04/01/2014
> Call Trace:
> __dump_stack lib/dump_stack.c:16 [inline]
> dump_stack+0x11d/0x1e5 lib/dump_stack.c:52
> ___might_sleep+0x3cc/0x520 kernel/sched/core.c:6001
> __might_sleep+0x95/0x190 kernel/sched/core.c:5954
> __mutex_lock_common kernel/locking/mutex.c:747 [inline]
> __mutex_lock+0x146/0x19b0 kernel/locking/mutex.c:893
> mutex_lock_nested+0x16/0x20 kernel/locking/mutex.c:908
> dev_map_delete_elem+0x82/0x110 kernel/bpf/devmap.c:325
> map_delete_elem kernel/bpf/syscall.c:585 [inline]
> SYSC_bpf kernel/bpf/syscall.c:1427 [inline]
> SyS_bpf+0x1deb/0x4ba0 kernel/bpf/syscall.c:1388
> do_syscall_64+0x26a/0x800 arch/x86/entry/common.c:287
> entry_SYSCALL64_slow_path+0x25/0x25
> RIP: 0033:0x452309
> RSP: 002b:00007f8d83d66c08 EFLAGS: 00000216 ORIG_RAX: 0000000000000141
> RAX: ffffffffffffffda RBX: 0000000000718000 RCX: 0000000000452309
> RDX: 0000000000000010 RSI: 0000000020007000 RDI: 0000000000000003
> RBP: 0000000000000270 R08: 0000000000000000 R09: 0000000000000000
> R10: 0000000000000000 R11: 0000000000000216 R12: 00000000004b85e4
> R13: 00000000ffffffff R14: 0000000000000003 R15: 0000000020007000
>
^ permalink raw reply
* Re: [PATCH] netfilter: ipvs: Fix space before '[' error.
From: Simon Horman @ 2017-07-31 8:15 UTC (permalink / raw)
To: Arvind Yadav
Cc: wensong, ja, pablo, kadlec, fw, davem, netdev, lvs-devel,
netfilter-devel, coreteam, linux-kernel
In-Reply-To: <3b2fae111371a2abd12d6838e825452a3c9bd4fa.1501397734.git.arvind.yadav.cs@gmail.com>
On Sun, Jul 30, 2017 at 12:29:25PM +0530, Arvind Yadav wrote:
> Fix checkpatch.pl error:
> ERROR: space prohibited before open square bracket '['.
>
> Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Thanks, applied for v4.14.
^ permalink raw reply
* [PATCH net-next] ipv6: Avoid going through ->sk_net to access the netns
From: Jakub Sitnicki @ 2017-07-31 8:09 UTC (permalink / raw)
To: netdev; +Cc: David S. Miller
There is no need to go through sk->sk_net to access the net namespace
and its sysctl variables because we allocate the sock and initialize
sk_net just a few lines earlier in the same routine.
Signed-off-by: Jakub Sitnicki <jkbs@redhat.com>
---
net/ipv6/af_inet6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ipv6/af_inet6.c b/net/ipv6/af_inet6.c
index a88b5b5..0a7c740 100644
--- a/net/ipv6/af_inet6.c
+++ b/net/ipv6/af_inet6.c
@@ -210,7 +210,7 @@ static int inet6_create(struct net *net, struct socket *sock, int protocol,
np->mcast_hops = IPV6_DEFAULT_MCASTHOPS;
np->mc_loop = 1;
np->pmtudisc = IPV6_PMTUDISC_WANT;
- np->autoflowlabel = ip6_default_np_autolabel(sock_net(sk));
+ np->autoflowlabel = ip6_default_np_autolabel(net);
sk->sk_ipv6only = net->ipv6.sysctl.bindv6only;
/* Init the ipv4 part of the socket since we can have sockets
--
2.9.4
^ permalink raw reply related
* Re: [PATCH v2 net-next 0/4] net: dsa: lan9303: Fix MDIO issues.
From: Juergen Borleis @ 2017-07-31 7:51 UTC (permalink / raw)
To: kernel
Cc: Egil Hjelmeland, andrew, vivien.didelot, f.fainelli, netdev,
linux-kernel
In-Reply-To: <20170730175856.4784-1-privat@egil-hjelmeland.no>
Hi Egil,
On Sunday 30 July 2017 19:58:52 Egil Hjelmeland wrote:
> This series fix the MDIO interface for the lan9303 DSA driver.
> Bugs found after testing on actual HW.
>
> This series is extracted from the first patch of my first large
> series. Significant changes from that version are:
> - use mdiobus_write_nested, mdiobus_read_nested.
> - EXPORT lan9303_indirect_phy_ops
>
> Unfortunately I do not have access to i2c based system for
> testing.
A little bit late - the series is already applied...
I have just tested it on my LAN9303 connected via I2C and my setup still
works.
Tested-by: Juergen Borleis <jbe@pengutronix.de>
Cheers
Juergen
--
Pengutronix e.K. | Juergen Borleis |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply
* Re: [PATCH net] mcs7780: Silence uninitialized variable warning
From: Dan Carpenter @ 2017-07-31 7:41 UTC (permalink / raw)
To: David Miller; +Cc: samuel, netdev, kernel-janitors
In-Reply-To: <20170729.232855.1831311386560187695.davem@davemloft.net>
On Sat, Jul 29, 2017 at 11:28:55PM -0700, David Miller wrote:
> From: Dan Carpenter <dan.carpenter@oracle.com>
> Date: Fri, 28 Jul 2017 17:45:11 +0300
>
> > - __u16 rval;
> > + __u16 rval = -1;
>
> Fixing a bogus warning by assigning a signed constant to an
> unsigned variable doesn't really make me all that happy.
>
> I don't think I'll apply this, sorry.
There's no guarantee that small kmallocs will always succeed in future
kernels so it's not *totally* bogus.
regards,
dan carpenter
^ permalink raw reply
* Re: [PATCH net-next v1 1/3] gtp: refactor to support flow-based gtp encap and decap
From: Andreas Schultz @ 2017-07-31 7:21 UTC (permalink / raw)
To: Jiannan Ouyang
Cc: osmocom-net-gprs, netdev, dev, pablo, laforge, pshelar,
wieger ijntema tno, yi y yang, joe, Amar Padmanabhan
In-Reply-To: <20170713004455.3946570-2-ouyangj@fb.com>
Hi Jiannan,
----- On Jul 13, 2017, at 2:44 AM, Jiannan Ouyang ouyangj@fb.com wrote:
[...]
> -static int gtp_rx(struct pdp_ctx *pctx, struct sk_buff *skb,
> - unsigned int hdrlen, unsigned int role)
> +static int gtp_rx(struct gtp_dev *gtp, struct sk_buff *skb,
> + unsigned int hdrlen, struct sock *sk,
> + struct metadata_dst *tun_dst)
Some time ago, there was an extensive discussion about the relation
of PDP context and network devices. You are basically reverting one
of the changes that was made in that context. I think it is wrong to
couple GTP devices and PDP context the way you do here (there are
people that disagree, though).
The GTP network device of one of two structures owning the PDP context,
the other is the GTP socket. GTP network devices and GTP sockets should
be strictly separated.
The GTP network device owns the IP given to the MS, handles mapping
IP's into GTP tunnels (peer GSN + TEIDs) and hands the resulting GTP
packets of to the GTP socket for sending. The GTP socket decaps the GTP
packet, find the right context and based on information therein passes
it to the GTP network device.
By separating is that way, you can have MS with overlapping or colliding
IP's on the same GTP socket as long as they belong to different GTP network
devices.
We had a length discussion about whether the above scenario makes sense.
I'm not sure if we reached a final verdict, but the 3GPP specifications
clearly permit such a setup.
Regards
Andreas
^ permalink raw reply
* [patch net-next 8/8] mlxsw: spectrum_router: Simplify a piece of code
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Express the same logic more succinctly.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index c69efbd..802f5b8 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -1752,9 +1752,9 @@ mlxsw_sp_nexthop_group_refresh(struct mlxsw_sp *mlxsw_sp,
static void __mlxsw_sp_nexthop_neigh_update(struct mlxsw_sp_nexthop *nh,
bool removing)
{
- if (!removing && !nh->should_offload)
+ if (!removing)
nh->should_offload = 1;
- else if (removing && nh->offloaded)
+ else if (nh->offloaded)
nh->should_offload = 0;
nh->update = 1;
}
--
2.9.3
^ permalink raw reply related
* [patch net-next 7/8] mlxsw: spectrum_router: Clarify a piece of code
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Prefer logical operator that expresses the intent to bitwise one that
happens to give the same result.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index 600268c..c69efbd 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -1668,7 +1668,7 @@ mlxsw_sp_nexthop_group_refresh(struct mlxsw_sp *mlxsw_sp,
for (i = 0; i < nh_grp->count; i++) {
nh = &nh_grp->nexthops[i];
- if (nh->should_offload ^ nh->offloaded) {
+ if (nh->should_offload != nh->offloaded) {
offload_change = true;
if (nh->should_offload)
nh->update = 1;
--
2.9.3
^ permalink raw reply related
* [patch net-next 6/8] mlxsw: spectrum_router: Simplify a piece of code
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index b6df3c3..600268c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -3124,9 +3124,7 @@ mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *rif, struct net_device *dev,
switch (event) {
case NETDEV_UP:
- if (!rif)
- return true;
- return false;
+ return rif == NULL;
case NETDEV_DOWN:
idev = __in_dev_get_rtnl(dev);
if (idev && idev->ifa_list)
--
2.9.3
^ permalink raw reply related
* [patch net-next 5/8] mlxsw: reg.h: Namespace IP2ME registers
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
This renames IP2ME-specific registers reg_ralue_v and
reg_ralue_tunnel_ptr to reg_ralue_ip2me_*.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index a671438..7e8ba54 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4813,7 +4813,7 @@ MLXSW_ITEM32(reg, ralue, ecmp_size, 0x28, 0, 13);
*/
MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
-/* reg_ralue_v
+/* reg_ralue_ip2me_v
* Valid bit for the tunnel_ptr field.
* If valid = 0 then trap to CPU as IP2ME trap ID.
* If valid = 1 and the packet format allows NVE or IPinIP tunnel
@@ -4823,15 +4823,15 @@ MLXSW_ITEM32(reg, ralue, local_erif, 0x24, 0, 16);
* Only relevant in case of IP2ME action.
* Access: RW
*/
-MLXSW_ITEM32(reg, ralue, v, 0x24, 31, 1);
+MLXSW_ITEM32(reg, ralue, ip2me_v, 0x24, 31, 1);
-/* reg_ralue_tunnel_ptr
+/* reg_ralue_ip2me_tunnel_ptr
* Tunnel Pointer for NVE or IPinIP tunnel decapsulation.
* For Spectrum, pointer to KVD Linear.
* Only relevant in case of IP2ME action.
* Access: RW
*/
-MLXSW_ITEM32(reg, ralue, tunnel_ptr, 0x24, 0, 24);
+MLXSW_ITEM32(reg, ralue, ip2me_tunnel_ptr, 0x24, 0, 24);
static inline void mlxsw_reg_ralue_pack(char *payload,
enum mlxsw_reg_ralxx_protocol protocol,
--
2.9.3
^ permalink raw reply related
* [patch net-next 4/8] mlxsw: Update specification of reg_ritr_type
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
The comments really belong to the individual enumerators. The comment
at the register should instead reference the enum.
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index b4ea8cb..a671438 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -3992,16 +3992,16 @@ MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
enum mlxsw_reg_ritr_if_type {
+ /* VLAN interface. */
MLXSW_REG_RITR_VLAN_IF,
+ /* FID interface. */
MLXSW_REG_RITR_FID_IF,
+ /* Sub-port interface. */
MLXSW_REG_RITR_SP_IF,
};
/* reg_ritr_type
- * Router interface type.
- * 0 - VLAN interface.
- * 1 - FID interface.
- * 2 - Sub-port interface.
+ * Router interface type as per enum mlxsw_reg_ritr_if_type.
* Access: RW
*/
MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
--
2.9.3
^ permalink raw reply related
* [patch net-next 3/8] mlxsw: spectrum_router: Fix a typo
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index 8bf076d..b6df3c3 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -1804,7 +1804,7 @@ static int mlxsw_sp_nexthop_neigh_init(struct mlxsw_sp *mlxsw_sp,
return 0;
/* Take a reference of neigh here ensuring that neigh would
- * not be detructed before the nexthop entry is finished.
+ * not be destructed before the nexthop entry is finished.
* The reference is taken either in neigh_lookup() or
* in neigh_create() in case n is not found.
*/
--
2.9.3
^ permalink raw reply related
* [patch net-next 2/8] mlxsw: reg.h: Fix a typo
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index c6c50894..b4ea8cb 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -4718,7 +4718,7 @@ MLXSW_ITEM32(reg, ralue, prefix_len, 0x08, 0, 8);
/* reg_ralue_dip*
* The prefix of the route or of the marker that the object of the LPM
* is compared with. The most significant bits of the dip are the prefix.
- * The list significant bits must be '0' if the prefix_len is smaller
+ * The least significant bits must be '0' if the prefix_len is smaller
* than 128 for IPv6 or smaller than 32 for IPv4.
* IPv4 address uses bits dip[31:0] and bits dip[127:32] are reserved.
* Access: Index
--
2.9.3
^ permalink raw reply related
* [patch net-next 1/8] mlxsw: spectrum_acl: Fix a typo
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
In-Reply-To: <20170731072730.3256-1-jiri@resnulli.us>
From: Petr Machata <petrm@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Reviewed-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
---
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c
index 01a1501..508b5fc 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c
@@ -369,7 +369,7 @@ int mlxsw_sp_acl_rulei_act_fwd(struct mlxsw_sp *mlxsw_sp,
local_port = mlxsw_sp_port->local_port;
in_port = false;
} else {
- /* If out_dev is NULL, the called wants to
+ /* If out_dev is NULL, the caller wants to
* set forward to ingress port.
*/
local_port = 0;
--
2.9.3
^ permalink raw reply related
* [patch net-next 0/8] mlxsw: Various small fixes
From: Jiri Pirko @ 2017-07-31 7:27 UTC (permalink / raw)
To: netdev; +Cc: davem, idosch, petrm, mlxsw
From: Jiri Pirko <jiri@mellanox.com>
This patch series is to contribute several fixes for nits that I noticed while
working on mlxsw. The changes range from typo fixes to local improvements of
the code and have little in common besides being small in scope.
Petr Machata (8):
mlxsw: spectrum_acl: Fix a typo
mlxsw: reg.h: Fix a typo
mlxsw: spectrum_router: Fix a typo
mlxsw: Update specification of reg_ritr_type
mlxsw: reg.h: Namespace IP2ME registers
mlxsw: spectrum_router: Simplify a piece of code
mlxsw: spectrum_router: Clarify a piece of code
mlxsw: spectrum_router: Simplify a piece of code
drivers/net/ethernet/mellanox/mlxsw/reg.h | 18 +++++++++---------
drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c | 2 +-
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c | 12 +++++-------
3 files changed, 15 insertions(+), 17 deletions(-)
--
2.9.3
^ permalink raw reply
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