* RE: [patch net-next 1/3] idr: Add new APIs to support unsigned long
From: Chris Mi @ 2017-08-29 8:00 UTC (permalink / raw)
To: Jiri Pirko
Cc: Hannes Frederic Sowa, netdev@vger.kernel.org, jhs@mojatatu.com,
xiyou.wangcong@gmail.com, davem@davemloft.net,
mawilcox@microsoft.com
In-Reply-To: <20170829075711.GE1977@nanopsycho.orion>
> -----Original Message-----
> From: Jiri Pirko [mailto:jiri@resnulli.us]
> Sent: Tuesday, August 29, 2017 3:57 PM
> To: Chris Mi <chrism@mellanox.com>
> Cc: Hannes Frederic Sowa <hannes@stressinduktion.org>;
> netdev@vger.kernel.org; jhs@mojatatu.com; xiyou.wangcong@gmail.com;
> davem@davemloft.net; mawilcox@microsoft.com
> Subject: Re: [patch net-next 1/3] idr: Add new APIs to support unsigned long
>
> Tue, Aug 29, 2017 at 09:34:47AM CEST, chrism@mellanox.com wrote:
> >Hi,
> >
> >> -----Original Message-----
> >> From: Hannes Frederic Sowa [mailto:hannes@stressinduktion.org]
> >> Sent: Tuesday, August 29, 2017 3:14 PM
> >> To: Chris Mi <chrism@mellanox.com>
> >> Cc: netdev@vger.kernel.org; jhs@mojatatu.com;
> >> xiyou.wangcong@gmail.com; jiri@resnulli.us; davem@davemloft.net;
> >> mawilcox@microsoft.com
> >> Subject: Re: [patch net-next 1/3] idr: Add new APIs to support
> >> unsigned long
> >>
> >> Hello,
> >>
> >> Chris Mi <chrism@mellanox.com> writes:
> >>
> >> > The following new APIs are added:
> >> >
> >> > int idr_alloc_ext(struct idr *idr, void *ptr, unsigned long *index,
> >> > unsigned long start, unsigned long end, gfp_t
> >> > gfp); static inline void *idr_remove_ext(struct idr *idr, unsigned
> >> > long id); static inline void *idr_find_ext(const struct idr *idr,
> >> > unsigned long id); void *idr_replace_ext(struct idr *idr, void
> >> > *ptr, unsigned long id); void *idr_get_next_ext(struct idr *idr,
> >> > unsigned long *nextid);
> >> >
> >> > Signed-off-by: Chris Mi <chrism@mellanox.com>
> >> > Signed-off-by: Jiri Pirko <jiri@mellanox.com>
> >> > ---
> >> > include/linux/idr.h | 16 ++++++++++
> >> > include/linux/radix-tree.h | 3 ++
> >> > lib/idr.c | 56 +++++++++++++++++++++++++++++++++++
> >> > lib/radix-tree.c | 73
> >> ++++++++++++++++++++++++++++++++++++++++++++++
> >> > 4 files changed, 148 insertions(+)
> >> >
> >>
> >> [...]
> >>
> >> > +int idr_alloc_ext(struct idr *idr, void *ptr, unsigned long *index,
> >> > + unsigned long start, unsigned long end, gfp_t gfp) {
> >> > + void __rcu **slot;
> >> > + struct radix_tree_iter iter;
> >> > +
> >> > + if (WARN_ON_ONCE(radix_tree_is_internal_node(ptr)))
> >> > + return -EINVAL;
> >> > +
> >> > + radix_tree_iter_init(&iter, start);
> >> > + slot = idr_get_free_ext(&idr->idr_rt, &iter, gfp, end);
> >> > + if (IS_ERR(slot))
> >> > + return PTR_ERR(slot);
> >> > +
> >> > + radix_tree_iter_replace(&idr->idr_rt, &iter, slot, ptr);
> >> > + radix_tree_iter_tag_clear(&idr->idr_rt, &iter, IDR_FREE);
> >> > +
> >> > + if (index)
> >> > + *index = iter.index;
> >> > + return 0;
> >> > +}
> >> > +EXPORT_SYMBOL_GPL(idr_alloc_ext);
> >>
> >> Can you express idr_alloc in terms of idr_alloc_ext? Same for most of
> >> the other functions (it seems that signed int was used as return
> >> value to indicate error cases, thus it should be easy to map those).
> >In idr_alloc(), we have the following check:
> >
> > if (WARN_ON_ONCE(start < 0))
> > return -EINVAL;
> >
> >But in idr_alloc_ext(), since we are using unsigned long, we needn't such
> check.
>
> You can just check and call idr_alloc_ext then to do the actual work.
OK, will fix it.
^ permalink raw reply
* Re: [PATCH 1/4] sgiseeq: switch to dma_alloc_attrs
From: Christoph Hellwig @ 2017-08-29 8:02 UTC (permalink / raw)
To: David Miller; +Cc: hch, netdev, ralf, linux-mips, linux-parisc, linux-kernel
In-Reply-To: <20170828.154151.502026172655565151.davem@davemloft.net>
On Mon, Aug 28, 2017 at 03:41:51PM -0700, David Miller wrote:
> From: Christoph Hellwig <hch@lst.de>
> Date: Sat, 26 Aug 2017 09:21:22 +0200
>
> > Use dma_alloc_attrs directly instead of the dma_alloc_noncoherent wrapper.
> >
> > Signed-off-by: Christoph Hellwig <hch@lst.de>
>
> Acked-by: David S. Miller <davem@davemloft.net>
I take the Acks as an ok to merges these patches through the dma-mapping
tree. Thanks Dave!
^ permalink raw reply
* Re: Fwd: DA850-evm MAC Address is random
From: Sekhar Nori @ 2017-08-29 8:23 UTC (permalink / raw)
To: Tony Lindgren, Adam Ford; +Cc: Grygorii Strashko, linux-omap, netdev
In-Reply-To: <20170828211217.GO6008@atomide.com>
On Tuesday 29 August 2017 02:42 AM, Tony Lindgren wrote:
> * Adam Ford <aford173@gmail.com> [170828 13:33]:
>> On Mon, Aug 28, 2017 at 1:54 PM, Grygorii Strashko
>> <grygorii.strashko@ti.com> wrote:
>>> Cc: Sekhar
>>>
>>> On 08/28/2017 10:32 AM, Adam Ford wrote:
>>>>
>>>> The davinvi_emac MAC address seems to attempt a call to
>>>> ti_cm_get_macid in cpsw-common.c but it returns the message
>>>> 'davinci_emac davinci_emac.1: incompatible machine/device type for
>>>> reading mac address ' and then generates a random MAC address.
>>>>
>>>> The function appears to lookup varions boards using
>>>> 'of_machine_is_compaible' and supports dm8148, am33xx, am3517, dm816,
>>>> am4372 and dra7. I don't see the ti,davinci-dm6467-emac which is
>>>> what's shown in the da850 device tree.
>>>>
>>>> Is there a patch somewhere for supporting the da850-evm?
>>>
>>>
>>> Not sure if MAC address can be read from Control module.
>>> May be Sekhar can say more?
>>
>> My understanding is that the MAC address is programmed by Logic PD
>> into the SPI flash. The Bootloader reads this from either SPI or its
>> env variables. Looking at the partition info listed in the
>> da850-evm.dts file, it appears as if they've reserved space for it.
>> Unfortunately, I don't see any code that reads it out. I was hoping
This code is present in U-Boot sources at
board/davinci/da8xxevm/da850evm.c. See the function get_mac_addr() and
its usage in misc_init_r().
>> there might be a way to just pass cmdline parameter from the
>> bootloader to the kernel to accept the MAC address.
>>
>>>
>>>>
>>>> If not, is there a way to pass the MAC address from U-Boot to the
>>>> driver so it doesn't generate a random MAC?
>>>
>>>
>>> "local-mac-address" dt porp
>>
>> The downside here, is that we'd have to have the Bootloader modify the
>> device tree.
>
> That piece of code exists somewhere in u-boot already. Note how
Yes, it is fdt_fixup_ethernet() and its usage is in common/image-fdt.c.
> we are populating the mac address for USB Ethernet drivers in
> u-boot and then the Ethernet driver code parses it. See commit
> 055d31de7158 ("ARM: omap3: beagleboard-xm: dt: Add ethernet to
> the device tree") for some more information.
>
> I think u-boot needs the ethernet alias for finding the interface.
That's exactly what was missing. I have sent a patch for fixing that and
copied you there.
Adam, if I can get your Tested-by, I will make an attempt to send it for
v4.13 itself.
Thanks,
Sekhar
^ permalink raw reply
* Re: [PATCH v4 4/5] net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated
From: Corentin Labbe @ 2017-08-29 8:34 UTC (permalink / raw)
To: Andrew Lunn
Cc: robh+dt, mark.rutland, maxime.ripard, wens, linux,
peppe.cavallaro, alexandre.torgue, f.fainelli, icenowy, netdev,
devicetree, linux-arm-kernel, linux-kernel
In-Reply-To: <20170826212051.GA10418@lunn.ch>
On Sat, Aug 26, 2017 at 11:20:51PM +0200, Andrew Lunn wrote:
> Hi Corentin
>
> I think we have now all agreed this is an mdio-mux, plus it is also an
> MII mux. We should represent that in device tree. This patchset does
> this. However, as it is now, the mux structure in DT is ignored. All
> it does is search for the phy-is-integrated flags and goes on that.
>
> I made the comment that the device tree representation cannot be
> implemented using an MDIO mux driver, because of driver loading
> issues. However, the core of the MDIO mux code is just a library,
> symbols exported as GPL, free for anything to use.
>
> What i think should happen is the mdio-mux is implemented inside the
> MAC driver, using the mux-core as a library. The device tree structure
> of a mix is then reflected within Linux. The mux switch callback is
> implemented within the MAC driver. So it can reset the MAC when the
> mux is switched. The 'phy-is-integrated' property is then no longer
> needed.
It is stilll needed because some settings (allwinner,leds-active-low for example) are only for integrated phy.
>
> I would suggest a binding something like:
>
> emac: ethernet@1c0b000 {
> compatible = "allwinner,sun8i-h3-emac";
> syscon = <&syscon>;
> reg = <0x01c0b000 0x104>;
> interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-names = "macirq";
> resets = <&ccu RST_BUS_EMAC>;
> reset-names = "stmmaceth";
> clocks = <&ccu CLK_BUS_EMAC>;
> clock-names = "stmmaceth";
> #address-cells = <1>;
> #size-cells = <0>;
>
> phy-handle = <&int_mii_phy>;
> phy-mode = "mii";
> allwinner,leds-active-low;
>
> mdio: mdio {
> #address-cells = <1>;
> #size-cells = <0>;
> }
>
> mdio-mux {
> #address-cells = <1>;
> #size-cells = <0>;
>
> mdio@0 {
> reg = <0>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> int_mii_phy: ethernet-phy@1 {
> reg = <1>;
> clocks = <&ccu CLK_BUS_EPHY>;
> resets = <&ccu RST_BUS_EPHY>;
> };
> };
> ext_mdio: mdio@0 {
> #address-cells = <1>;
> #size-cells = <0>;
>
> ext_rgmii_phy: ethernet-phy@1 {
> reg = <1>;
> };
> };
> };
> };
>
I am trying to do that but I get:
dwmac-sun8i 1c30000.ethernet: Error: Failed to find reg for child /soc/ethernet@1c30000/mdio
dwmac-sun8i 1c30000.ethernet: Error: Failed to find reg for child /soc/ethernet@1c30000/mdio-mux
dwmac-sun8i 1c30000.ethernet: Error: No acceptable child buses found
So it seems that mdio_mux_init() must be run on mdio-mux and not on emac node.
But in the current state it cannot be done.
Do you agree that another mdio_mux_init() must be written ? (taking a of_node (in our case: mdio-mux) instead of a device)
Or do I miss something ?
Regards
^ permalink raw reply
* Re: [PATCH 6/6] power: supply: make device_attribute const
From: Sebastian Reichel @ 2017-08-29 8:44 UTC (permalink / raw)
To: Bhumika Goyal
Cc: julia.lawall, rjw, lenb, jbacik, jikos, benjamin.tissoires,
manish.chopra, rahul.verma, Dept-GELinuxNICDev, harish.patil,
cascardo, don, dvhart, andy, linux-acpi, linux-kernel,
linux-block, nbd-general, linux-input, netdev,
platform-driver-x86, linux-pm
In-Reply-To: <1503315792-14837-7-git-send-email-bhumirks@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1013 bytes --]
Hi,
On Mon, Aug 21, 2017 at 05:13:12PM +0530, Bhumika Goyal wrote:
> Make these const as they are only passed as an argument to the
> function device_create_file and device_remove_file and the corresponding
> arguments are of type const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
> ---
Thanks, queued.
-- Sebastian
> drivers/power/supply/olpc_battery.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/power/supply/olpc_battery.c b/drivers/power/supply/olpc_battery.c
> index fc20ca3..3bc2eea 100644
> --- a/drivers/power/supply/olpc_battery.c
> +++ b/drivers/power/supply/olpc_battery.c
> @@ -559,7 +559,7 @@ static ssize_t olpc_bat_error_read(struct device *dev,
> return sprintf(buf, "%d\n", ec_byte);
> }
>
> -static struct device_attribute olpc_bat_error = {
> +static const struct device_attribute olpc_bat_error = {
> .attr = {
> .name = "error",
> .mode = S_IRUGO,
> --
> 1.9.1
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply
* Atualize o zimbra agora
From: ZIMBRA @ 2017-08-29 8:32 UTC (permalink / raw)
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Atualize o Zimbra Agora:-- http://a324543-001-55322111.tripod.com/
Saudações,
ZIMBRA! Serviços de correio
^ permalink raw reply
* [PATCH net-next] staging: irda: force to be a kernel module
From: Greg Kroah-Hartman @ 2017-08-29 9:14 UTC (permalink / raw)
To: davem, samuel; +Cc: netdev, linux-kernel, devel
In-Reply-To: <20170829070929.GA15824@kroah.com>
Now that the IRDA networking code has moved into drivers/staging/, the
link order is changed for when it is initialized if built into the
system. This can cause a crash when initializing as the netfilter core
hasn't been initialized yet.
So force the IRDA code to be built as a module, preventing the crash.
Reported-by: kernel test robot <fengguang.wu@intel.com>
Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
---
drivers/staging/irda/net/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/irda/net/Kconfig b/drivers/staging/irda/net/Kconfig
index 6abeae6c666a..9c6489bcb596 100644
--- a/drivers/staging/irda/net/Kconfig
+++ b/drivers/staging/irda/net/Kconfig
@@ -3,7 +3,7 @@
#
menuconfig IRDA
- depends on NET && !S390
+ depends on NET && !S390 && m
tristate "IrDA (infrared) subsystem support"
select CRC_CCITT
---help---
--
2.14.1
^ permalink raw reply related
* Re: [PATCH net-next 1/4] net: Add SRIOV VGT+ support
From: Saeed Mahameed @ 2017-08-29 10:13 UTC (permalink / raw)
To: Sabrina Dubroca
Cc: Saeed Mahameed, David S. Miller, Linux Netdev List,
Eugenia Emantayev, Mohamad Haj Yahia, Hannes Frederic Sowa
In-Reply-To: <20170828155217.GA8399@bistromath.localdomain>
On Mon, Aug 28, 2017 at 6:52 PM, Sabrina Dubroca <sd@queasysnail.net> wrote:
> 2017-08-27, 14:06:15 +0300, Saeed Mahameed wrote:
> [...]
>> +#define VF_VLAN_BITMAP DIV_ROUND_UP(VF_VLAN_N_VID, sizeof(__u64) * BITS_PER_BYTE)
>> +struct ifla_vf_vlan_trunk {
>> + __u32 vf;
>> + __u64 allowed_vlans_8021q_bm[VF_VLAN_BITMAP];
>> + __u64 allowed_vlans_8021ad_bm[VF_VLAN_BITMAP];
>> +};
>
> This is huge (1032B). And you put one of these in the netlink message
> for each VF. This means that with 51 VF (at least in my environment,
> where each VF takes 1296B), you're going to overflow the u16 size of a
> single attribute (IFLA_VFINFO_LIST), and you cannot dump the device
> anymore. I'm afraid this is going to break existing setups.
>
Yes ! We will fix this,
we are considering to report only a boolean in VFINFO which indecates
if VGT+ is enable or not
and provide a new attribute per VF to report only the vlan list of specific VF.
Thanks for the input,
we will handle this.
> --
> Sabrina
^ permalink raw reply
* Re: [PATCH net-next v2] bridge: fdb add and delete tracepoints
From: Nikolay Aleksandrov @ 2017-08-29 10:13 UTC (permalink / raw)
To: Roopa Prabhu, davem; +Cc: netdev, f.fainelli, bridge
In-Reply-To: <1503980568-35240-1-git-send-email-roopa@cumulusnetworks.com>
On 29/08/17 07:22, Roopa Prabhu wrote:
> From: Roopa Prabhu <roopa@cumulusnetworks.com>
>
> A few useful tracepoints to trace bridge forwarding
> database updates.
>
> Signed-off-by: Roopa Prabhu <roopa@cumulusnetworks.com>
> ---
> v2 - address comments from Florian
>
> include/trace/events/bridge.h | 98 +++++++++++++++++++++++++++++++++++++++++
> net/bridge/br_fdb.c | 7 +++
> net/core/net-traces.c | 6 +++
> 3 files changed, 111 insertions(+)
> create mode 100644 include/trace/events/bridge.h
>
Very nice and useful, thanks!
Acked-by: Nikolay Aleksandrov <nikolay@cumulusnetworks.com>
^ permalink raw reply
* NFCT writing localhost conntrack entries too
From: Akshat Kakkar @ 2017-08-29 10:23 UTC (permalink / raw)
To: netdev
With ulog/nflog, NFCT plugin, is it possible to not log entries with src ip
as 127.0.0.1
I can see following options in ulogd.conf
#accept_src_filter=192.168.1.0/24,1:2::/64 # source ip of connection
must belong to these networks
#accept_dst_filter=192.168.1.0/24 # destination ip of connection must
belong to these networks
#accept_proto_filter=tcp,sctp # layer 4 proto of connections
... but what I am looking for is like deny_src_filter.
Is it possible?
^ permalink raw reply
* Re: Fwd: DA850-evm MAC Address is random
From: Adam Ford @ 2017-08-29 10:23 UTC (permalink / raw)
To: Sekhar Nori; +Cc: Tony Lindgren, Grygorii Strashko, linux-omap, netdev
In-Reply-To: <94c4cbb0-1df3-2f2f-69f3-f9a788e610fa@ti.com>
On Tue, Aug 29, 2017 at 3:23 AM, Sekhar Nori <nsekhar@ti.com> wrote:
> On Tuesday 29 August 2017 02:42 AM, Tony Lindgren wrote:
>> * Adam Ford <aford173@gmail.com> [170828 13:33]:
>>> On Mon, Aug 28, 2017 at 1:54 PM, Grygorii Strashko
>>> <grygorii.strashko@ti.com> wrote:
>>>> Cc: Sekhar
>>>>
>>>> On 08/28/2017 10:32 AM, Adam Ford wrote:
>>>>>
>>>>> The davinvi_emac MAC address seems to attempt a call to
>>>>> ti_cm_get_macid in cpsw-common.c but it returns the message
>>>>> 'davinci_emac davinci_emac.1: incompatible machine/device type for
>>>>> reading mac address ' and then generates a random MAC address.
>>>>>
>>>>> The function appears to lookup varions boards using
>>>>> 'of_machine_is_compaible' and supports dm8148, am33xx, am3517, dm816,
>>>>> am4372 and dra7. I don't see the ti,davinci-dm6467-emac which is
>>>>> what's shown in the da850 device tree.
>>>>>
>>>>> Is there a patch somewhere for supporting the da850-evm?
>>>>
>>>>
>>>> Not sure if MAC address can be read from Control module.
>>>> May be Sekhar can say more?
>>>
>>> My understanding is that the MAC address is programmed by Logic PD
>>> into the SPI flash. The Bootloader reads this from either SPI or its
>>> env variables. Looking at the partition info listed in the
>>> da850-evm.dts file, it appears as if they've reserved space for it.
>>> Unfortunately, I don't see any code that reads it out. I was hoping
>
> This code is present in U-Boot sources at
> board/davinci/da8xxevm/da850evm.c. See the function get_mac_addr() and
> its usage in misc_init_r().
>
>>> there might be a way to just pass cmdline parameter from the
>>> bootloader to the kernel to accept the MAC address.
>>>
>>>>
>>>>>
>>>>> If not, is there a way to pass the MAC address from U-Boot to the
>>>>> driver so it doesn't generate a random MAC?
>>>>
>>>>
>>>> "local-mac-address" dt porp
>>>
>>> The downside here, is that we'd have to have the Bootloader modify the
>>> device tree.
>>
>> That piece of code exists somewhere in u-boot already. Note how
>
> Yes, it is fdt_fixup_ethernet() and its usage is in common/image-fdt.c.
>
>> we are populating the mac address for USB Ethernet drivers in
>> u-boot and then the Ethernet driver code parses it. See commit
>> 055d31de7158 ("ARM: omap3: beagleboard-xm: dt: Add ethernet to
>> the device tree") for some more information.
>>
>> I think u-boot needs the ethernet alias for finding the interface.
>
> That's exactly what was missing. I have sent a patch for fixing that and
> copied you there.
Thanks for doing that.
>
> Adam, if I can get your Tested-by, I will make an attempt to send it for
> v4.13 itself.
I will test it. Do need to run some instruction or do something
special in U-Boot to pass this in the proper place for the kernel to
pull it? Tony's patch reference showed
command for fdt set, but I am not sure I fully understand the
parameters that went along with that.
adam
>
> Thanks,
> Sekhar
^ permalink raw reply
* [PATCH 1/7] net: xfrm: don't double-hold dst when sk_policy in use.
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
From: Lorenzo Colitti <lorenzo@google.com>
While removing dst_entry garbage collection, commit 52df157f17e5
("xfrm: take refcnt of dst when creating struct xfrm_dst bundle")
changed xfrm_resolve_and_create_bundle so it returns an xdst with
a refcount of 1 instead of 0.
However, it did not delete the dst_hold performed by xfrm_lookup
when a per-socket policy is in use. This means that when a
socket policy is in use, dst entries returned by xfrm_lookup have
a refcount of 2, and are not freed when no longer in use.
Cc: Wei Wang <weiwan@google.com>
Fixes: 52df157f17 ("xfrm: take refcnt of dst when creating struct xfrm_dst bundle")
Tested: https://android-review.googlesource.com/417481
Tested: https://android-review.googlesource.com/418659
Tested: https://android-review.googlesource.com/424463
Tested: https://android-review.googlesource.com/452776 passes on net-next
Signed-off-by: Lorenzo Colitti <lorenzo@google.com>
Acked-by: Wei Wang <weiwan@google.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/xfrm/xfrm_policy.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index 6f5a0dad..69b16ee 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -2226,7 +2226,6 @@ struct dst_entry *xfrm_lookup(struct net *net, struct dst_entry *dst_orig,
goto no_transform;
}
- dst_hold(&xdst->u.dst);
route = xdst->route;
}
}
--
2.7.4
^ permalink raw reply related
* pull request (net): ipsec 2017-08-29
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
1) Fix dst_entry refcount imbalance when using socket policies.
From Lorenzo Colitti.
2) Fix locking when adding the ESP trailers.
3) Fix tailroom calculation for the ESP trailer by using
skb_tailroom instead of skb_availroom.
4) Fix some info leaks in xfrm_user.
From Mathias Krause.
Please pull or let me know if there are problems.
Thanks!
The following changes since commit 2b33bc8aa236b75d6e86a8a79126fd9739e4a5bd:
net: dsa: use consume_skb() (2017-08-23 22:13:34 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec.git master
for you to fetch changes up to 931e79d7a7ddee4709c56b39de169a36804589a1:
xfrm_user: fix info leak in build_aevent() (2017-08-28 10:58:02 +0200)
----------------------------------------------------------------
Lorenzo Colitti (1):
net: xfrm: don't double-hold dst when sk_policy in use.
Mathias Krause (4):
xfrm_user: fix info leak in copy_user_offload()
xfrm_user: fix info leak in xfrm_notify_sa()
xfrm_user: fix info leak in build_expire()
xfrm_user: fix info leak in build_aevent()
Steffen Klassert (2):
esp: Fix locking on page fragment allocation
esp: Fix skb tailroom calculation
net/ipv4/esp4.c | 7 ++++---
net/ipv6/esp6.c | 7 ++++---
net/xfrm/xfrm_policy.c | 1 -
net/xfrm/xfrm_user.c | 6 +++++-
4 files changed, 13 insertions(+), 8 deletions(-)
^ permalink raw reply
* [PATCH 3/7] esp: Fix skb tailroom calculation
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
We use skb_availroom to calculate the skb tailroom for the
ESP trailer. skb_availroom calculates the tailroom and
subtracts this value by reserved_tailroom. However
reserved_tailroom is a union with the skb mark. This means
that we subtract the tailroom by the skb mark if set.
Fix this by using skb_tailroom instead.
Fixes: cac2661c53f3 ("esp4: Avoid skb_cow_data whenever possible")
Fixes: 03e2a30f6a27 ("esp6: Avoid skb_cow_data whenever possible")
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/ipv4/esp4.c | 2 +-
net/ipv6/esp6.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/net/ipv4/esp4.c b/net/ipv4/esp4.c
index a8ddb95..df68963 100644
--- a/net/ipv4/esp4.c
+++ b/net/ipv4/esp4.c
@@ -258,7 +258,7 @@ int esp_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *
esp_output_udp_encap(x, skb, esp);
if (!skb_cloned(skb)) {
- if (tailen <= skb_availroom(skb)) {
+ if (tailen <= skb_tailroom(skb)) {
nfrags = 1;
trailer = skb;
tail = skb_tail_pointer(trailer);
diff --git a/net/ipv6/esp6.c b/net/ipv6/esp6.c
index 4e3fdc88..ab64f36 100644
--- a/net/ipv6/esp6.c
+++ b/net/ipv6/esp6.c
@@ -226,7 +226,7 @@ int esp6_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info
int tailen = esp->tailen;
if (!skb_cloned(skb)) {
- if (tailen <= skb_availroom(skb)) {
+ if (tailen <= skb_tailroom(skb)) {
nfrags = 1;
trailer = skb;
tail = skb_tail_pointer(trailer);
--
2.7.4
^ permalink raw reply related
* [PATCH 4/7] xfrm_user: fix info leak in copy_user_offload()
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
From: Mathias Krause <minipli@googlemail.com>
The memory reserved to dump the xfrm offload state includes padding
bytes of struct xfrm_user_offload added by the compiler for alignment.
Add an explicit memset(0) before filling the buffer to avoid the heap
info leak.
Cc: Steffen Klassert <steffen.klassert@secunet.com>
Fixes: d77e38e612a0 ("xfrm: Add an IPsec hardware offloading API")
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/xfrm/xfrm_user.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 2be4c6a..3259555 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -796,7 +796,7 @@ static int copy_user_offload(struct xfrm_state_offload *xso, struct sk_buff *skb
return -EMSGSIZE;
xuo = nla_data(attr);
-
+ memset(xuo, 0, sizeof(*xuo));
xuo->ifindex = xso->dev->ifindex;
xuo->flags = xso->flags;
--
2.7.4
^ permalink raw reply related
* [PATCH 2/7] esp: Fix locking on page fragment allocation
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
We allocate the page fragment for the ESP trailer inside
a spinlock, but consume it outside of the lock. This
is racy as some other cou could get the same page fragment
then. Fix this by consuming the page fragment inside the
lock too.
Fixes: cac2661c53f3 ("esp4: Avoid skb_cow_data whenever possible")
Fixes: 03e2a30f6a27 ("esp6: Avoid skb_cow_data whenever possible")
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/ipv4/esp4.c | 5 +++--
net/ipv6/esp6.c | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/net/ipv4/esp4.c b/net/ipv4/esp4.c
index dbb31a9..a8ddb95 100644
--- a/net/ipv4/esp4.c
+++ b/net/ipv4/esp4.c
@@ -292,8 +292,6 @@ int esp_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *
kunmap_atomic(vaddr);
- spin_unlock_bh(&x->lock);
-
nfrags = skb_shinfo(skb)->nr_frags;
__skb_fill_page_desc(skb, nfrags, page, pfrag->offset,
@@ -301,6 +299,9 @@ int esp_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info *
skb_shinfo(skb)->nr_frags = ++nfrags;
pfrag->offset = pfrag->offset + allocsize;
+
+ spin_unlock_bh(&x->lock);
+
nfrags++;
skb->len += tailen;
diff --git a/net/ipv6/esp6.c b/net/ipv6/esp6.c
index 392def1..4e3fdc88 100644
--- a/net/ipv6/esp6.c
+++ b/net/ipv6/esp6.c
@@ -260,8 +260,6 @@ int esp6_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info
kunmap_atomic(vaddr);
- spin_unlock_bh(&x->lock);
-
nfrags = skb_shinfo(skb)->nr_frags;
__skb_fill_page_desc(skb, nfrags, page, pfrag->offset,
@@ -269,6 +267,9 @@ int esp6_output_head(struct xfrm_state *x, struct sk_buff *skb, struct esp_info
skb_shinfo(skb)->nr_frags = ++nfrags;
pfrag->offset = pfrag->offset + allocsize;
+
+ spin_unlock_bh(&x->lock);
+
nfrags++;
skb->len += tailen;
--
2.7.4
^ permalink raw reply related
* [PATCH 6/7] xfrm_user: fix info leak in build_expire()
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
From: Mathias Krause <minipli@googlemail.com>
The memory reserved to dump the expired xfrm state includes padding
bytes in struct xfrm_user_expire added by the compiler for alignment. To
prevent the heap info leak, memset(0) the remainder of the struct.
Initializing the whole structure isn't needed as copy_to_user_state()
already takes care of clearing the padding bytes within the 'state'
member.
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/xfrm/xfrm_user.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index c33516e..2cbdc81 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -2578,6 +2578,8 @@ static int build_expire(struct sk_buff *skb, struct xfrm_state *x, const struct
ue = nlmsg_data(nlh);
copy_to_user_state(x, &ue->state);
ue->hard = (c->data.hard != 0) ? 1 : 0;
+ /* clear the padding bytes */
+ memset(&ue->hard + 1, 0, sizeof(*ue) - offsetofend(typeof(*ue), hard));
err = xfrm_mark_put(skb, &x->mark);
if (err)
--
2.7.4
^ permalink raw reply related
* [PATCH 5/7] xfrm_user: fix info leak in xfrm_notify_sa()
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
From: Mathias Krause <minipli@googlemail.com>
The memory reserved to dump the ID of the xfrm state includes a padding
byte in struct xfrm_usersa_id added by the compiler for alignment. To
prevent the heap info leak, memset(0) the whole struct before filling
it.
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Fixes: 0603eac0d6b7 ("[IPSEC]: Add XFRMA_SA/XFRMA_POLICY for delete notification")
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/xfrm/xfrm_user.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 3259555..c33516e 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -2715,6 +2715,7 @@ static int xfrm_notify_sa(struct xfrm_state *x, const struct km_event *c)
struct nlattr *attr;
id = nlmsg_data(nlh);
+ memset(id, 0, sizeof(*id));
memcpy(&id->daddr, &x->id.daddr, sizeof(id->daddr));
id->spi = x->id.spi;
id->family = x->props.family;
--
2.7.4
^ permalink raw reply related
* [PATCH 7/7] xfrm_user: fix info leak in build_aevent()
From: Steffen Klassert @ 2017-08-29 10:31 UTC (permalink / raw)
To: David Miller; +Cc: Herbert Xu, Steffen Klassert, netdev
In-Reply-To: <1504002694-1931-1-git-send-email-steffen.klassert@secunet.com>
From: Mathias Krause <minipli@googlemail.com>
The memory reserved to dump the ID of the xfrm state includes a padding
byte in struct xfrm_usersa_id added by the compiler for alignment. To
prevent the heap info leak, memset(0) the sa_id before filling it.
Cc: Jamal Hadi Salim <jhs@mojatatu.com>
Fixes: d51d081d6504 ("[IPSEC]: Sync series - user")
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
---
net/xfrm/xfrm_user.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c
index 2cbdc81..9391ced 100644
--- a/net/xfrm/xfrm_user.c
+++ b/net/xfrm/xfrm_user.c
@@ -1869,6 +1869,7 @@ static int build_aevent(struct sk_buff *skb, struct xfrm_state *x, const struct
return -EMSGSIZE;
id = nlmsg_data(nlh);
+ memset(&id->sa_id, 0, sizeof(id->sa_id));
memcpy(&id->sa_id.daddr, &x->id.daddr, sizeof(x->id.daddr));
id->sa_id.spi = x->id.spi;
id->sa_id.family = x->props.family;
--
2.7.4
^ permalink raw reply related
* Re: [PATCH net-next v3 01/13] phy: add sgmii and 10gkr modes to the phy_mode enum
From: Kishon Vijay Abraham I @ 2017-08-29 10:38 UTC (permalink / raw)
To: Antoine Tenart, davem, andrew, jason, sebastian.hesselbarth,
gregory.clement
Cc: thomas.petazzoni, nadavh, linux, linux-kernel, mw, stefanc,
miquel.raynal, netdev
In-Reply-To: <20170828145725.2539-2-antoine.tenart@free-electrons.com>
On Monday 28 August 2017 08:27 PM, Antoine Tenart wrote:
> This patch adds more generic PHY modes to the phy_mode enum, to
> allow configuring generic PHYs to the SGMII and/or the 10GKR mode
> by using the set_mode callback.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> include/linux/phy/phy.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> index 78bb0d7f6b11..e694d4008c4a 100644
> --- a/include/linux/phy/phy.h
> +++ b/include/linux/phy/phy.h
> @@ -27,6 +27,8 @@ enum phy_mode {
> PHY_MODE_USB_HOST,
> PHY_MODE_USB_DEVICE,
> PHY_MODE_USB_OTG,
> + PHY_MODE_SGMII,
> + PHY_MODE_10GKR,
> };
>
> /**
>
^ permalink raw reply
* nflog performance ...
From: Akshat Kakkar @ 2017-08-29 10:41 UTC (permalink / raw)
To: netdev
I am using ulogd2 to log iptables activity.
However, when using pgsql as output plugin ... performance is very
very sluggish. (~130-150 entries per second)
To enhance performance I am trying
modprobe ipt_ULOG nlbufsiz=65535 flushtimeout=1000
but this gives error : ipt_ULOG module not found.
On the same lines, I tried
modprobe ipt_NFLOG nlbufsiz=65535 flushtimeout=1000
It didnt give any error !!!
But still there is no increase in performance.
Are these values effective?
I am also using --nflog-threshold 50 in iptables rule.
I am setting buffer_size as
netlink_socket_buffer_size=104857600
netlink_socket_buffer_maxsize=1048576000
When running ulog, it gives message of setting buffer size as
21708600. Though it didnt give any message like
"ulogd_inppkt_NFLOG.c:443 We are losing events, increasing buffer size
to xxxxxx"
but again why it is only setting buffer size as 21708600 though I have
set in config as 104857600?
^ permalink raw reply
* Re: [ethtool] ethtool: Remove UDP Fragmentation Offload use from ethtool
From: Michal Kubecek @ 2017-08-29 10:44 UTC (permalink / raw)
To: Tariq Toukan
Cc: John W. Linville, Eric Dumazet, David Miller, netdev,
Eran Ben Elisha, Shaker Daibes
In-Reply-To: <a1c55136-c534-bcdf-ccc8-3f38affb69e8@mellanox.com>
On Tue, Aug 29, 2017 at 10:50:20AM +0300, Tariq Toukan wrote:
> On 28/08/2017 9:22 PM, John W. Linville wrote:
> > On Mon, Aug 28, 2017 at 08:00:11AM -0700, Eric Dumazet wrote:
> > > On Mon, 2017-08-28 at 15:38 +0300, Tariq Toukan wrote:
> > > > From: Shaker Daibes <shakerd@mellanox.com>
> > > >
> > > > UFO was removed in kernel, here we remove it in ethtool app.
> > > >
> > > > Fixes the following issue:
> > > > Features for ens8:
> > > > Cannot get device udp-fragmentation-offload settings: Operation not supported
>
> But I wonder how the warning removal should be done??
>
> I have some suggestions in mind:
> 1) Have a special condition that does not print a warning only in the case
> of UFO?
> 2) Remove the warning totally? I don't like this option.
> 3) Add a max_kernel_ver field in struct off_flag_def, and use it to not
> print the warning, or to mark the feature 'off [fixed]'.
IMHO there is nothing wrong with not writing a warning for "get"
operation, after all it's just "ethtool -k", i.e. "show me all
offloading flags" and we do not warn about unsupported named features
either. IMHO the only question should be how friendly we should be to
old scripts expecting the line in the output:
(a) omit the "udp-fragmentation-offload:" line (be consistent)
(b) say something like "udp-fragmentation-offload: n/a"
(c) pretend it's there and is off (most careful but misleading)
Personally, I would prefer (a) but some badly written scripts might have
problem with this approach.
On the other hand, an attempt to _set_ the flag with "ethtool -K" should
issue an error.
Michal Kubecek
^ permalink raw reply
* Re: [PATCH 0/4] irda: move it to drivers/staging so we can delete it
From: Geert Uytterhoeven @ 2017-08-29 10:59 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: David S. Miller, Samuel Ortiz, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, driverdevel
In-Reply-To: <20170827150334.32495-1-gregkh@linuxfoundation.org>
Hi Greg,
On Sun, Aug 27, 2017 at 5:03 PM, Greg Kroah-Hartman
<gregkh@linuxfoundation.org> wrote:
> The IRDA code has long been obsolete and broken. So, to keep people
> from trying to use it, and to prevent people from having to maintain it,
> let's move it to drivers/staging/ so that we can delete it entirely from
> the kernel in a few releases.
(diving into an early boot crash)
Have you tried running this? ;-)
irda_init() and net_dev_init() are both subsys_initcall()s.
But the former now runs before the latter, leading to:
Unable to handle kernel NULL pointer dereference at virtual address 00000004
pgd = c0004000
[00000004] *pgd=00000000
Internal error: Oops: 5 [#1] SMP ARM
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted
4.13.0-rc7-kzm9g-05769-g46efec19d1294ece-dirty #954
Hardware name: Generic SH73A0 (Flattened Device Tree)
task: df440040 task.stack: df442000
PC is at __list_add_valid+0x8/0x74
LR is at 0x0
pc : [<c03223ec>] lr : [<00000000>] psr: 60000013
sp : df443ef0 ip : df440630 fp : 00000000
r10: c0828858 r9 : c0937000 r8 : 00000000
r7 : c0908034 r6 : 00000000 r5 : c0908020 r4 : c090862c
r3 : df440040 r2 : 00000000 r1 : c090862c r0 : c0908034
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none
Control: 10c5387d Table: 4000404a DAC: 00000051
Process swapper/0 (pid: 1, stack limit = 0xdf442210)
Stack: (0xdf443ef0 to 0xdf444000)
3ee0: c090862c c0489ea8 00000000 00000000
3f00: c081c274 00000093 c0836418 c081c2a0 00000004 c0101878 00000000 c0790758
3f20: 00000000 c013fec0 00000001 c078fbf0 00000004 00000004 c079076c dfffce3f
3f40: 00000092 c079076c dfffce3f dfffce47 c0910af0 00000004 c0828844 00000093
3f60: 00000004 c0828848 00000093 c0836418 c0937000 c0800d28 00000004 00000004
3f80: 00000000 c08005b0 00000000 c055cf7c 00000000 00000000 00000000 00000000
3fa0: 00000000 c055cf84 00000000 c0106f90 00000000 00000000 00000000 00000000
3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 7fdfffff fff7fdff
[<c03223ec>] (__list_add_valid) from [<c0489ea8>] (dev_add_pack+0x70/0xac)
[<c0489ea8>] (dev_add_pack) from [<c081c2a0>] (irda_init+0x2c/0x84)
[<c081c2a0>] (irda_init) from [<c0101878>] (do_one_initcall+0xa8/0x150)
[<c0101878>] (do_one_initcall) from [<c0800d28>]
(kernel_init_freeable+0x114/0x1d4)
[<c0800d28>] (kernel_init_freeable) from [<c055cf84>] (kernel_init+0x8/0x110)
[<c055cf84>] (kernel_init) from [<c0106f90>] (ret_from_fork+0x14/0x24)
DIsabling CONFIG_IRDA (apparently I wasn't using it anyway), and
continuing my life...
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH net-next v3 02/13] phy: add the mvebu cp110 comphy driver
From: Kishon Vijay Abraham I @ 2017-08-29 11:04 UTC (permalink / raw)
To: Antoine Tenart, davem, andrew, jason, sebastian.hesselbarth,
gregory.clement
Cc: thomas.petazzoni, nadavh, linux, linux-kernel, mw, stefanc,
miquel.raynal, netdev
In-Reply-To: <20170828145725.2539-3-antoine.tenart@free-electrons.com>
Hi Antoine,
On Monday 28 August 2017 08:27 PM, Antoine Tenart wrote:
> On the CP110 unit, which can be found on various Marvell platforms such
> as the 7k and 8k (currently), a comphy (common PHYs) hardware block can
> be found. This block provides a number of PHYs which can be used in
> various modes by other controllers (network, SATA ...). These common
> PHYs must be configured for the controllers using them to work correctly
> either at boot time, or when the system runs to switch the mode used.
> This patch adds a driver for this comphy hardware block, providing
> callbacks for the its PHYs so that consumers can configure the modes
> used.
>
> As of this commit, two modes are supported by the comphy driver: sgmii
> and 10gkr.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
> ---
> drivers/phy/marvell/Kconfig | 10 +
> drivers/phy/marvell/Makefile | 1 +
> drivers/phy/marvell/phy-mvebu-cp110-comphy.c | 656 +++++++++++++++++++++++++++
> 3 files changed, 667 insertions(+)
> create mode 100644 drivers/phy/marvell/phy-mvebu-cp110-comphy.c
>
> diff --git a/drivers/phy/marvell/Kconfig b/drivers/phy/marvell/Kconfig
> index 048d8893bc2e..26755f3d1a9a 100644
> --- a/drivers/phy/marvell/Kconfig
> +++ b/drivers/phy/marvell/Kconfig
> @@ -21,6 +21,16 @@ config PHY_BERLIN_USB
> help
> Enable this to support the USB PHY on Marvell Berlin SoCs.
>
> +config PHY_MVEBU_CP110_COMPHY
> + tristate "Marvell CP110 comphy driver"
> + depends on ARCH_MVEBU && OF
(ARCH_MVEBU || COMPILE_TEST) above..
> + select GENERIC_PHY
> + help
> + This driver allows to control the comphy, an hardware block providing
> + shared serdes PHYs on Marvell Armada 7k/8k (in the CP110). Its serdes
> + lanes can be used by various controllers (Ethernet, sata, usb,
> + PCIe...).
> +
> config PHY_MVEBU_SATA
> def_bool y
> depends on ARCH_DOVE || MACH_DOVE || MACH_KIRKWOOD
> diff --git a/drivers/phy/marvell/Makefile b/drivers/phy/marvell/Makefile
> index 3fc188f59118..0cf6a7cbaf9f 100644
> --- a/drivers/phy/marvell/Makefile
> +++ b/drivers/phy/marvell/Makefile
> @@ -1,6 +1,7 @@
> obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o
> obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
> obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
> +obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
> obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
> obj-$(CONFIG_PHY_PXA_28NM_HSIC) += phy-pxa-28nm-hsic.o
> obj-$(CONFIG_PHY_PXA_28NM_USB2) += phy-pxa-28nm-usb2.o
> diff --git a/drivers/phy/marvell/phy-mvebu-cp110-comphy.c b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> new file mode 100644
> index 000000000000..41556e790856
> --- /dev/null
> +++ b/drivers/phy/marvell/phy-mvebu-cp110-comphy.c
> @@ -0,0 +1,656 @@
> +/*
> + * Copyright (C) 2017 Marvell
> + *
> + * Antoine Tenart <antoine.tenart@free-electrons.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/io.h>
> +#include <linux/iopoll.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/phy/phy.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +
> +/* Relative to priv->base */
> +#define MVEBU_COMPHY_SERDES_CFG0(n) (0x0 + (n) * 0x1000)
> +#define MVEBU_COMPHY_SERDES_CFG0_PU_PLL BIT(1)
> +#define MVEBU_COMPHY_SERDES_CFG0_GEN_RX(n) ((n) << 3)
> +#define MVEBU_COMPHY_SERDES_CFG0_GEN_TX(n) ((n) << 7)
> +#define MVEBU_COMPHY_SERDES_CFG0_PU_RX BIT(11)
> +#define MVEBU_COMPHY_SERDES_CFG0_PU_TX BIT(12)
> +#define MVEBU_COMPHY_SERDES_CFG0_HALF_BUS BIT(14)
> +#define MVEBU_COMPHY_SERDES_CFG1(n) (0x4 + (n) * 0x1000)
> +#define MVEBU_COMPHY_SERDES_CFG1_RESET BIT(3)
> +#define MVEBU_COMPHY_SERDES_CFG1_RX_INIT BIT(4)
> +#define MVEBU_COMPHY_SERDES_CFG1_CORE_RESET BIT(5)
> +#define MVEBU_COMPHY_SERDES_CFG1_RF_RESET BIT(6)
> +#define MVEBU_COMPHY_SERDES_CFG2(n) (0x8 + (n) * 0x1000)
> +#define MVEBU_COMPHY_SERDES_CFG2_DFE_EN BIT(4)
> +#define MVEBU_COMPHY_SERDES_STATUS0(n) (0x18 + (n) * 0x1000)
> +#define MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY BIT(2)
> +#define MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY BIT(3)
> +#define MVEBU_COMPHY_SERDES_STATUS0_RX_INIT BIT(4)
> +#define MVEBU_COMPHY_PWRPLL_CTRL(n) (0x804 + (n) * 0x1000)
> +#define MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(n) ((n) << 0)
> +#define MVEBU_COMPHY_PWRPLL_PHY_MODE(n) ((n) << 5)
> +#define MVEBU_COMPHY_IMP_CAL(n) (0x80c + (n) * 0x1000)
> +#define MVEBU_COMPHY_IMP_CAL_TX_EXT(n) ((n) << 10)
> +#define MVEBU_COMPHY_IMP_CAL_TX_EXT_EN BIT(15)
> +#define MVEBU_COMPHY_DFE_RES(n) (0x81c + (n) * 0x1000)
> +#define MVEBU_COMPHY_DFE_RES_FORCE_GEN_TBL BIT(15)
> +#define MVEBU_COMPHY_COEF(n) (0x828 + (n) * 0x1000)
> +#define MVEBU_COMPHY_COEF_DFE_EN BIT(14)
> +#define MVEBU_COMPHY_COEF_DFE_CTRL BIT(15)
> +#define MVEBU_COMPHY_GEN1_S0(n) (0x834 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S0_TX_AMP(n) ((n) << 1)
> +#define MVEBU_COMPHY_GEN1_S0_TX_EMPH(n) ((n) << 7)
> +#define MVEBU_COMPHY_GEN1_S1(n) (0x838 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(n) ((n) << 0)
> +#define MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(n) ((n) << 3)
> +#define MVEBU_COMPHY_GEN1_S1_RX_MUL_FI(n) ((n) << 6)
> +#define MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(n) ((n) << 8)
> +#define MVEBU_COMPHY_GEN1_S1_RX_DFE_EN BIT(10)
> +#define MVEBU_COMPHY_GEN1_S1_RX_DIV(n) ((n) << 11)
> +#define MVEBU_COMPHY_GEN1_S2(n) (0x8f4 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S2_TX_EMPH(n) ((n) << 0)
> +#define MVEBU_COMPHY_GEN1_S2_TX_EMPH_EN BIT(4)
> +#define MVEBU_COMPHY_LOOPBACK(n) (0x88c + (n) * 0x1000)
> +#define MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(n) ((n) << 1)
> +#define MVEBU_COMPHY_VDD_CAL0(n) (0x908 + (n) * 0x1000)
> +#define MVEBU_COMPHY_VDD_CAL0_CONT_MODE BIT(15)
> +#define MVEBU_COMPHY_EXT_SELV(n) (0x914 + (n) * 0x1000)
> +#define MVEBU_COMPHY_EXT_SELV_RX_SAMPL(n) ((n) << 5)
> +#define MVEBU_COMPHY_MISC_CTRL0(n) (0x93c + (n) * 0x1000)
> +#define MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE BIT(5)
> +#define MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL BIT(10)
> +#define MVEBU_COMPHY_RX_CTRL1(n) (0x940 + (n) * 0x1000)
> +#define MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL BIT(11)
> +#define MVEBU_COMPHY_RX_CTRL1_CLK8T_EN BIT(12)
> +#define MVEBU_COMPHY_SPEED_DIV(n) (0x954 + (n) * 0x1000)
> +#define MVEBU_COMPHY_SPEED_DIV_TX_FORCE BIT(7)
> +#define MVEBU_SP_CALIB(n) (0x96c + (n) * 0x1000)
> +#define MVEBU_SP_CALIB_SAMPLER(n) ((n) << 8)
> +#define MVEBU_SP_CALIB_SAMPLER_EN BIT(12)
> +#define MVEBU_COMPHY_TX_SLEW_RATE(n) (0x974 + (n) * 0x1000)
> +#define MVEBU_COMPHY_TX_SLEW_RATE_EMPH(n) ((n) << 5)
> +#define MVEBU_COMPHY_TX_SLEW_RATE_SLC(n) ((n) << 10)
> +#define MVEBU_COMPHY_DLT_CTRL(n) (0x984 + (n) * 0x1000)
> +#define MVEBU_COMPHY_DLT_CTRL_DTL_FLOOP_EN BIT(2)
> +#define MVEBU_COMPHY_FRAME_DETECT0(n) (0xa14 + (n) * 0x1000)
> +#define MVEBU_COMPHY_FRAME_DETECT0_PATN(n) ((n) << 7)
> +#define MVEBU_COMPHY_FRAME_DETECT3(n) (0xa20 + (n) * 0x1000)
> +#define MVEBU_COMPHY_FRAME_DETECT3_LOST_TIMEOUT_EN BIT(12)
> +#define MVEBU_COMPHY_DME(n) (0xa28 + (n) * 0x1000)
> +#define MVEBU_COMPHY_DME_ETH_MODE BIT(7)
> +#define MVEBU_COMPHY_TRAINING0(n) (0xa68 + (n) * 0x1000)
> +#define MVEBU_COMPHY_TRAINING0_P2P_HOLD BIT(15)
> +#define MVEBU_COMPHY_TRAINING5(n) (0xaa4 + (n) * 0x1000)
> +#define MVEBU_COMPHY_TRAINING5_RX_TIMER(n) ((n) << 0)
> +#define MVEBU_COMPHY_TX_TRAIN_PRESET(n) (0xb1c + (n) * 0x1000)
> +#define MVEBU_COMPHY_TX_TRAIN_PRESET_16B_AUTO_EN BIT(8)
> +#define MVEBU_COMPHY_TX_TRAIN_PRESET_PRBS11 BIT(9)
> +#define MVEBU_COMPHY_GEN1_S3(n) (0xc40 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S3_FBCK_SEL BIT(9)
> +#define MVEBU_COMPHY_GEN1_S4(n) (0xc44 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S4_DFE_RES(n) ((n) << 8)
> +#define MVEBU_COMPHY_TX_PRESET(n) (0xc68 + (n) * 0x1000)
> +#define MVEBU_COMPHY_TX_PRESET_INDEX(n) ((n) << 0)
> +#define MVEBU_COMPHY_GEN1_S5(n) (0xd38 + (n) * 0x1000)
> +#define MVEBU_COMPHY_GEN1_S5_ICP(n) ((n) << 0)
> +
> +/* Relative to priv->regmap */
> +#define MVEBU_COMPHY_CONF1(n) (0x1000 + (n) * 0x28)
> +#define MVEBU_COMPHY_CONF1_PWRUP BIT(1)
> +#define MVEBU_COMPHY_CONF1_USB_PCIE BIT(2) /* 0: Ethernet/SATA */
> +#define MVEBU_COMPHY_CONF6(n) (0x1014 + (n) * 0x28)
> +#define MVEBU_COMPHY_CONF6_40B BIT(18)
> +#define MVEBU_COMPHY_SELECTOR 0x1140
> +#define MVEBU_COMPHY_SELECTOR_PHY(n) ((n) * 0x4)
> +
> +#define MVEBU_COMPHY_LANES 6
> +#define MVEBU_COMPHY_PORTS 3
> +
> +struct mvebu_comhy_conf {
> + enum phy_mode mode;
> + unsigned lane;
> + unsigned port;
> + u32 mux;
> +};
> +
> +#define MVEBU_COMPHY_CONF(_lane, _port, _mode, _mux) \
> + { \
> + .lane = _lane, \
> + .port = _port, \
> + .mode = _mode, \
> + .mux = _mux, \
> + }
> +
> +static const struct mvebu_comhy_conf mvebu_comphy_cp110_modes[] = {
> + /* lane 0 */
> + MVEBU_COMPHY_CONF(0, 1, PHY_MODE_SGMII, 0x1),
> + /* lane 1 */
> + MVEBU_COMPHY_CONF(1, 2, PHY_MODE_SGMII, 0x1),
> + /* lane 2 */
> + MVEBU_COMPHY_CONF(2, 0, PHY_MODE_SGMII, 0x1),
> + MVEBU_COMPHY_CONF(2, 0, PHY_MODE_10GKR, 0x1),
> + /* lane 3 */
> + MVEBU_COMPHY_CONF(3, 1, PHY_MODE_SGMII, 0x2),
> + /* lane 4 */
> + MVEBU_COMPHY_CONF(4, 0, PHY_MODE_SGMII, 0x2),
> + MVEBU_COMPHY_CONF(4, 0, PHY_MODE_10GKR, 0x2),
> + MVEBU_COMPHY_CONF(4, 1, PHY_MODE_SGMII, 0x1),
> + /* lane 5 */
> + MVEBU_COMPHY_CONF(5, 2, PHY_MODE_SGMII, 0x1),
> +};
IMHO all the lane and mode configuration should come from dt. That would make
it more reusable when comphy is configured differently.
> +
> +struct mvebu_comphy_priv {
> + void __iomem *base;
> + struct regmap *regmap;
> + struct device *dev;
> + struct phy *phys[MVEBU_COMPHY_LANES];
> + int modes[MVEBU_COMPHY_LANES];
> +};
> +
> +struct mvebu_comphy_lane {
> + struct mvebu_comphy_priv *priv;
> + struct device_node *of_node;
> + unsigned id;
> + enum phy_mode mode;
> + int port;
> +};
> +
> +static int mvebu_comphy_get_mux(int lane, int port, enum phy_mode mode)
> +{
> + int i, n = ARRAY_SIZE(mvebu_comphy_cp110_modes);
> +
> + /* Unused PHY mux value is 0x0 */
> + if (mode == PHY_MODE_INVALID)
> + return 0;
> +
> + for (i = 0; i < n; i++) {
> + if (mvebu_comphy_cp110_modes[i].lane == lane &&
> + mvebu_comphy_cp110_modes[i].port == port &&
> + mvebu_comphy_cp110_modes[i].mode == mode)
> + break;
> + }
> +
> + if (i == n)
> + return -EINVAL;
> +
> + return mvebu_comphy_cp110_modes[i].mux;
> +}
> +
> +static void mvebu_comphy_ethernet_init_reset(struct mvebu_comphy_lane *lane,
> + enum phy_mode mode)
> +{
> + struct mvebu_comphy_priv *priv = lane->priv;
> + u32 val;
> +
> + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val);
> + val &= ~MVEBU_COMPHY_CONF1_USB_PCIE;
> + val |= MVEBU_COMPHY_CONF1_PWRUP;
> + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val);
> +
> + /* Select baud rates and PLLs */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
> + val &= ~(MVEBU_COMPHY_SERDES_CFG0_PU_PLL |
> + MVEBU_COMPHY_SERDES_CFG0_PU_RX |
> + MVEBU_COMPHY_SERDES_CFG0_PU_TX |
> + MVEBU_COMPHY_SERDES_CFG0_HALF_BUS |
> + MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xf) |
> + MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xf));
> + if (mode == PHY_MODE_10GKR)
> + val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0xe) |
> + MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0xe);
> + else if (mode == PHY_MODE_SGMII)
> + val |= MVEBU_COMPHY_SERDES_CFG0_GEN_RX(0x6) |
> + MVEBU_COMPHY_SERDES_CFG0_GEN_TX(0x6) |
> + MVEBU_COMPHY_SERDES_CFG0_HALF_BUS;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
> +
> + /* reset */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val &= ~(MVEBU_COMPHY_SERDES_CFG1_RESET |
> + MVEBU_COMPHY_SERDES_CFG1_CORE_RESET |
> + MVEBU_COMPHY_SERDES_CFG1_RF_RESET);
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + /* de-assert reset */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val |= MVEBU_COMPHY_SERDES_CFG1_RESET |
> + MVEBU_COMPHY_SERDES_CFG1_CORE_RESET;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + /* wait until clocks are ready */
> + mdelay(1);
> +
> + /* exlicitly disable 40B, the bits isn't clear on reset */
> + regmap_read(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), &val);
> + val &= ~MVEBU_COMPHY_CONF6_40B;
> + regmap_write(priv->regmap, MVEBU_COMPHY_CONF6(lane->id), val);
> +
> + /* refclk selection */
> + val = readl(priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
> + val &= ~MVEBU_COMPHY_MISC_CTRL0_REFCLK_SEL;
> + if (mode == PHY_MODE_10GKR)
> + val |= MVEBU_COMPHY_MISC_CTRL0_ICP_FORCE;
> + writel(val, priv->base + MVEBU_COMPHY_MISC_CTRL0(lane->id));
> +
> + /* power and pll selection */
> + val = readl(priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id));
> + val &= ~(MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1f) |
> + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x7));
> + val |= MVEBU_COMPHY_PWRPLL_CTRL_RFREQ(0x1) |
> + MVEBU_COMPHY_PWRPLL_PHY_MODE(0x4);
> + writel(val, priv->base + MVEBU_COMPHY_PWRPLL_CTRL(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
> + val &= ~MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x7);
> + val |= MVEBU_COMPHY_LOOPBACK_DBUS_WIDTH(0x1);
> + writel(val, priv->base + MVEBU_COMPHY_LOOPBACK(lane->id));
> +}
> +
> +static int mvebu_comphy_init_plls(struct mvebu_comphy_lane *lane,
> + enum phy_mode mode)
> +{
> + struct mvebu_comphy_priv *priv = lane->priv;
> + u32 val;
> +
> + /* SERDES external config */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
> + val |= MVEBU_COMPHY_SERDES_CFG0_PU_PLL |
> + MVEBU_COMPHY_SERDES_CFG0_PU_RX |
> + MVEBU_COMPHY_SERDES_CFG0_PU_TX;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG0(lane->id));
> +
> + /* check rx/tx pll */
> + readl_poll_timeout(priv->base + MVEBU_COMPHY_SERDES_STATUS0(lane->id),
> + val,
> + val & (MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY |
> + MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY),
> + 1000, 150000);
> + if (!(val & (MVEBU_COMPHY_SERDES_STATUS0_RX_PLL_RDY |
> + MVEBU_COMPHY_SERDES_STATUS0_TX_PLL_RDY)))
> + return -ETIMEDOUT;
> +
> + /* rx init */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val |= MVEBU_COMPHY_SERDES_CFG1_RX_INIT;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + /* check rx */
> + readl_poll_timeout(priv->base + MVEBU_COMPHY_SERDES_STATUS0(lane->id),
> + val, val & MVEBU_COMPHY_SERDES_STATUS0_RX_INIT,
> + 1000, 10000);
> + if (!(val & MVEBU_COMPHY_SERDES_STATUS0_RX_INIT))
> + return -ETIMEDOUT;
> +
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val &= ~MVEBU_COMPHY_SERDES_CFG1_RX_INIT;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + return 0;
> +}
> +
> +static int mvebu_comphy_set_mode_sgmii(struct phy *phy, enum phy_mode mode)
> +{
> + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> + struct mvebu_comphy_priv *priv = lane->priv;
> + u32 val;
> +
> + mvebu_comphy_ethernet_init_reset(lane, mode);
> +
> + val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> + val &= ~MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
> + val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL;
> + writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> + val &= ~MVEBU_COMPHY_DLT_CTRL_DTL_FLOOP_EN;
> + writel(val, priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> +
> + regmap_read(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), &val);
> + val &= ~MVEBU_COMPHY_CONF1_USB_PCIE;
> + val |= MVEBU_COMPHY_CONF1_PWRUP;
> + regmap_write(priv->regmap, MVEBU_COMPHY_CONF1(lane->id), val);
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> + val &= ~MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf);
> + val |= MVEBU_COMPHY_GEN1_S0_TX_EMPH(0x1);
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> +
> + return mvebu_comphy_init_plls(lane, mode);
> +}
> +
> +static int mvebu_comphy_set_mode_10gkr(struct phy *phy, enum phy_mode mode)
> +{
> + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> + struct mvebu_comphy_priv *priv = lane->priv;
> + u32 val;
> +
> + mvebu_comphy_ethernet_init_reset(lane, mode);
> +
> + val = readl(priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> + val |= MVEBU_COMPHY_RX_CTRL1_RXCLK2X_SEL |
> + MVEBU_COMPHY_RX_CTRL1_CLK8T_EN;
> + writel(val, priv->base + MVEBU_COMPHY_RX_CTRL1(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> + val |= MVEBU_COMPHY_DLT_CTRL_DTL_FLOOP_EN;
> + writel(val, priv->base + MVEBU_COMPHY_DLT_CTRL(lane->id));
> +
> + /* Speed divider */
> + val = readl(priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id));
> + val |= MVEBU_COMPHY_SPEED_DIV_TX_FORCE;
> + writel(val, priv->base + MVEBU_COMPHY_SPEED_DIV(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
> + val |= MVEBU_COMPHY_SERDES_CFG2_DFE_EN;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG2(lane->id));
> +
> + /* DFE resolution */
> + val = readl(priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
> + val |= MVEBU_COMPHY_DFE_RES_FORCE_GEN_TBL;
> + writel(val, priv->base + MVEBU_COMPHY_DFE_RES(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> + val &= ~(MVEBU_COMPHY_GEN1_S0_TX_AMP(0x1f) |
> + MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xf));
> + val |= MVEBU_COMPHY_GEN1_S0_TX_AMP(0x1c) |
> + MVEBU_COMPHY_GEN1_S0_TX_EMPH(0xe);
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S0(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S2(lane->id));
> + val &= ~MVEBU_COMPHY_GEN1_S2_TX_EMPH(0xf);
> + val |= MVEBU_COMPHY_GEN1_S2_TX_EMPH_EN;
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S2(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id));
> + val |= MVEBU_COMPHY_TX_SLEW_RATE_EMPH(0x3) |
> + MVEBU_COMPHY_TX_SLEW_RATE_SLC(0x3f);
> + writel(val, priv->base + MVEBU_COMPHY_TX_SLEW_RATE(lane->id));
> +
> + /* Impedance calibration */
> + val = readl(priv->base + MVEBU_COMPHY_IMP_CAL(lane->id));
> + val &= ~MVEBU_COMPHY_IMP_CAL_TX_EXT(0x1f);
> + val |= MVEBU_COMPHY_IMP_CAL_TX_EXT(0xe) |
> + MVEBU_COMPHY_IMP_CAL_TX_EXT_EN;
> + writel(val, priv->base + MVEBU_COMPHY_IMP_CAL(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S5(lane->id));
> + val &= ~MVEBU_COMPHY_GEN1_S5_ICP(0xf);
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S5(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
> + val &= ~(MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(0x7) |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(0x7) |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_FI(0x3) |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(0x3));
> + val |= MVEBU_COMPHY_GEN1_S1_RX_DFE_EN |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_PI(0x2) |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_PF(0x2) |
> + MVEBU_COMPHY_GEN1_S1_RX_MUL_FF(0x1) |
> + MVEBU_COMPHY_GEN1_S1_RX_DIV(0x3);
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S1(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_COEF(lane->id));
> + val &= ~(MVEBU_COMPHY_COEF_DFE_EN | MVEBU_COMPHY_COEF_DFE_CTRL);
> + writel(val, priv->base + MVEBU_COMPHY_COEF(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
> + val &= ~MVEBU_COMPHY_GEN1_S4_DFE_RES(0x3);
> + val |= MVEBU_COMPHY_GEN1_S4_DFE_RES(0x1);
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S4(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_GEN1_S3(lane->id));
> + val |= MVEBU_COMPHY_GEN1_S3_FBCK_SEL;
> + writel(val, priv->base + MVEBU_COMPHY_GEN1_S3(lane->id));
> +
> + /* rx training timer */
> + val = readl(priv->base + MVEBU_COMPHY_TRAINING5(lane->id));
> + val &= ~MVEBU_COMPHY_TRAINING5_RX_TIMER(0x3ff);
> + val |= MVEBU_COMPHY_TRAINING5_RX_TIMER(0x13);
> + writel(val, priv->base + MVEBU_COMPHY_TRAINING5(lane->id));
> +
> + /* tx train peak to peak hold */
> + val = readl(priv->base + MVEBU_COMPHY_TRAINING0(lane->id));
> + val |= MVEBU_COMPHY_TRAINING0_P2P_HOLD;
> + writel(val, priv->base + MVEBU_COMPHY_TRAINING0(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_TX_PRESET(lane->id));
> + val &= ~MVEBU_COMPHY_TX_PRESET_INDEX(0xf);
> + val |= MVEBU_COMPHY_TX_PRESET_INDEX(0x2); /* preset coeff */
> + writel(val, priv->base + MVEBU_COMPHY_TX_PRESET(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id));
> + val &= ~MVEBU_COMPHY_FRAME_DETECT3_LOST_TIMEOUT_EN;
> + writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT3(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id));
> + val |= MVEBU_COMPHY_TX_TRAIN_PRESET_16B_AUTO_EN |
> + MVEBU_COMPHY_TX_TRAIN_PRESET_PRBS11;
> + writel(val, priv->base + MVEBU_COMPHY_TX_TRAIN_PRESET(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id));
> + val &= ~MVEBU_COMPHY_FRAME_DETECT0_PATN(0x1ff);
> + val |= MVEBU_COMPHY_FRAME_DETECT0_PATN(0x88);
> + writel(val, priv->base + MVEBU_COMPHY_FRAME_DETECT0(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_DME(lane->id));
> + val |= MVEBU_COMPHY_DME_ETH_MODE;
> + writel(val, priv->base + MVEBU_COMPHY_DME(lane->id));
> +
> + val = readl(priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id));
> + val |= MVEBU_COMPHY_VDD_CAL0_CONT_MODE;
> + writel(val, priv->base + MVEBU_COMPHY_VDD_CAL0(lane->id));
> +
> + val = readl(priv->base + MVEBU_SP_CALIB(lane->id));
> + val &= ~MVEBU_SP_CALIB_SAMPLER(0x3);
> + val |= MVEBU_SP_CALIB_SAMPLER(0x3) |
> + MVEBU_SP_CALIB_SAMPLER_EN;
> + writel(val, priv->base + MVEBU_SP_CALIB(lane->id));
> + val &= ~MVEBU_SP_CALIB_SAMPLER_EN;
> + writel(val, priv->base + MVEBU_SP_CALIB(lane->id));
> +
> + /* External rx regulator */
> + val = readl(priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
> + val &= ~MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1f);
> + val |= MVEBU_COMPHY_EXT_SELV_RX_SAMPL(0x1a);
> + writel(val, priv->base + MVEBU_COMPHY_EXT_SELV(lane->id));
> +
> + return mvebu_comphy_init_plls(lane, mode);
> +}
> +
> +static int mvebu_comphy_power_on(struct phy *phy)
> +{
> + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> + struct mvebu_comphy_priv *priv = lane->priv;
> + int ret;
> + u32 mux, val;
> +
> + mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
> + if (mux < 0)
> + return -ENOTSUPP;
> +
> + regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val);
> + val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
> + val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
> + regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
> +
> + switch (lane->mode) {
> + case PHY_MODE_SGMII:
> + ret = mvebu_comphy_set_mode_sgmii(phy, lane->mode);
> + break;
> + case PHY_MODE_10GKR:
> + ret = mvebu_comphy_set_mode_10gkr(phy, lane->mode);
> + break;
> + default:
> + return -ENOTSUPP;
> + }
> +
> + /* digital reset */
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val |= MVEBU_COMPHY_SERDES_CFG1_RF_RESET;
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + return ret;
> +}
> +
> +static int mvebu_comphy_set_mode(struct phy *phy, enum phy_mode mode)
> +{
> + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> +
> + if (mvebu_comphy_get_mux(lane->id, lane->port, mode) < 0)
> + return -EINVAL;
> +
> + lane->mode = mode;
> + return 0;
> +}
> +
> +static int mvebu_comphy_power_off(struct phy *phy)
> +{
> + struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
> + struct mvebu_comphy_priv *priv = lane->priv;
> + u32 val;
> +
> + val = readl(priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> + val &= ~(MVEBU_COMPHY_SERDES_CFG1_RESET |
> + MVEBU_COMPHY_SERDES_CFG1_CORE_RESET |
> + MVEBU_COMPHY_SERDES_CFG1_RF_RESET);
> + writel(val, priv->base + MVEBU_COMPHY_SERDES_CFG1(lane->id));
> +
> + regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val);
> + val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
> + regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
> +
> + return 0;
> +}
> +
> +static const struct phy_ops mvebu_comphy_ops = {
> + .power_on = mvebu_comphy_power_on,
> + .power_off = mvebu_comphy_power_off,
> + .set_mode = mvebu_comphy_set_mode,
missing .owner
> +};
> +
> +static struct phy *mvebu_comphy_xlate(struct device *dev,
> + struct of_phandle_args *args)
> +{
> + struct mvebu_comphy_priv *priv = dev_get_drvdata(dev);
> + struct mvebu_comphy_lane *lane;
> + int i;
> +
> + if (WARN_ON(args->args[0] >= MVEBU_COMPHY_PORTS))
> + return ERR_PTR(-EINVAL);
> +
> + for (i = 0; i < MVEBU_COMPHY_LANES; i++) {
> + if (!priv->phys[i])
> + continue;
> +
> + lane = phy_get_drvdata(priv->phys[i]);
> + if (priv->phys[i] && args->np == lane->of_node)
> + break;
> + }
You should be able to directly use of_phy_simple_xlate to get the phy pointer.
(For that to work child node pointer should be passed in devm_phy_create).
Thanks
Kishon
^ permalink raw reply
* Re: staging: r8822be: Add code for halmac sub-driver
From: Andreas Ziegler @ 2017-08-29 10:59 UTC (permalink / raw)
To: Ping-Ke Shih, Larry Finger
Cc: gregkh, Yan-Hsuan Chuang, Birming Chiu, Shaofu, Steven Ting,
netdev, devel
In-Reply-To: <20170817174652.17656-5-Larry.Finger@lwfinger.net>
[-- Attachment #1.1: Type: text/plain, Size: 482 bytes --]
Hi Ping-Ke, hi Larry,
I noticed your commit in linux-next today using the in-tree script at
scripts/checkkconfigsymbols.py [0]. The script showed that it uses
CONFIG_RTL_DEBUG in an #ifdef statement - this symbol, however, does not exist,
and should probably be CONFIG_RTLWIFI_DEBUG instead.
I attached a patch which fixes this problem.
Best regards,
Andreas Ziegler
[0]: I called the script like this: './scripts/checkkconfigsymbols.py --force -c
938a0447f094'
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1.2: 0001-staging-r8822be-Fix-typo-for-CONFIG_RTLWIFI_DEBUG.patch --]
[-- Type: text/x-patch; name="0001-staging-r8822be-Fix-typo-for-CONFIG_RTLWIFI_DEBUG.patch", Size: 1319 bytes --]
From 6c713900ed877c01f94fb76630f9ffd32c73ec88 Mon Sep 17 00:00:00 2001
From: Andreas Ziegler <andreas.ziegler@fau.de>
Date: Tue, 29 Aug 2017 12:50:37 +0200
Subject: [PATCH] staging: r8822be: Fix typo for CONFIG_RTLWIFI_DEBUG
The debugging output in deinit_priv is guarded by an #ifdef using
CONFIG_RTL_DEBUG. This symbol does not exist and should be
CONFIG_RTLWIFI_DEBUG instead.
Signed-off-by: Andreas Ziegler <andreas.ziegler@fau.de>
---
drivers/staging/rtlwifi/halmac/rtl_halmac.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtlwifi/halmac/rtl_halmac.c b/drivers/staging/rtlwifi/halmac/rtl_halmac.c
index 031bf2c..888ca43 100644
--- a/drivers/staging/rtlwifi/halmac/rtl_halmac.c
+++ b/drivers/staging/rtlwifi/halmac/rtl_halmac.c
@@ -386,7 +386,7 @@ static void deinit_priv(struct rtl_halmac *halmac)
u32 count, size;
count = HALMAC_FEATURE_ALL + 1;
-#ifdef CONFIG_RTL_DEBUG
+#ifdef CONFIG_RTLWIFI_DEBUG
{
struct submit_ctx *sctx;
u32 i;
@@ -405,7 +405,7 @@ static void deinit_priv(struct rtl_halmac *halmac)
rtl_mfree((u8 *)sctx, sizeof(*sctx));
}
}
-#endif /* !CONFIG_RTL_DEBUG */
+#endif /* !CONFIG_RTLWIFI_DEBUG */
size = sizeof(*indicator) * count;
kfree((u8 *)indicator);
}
--
2.7.4
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 5450 bytes --]
^ permalink raw reply related
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