* [PATCH V2 06/15] ARM: imx: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:50 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-imx/iomux-mx3.h:93]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-imx/iomux-mx3.h | 64 +++++++++++++++++++++----------------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-imx/iomux-mx3.h b/arch/arm/mach-imx/iomux-mx3.h
index 99270a183d47..028b683866c3 100644
--- a/arch/arm/mach-imx/iomux-mx3.h
+++ b/arch/arm/mach-imx/iomux-mx3.h
@@ -59,38 +59,38 @@ enum iomux_pad_config {
* various IOMUX general purpose functions
*/
enum iomux_gp_func {
- MUX_PGP_FIRI = 1 << 0,
- MUX_DDR_MODE = 1 << 1,
- MUX_PGP_CSPI_BB = 1 << 2,
- MUX_PGP_ATA_1 = 1 << 3,
- MUX_PGP_ATA_2 = 1 << 4,
- MUX_PGP_ATA_3 = 1 << 5,
- MUX_PGP_ATA_4 = 1 << 6,
- MUX_PGP_ATA_5 = 1 << 7,
- MUX_PGP_ATA_6 = 1 << 8,
- MUX_PGP_ATA_7 = 1 << 9,
- MUX_PGP_ATA_8 = 1 << 10,
- MUX_PGP_UH2 = 1 << 11,
- MUX_SDCTL_CSD0_SEL = 1 << 12,
- MUX_SDCTL_CSD1_SEL = 1 << 13,
- MUX_CSPI1_UART3 = 1 << 14,
- MUX_EXTDMAREQ2_MBX_SEL = 1 << 15,
- MUX_TAMPER_DETECT_EN = 1 << 16,
- MUX_PGP_USB_4WIRE = 1 << 17,
- MUX_PGP_USB_COMMON = 1 << 18,
- MUX_SDHC_MEMSTICK1 = 1 << 19,
- MUX_SDHC_MEMSTICK2 = 1 << 20,
- MUX_PGP_SPLL_BYP = 1 << 21,
- MUX_PGP_UPLL_BYP = 1 << 22,
- MUX_PGP_MSHC1_CLK_SEL = 1 << 23,
- MUX_PGP_MSHC2_CLK_SEL = 1 << 24,
- MUX_CSPI3_UART5_SEL = 1 << 25,
- MUX_PGP_ATA_9 = 1 << 26,
- MUX_PGP_USB_SUSPEND = 1 << 27,
- MUX_PGP_USB_OTG_LOOPBACK = 1 << 28,
- MUX_PGP_USB_HS1_LOOPBACK = 1 << 29,
- MUX_PGP_USB_HS2_LOOPBACK = 1 << 30,
- MUX_CLKO_DDR_MODE = 1 << 31,
+ MUX_PGP_FIRI = BIT(0),
+ MUX_DDR_MODE = BIT(1),
+ MUX_PGP_CSPI_BB = BIT(2),
+ MUX_PGP_ATA_1 = BIT(3),
+ MUX_PGP_ATA_2 = BIT(4),
+ MUX_PGP_ATA_3 = BIT(5),
+ MUX_PGP_ATA_4 = BIT(6),
+ MUX_PGP_ATA_5 = BIT(7),
+ MUX_PGP_ATA_6 = BIT(8),
+ MUX_PGP_ATA_7 = BIT(9),
+ MUX_PGP_ATA_8 = BIT(10),
+ MUX_PGP_UH2 = BIT(11),
+ MUX_SDCTL_CSD0_SEL = BIT(12),
+ MUX_SDCTL_CSD1_SEL = BIT(13),
+ MUX_CSPI1_UART3 = BIT(14),
+ MUX_EXTDMAREQ2_MBX_SEL = BIT(15),
+ MUX_TAMPER_DETECT_EN = BIT(16),
+ MUX_PGP_USB_4WIRE = BIT(17),
+ MUX_PGP_USB_COMMON = BIT(18),
+ MUX_SDHC_MEMSTICK1 = BIT(19),
+ MUX_SDHC_MEMSTICK2 = BIT(20),
+ MUX_PGP_SPLL_BYP = BIT(21),
+ MUX_PGP_UPLL_BYP = BIT(22),
+ MUX_PGP_MSHC1_CLK_SEL = BIT(23),
+ MUX_PGP_MSHC2_CLK_SEL = BIT(24),
+ MUX_CSPI3_UART5_SEL = BIT(25),
+ MUX_PGP_ATA_9 = BIT(26),
+ MUX_PGP_USB_SUSPEND = BIT(27),
+ MUX_PGP_USB_OTG_LOOPBACK = BIT(28),
+ MUX_PGP_USB_HS1_LOOPBACK = BIT(29),
+ MUX_PGP_USB_HS2_LOOPBACK = BIT(30),
+ MUX_CLKO_DDR_MODE = BIT(31),
};
/*
--
2.11.0
^ permalink raw reply related
* [PATCH V2 07/15] ARM: ks8695: cleanup cppcheck shifting error
From: Phong Tran @ 2019-06-24 13:50 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-ks8695/pci.c:33]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-ks8695/regs-pci.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-ks8695/regs-pci.h b/arch/arm/mach-ks8695/regs-pci.h
index 75a9db6edbd9..7d28a83bb574 100644
--- a/arch/arm/mach-ks8695/regs-pci.h
+++ b/arch/arm/mach-ks8695/regs-pci.h
@@ -45,9 +45,9 @@
-#define CFRV_GUEST (1 << 23)
+#define CFRV_GUEST BIT(23)
#define PBCA_TYPE1 (1)
-#define PBCA_ENABLE (1 << 31)
+#define PBCA_ENABLE BIT(31)
--
2.11.0
^ permalink raw reply related
* [PATCH V2 08/15] ARM: mmp: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:50 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-mmp/pm-mmp2.c:121]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
[arch/arm/mach-mmp/pm-mmp2.c:136]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
[arch/arm/mach-mmp/pm-mmp2.c:244]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
[arch/arm/mach-mmp/pm-pxa910.c:141]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour
[arch/arm/mach-mmp/pm-pxa910.c:159]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-mmp/pm-mmp2.h | 40 +++++++++++------------
arch/arm/mach-mmp/pm-pxa910.h | 76 +++++++++++++++++++++----------------------
2 files changed, 58 insertions(+), 58 deletions(-)
diff --git a/arch/arm/mach-mmp/pm-mmp2.h b/arch/arm/mach-mmp/pm-mmp2.h
index 70299a9450d3..631ba71abdbd 100644
--- a/arch/arm/mach-mmp/pm-mmp2.h
+++ b/arch/arm/mach-mmp/pm-mmp2.h
@@ -12,37 +12,37 @@
#include "addr-map.h"
#define APMU_PJ_IDLE_CFG APMU_REG(0x018)
-#define APMU_PJ_IDLE_CFG_PJ_IDLE (1 << 1)
-#define APMU_PJ_IDLE_CFG_PJ_PWRDWN (1 << 5)
+#define APMU_PJ_IDLE_CFG_PJ_IDLE BIT(1)
+#define APMU_PJ_IDLE_CFG_PJ_PWRDWN BIT(5)
#define APMU_PJ_IDLE_CFG_PWR_SW(x) ((x) << 16)
-#define APMU_PJ_IDLE_CFG_L2_PWR_SW (1 << 19)
+#define APMU_PJ_IDLE_CFG_L2_PWR_SW BIT(19)
#define APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK (3 << 28)
#define APMU_SRAM_PWR_DWN APMU_REG(0x08c)
#define MPMU_SCCR MPMU_REG(0x038)
#define MPMU_PCR_PJ MPMU_REG(0x1000)
-#define MPMU_PCR_PJ_AXISD (1 << 31)
-#define MPMU_PCR_PJ_SLPEN (1 << 29)
-#define MPMU_PCR_PJ_SPSD (1 << 28)
-#define MPMU_PCR_PJ_DDRCORSD (1 << 27)
-#define MPMU_PCR_PJ_APBSD (1 << 26)
-#define MPMU_PCR_PJ_INTCLR (1 << 24)
-#define MPMU_PCR_PJ_SLPWP0 (1 << 23)
-#define MPMU_PCR_PJ_SLPWP1 (1 << 22)
-#define MPMU_PCR_PJ_SLPWP2 (1 << 21)
-#define MPMU_PCR_PJ_SLPWP3 (1 << 20)
-#define MPMU_PCR_PJ_VCTCXOSD (1 << 19)
-#define MPMU_PCR_PJ_SLPWP4 (1 << 18)
-#define MPMU_PCR_PJ_SLPWP5 (1 << 17)
-#define MPMU_PCR_PJ_SLPWP6 (1 << 16)
-#define MPMU_PCR_PJ_SLPWP7 (1 << 15)
+#define MPMU_PCR_PJ_AXISD BIT(31)
+#define MPMU_PCR_PJ_SLPEN BIT(29)
+#define MPMU_PCR_PJ_SPSD BIT(28)
+#define MPMU_PCR_PJ_DDRCORSD BIT(27)
+#define MPMU_PCR_PJ_APBSD BIT(26)
+#define MPMU_PCR_PJ_INTCLR BIT(24)
+#define MPMU_PCR_PJ_SLPWP0 BIT(23)
+#define MPMU_PCR_PJ_SLPWP1 BIT(22)
+#define MPMU_PCR_PJ_SLPWP2 BIT(21)
+#define MPMU_PCR_PJ_SLPWP3 BIT(20)
+#define MPMU_PCR_PJ_VCTCXOSD BIT(19)
+#define MPMU_PCR_PJ_SLPWP4 BIT(18)
+#define MPMU_PCR_PJ_SLPWP5 BIT(17)
+#define MPMU_PCR_PJ_SLPWP6 BIT(16)
+#define MPMU_PCR_PJ_SLPWP7 BIT(15)
#define MPMU_PLL2_CTRL1 MPMU_REG(0x0414)
#define MPMU_CGR_PJ MPMU_REG(0x1024)
#define MPMU_WUCRM_PJ MPMU_REG(0x104c)
-#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x))
-#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17)
+#define MPMU_WUCRM_PJ_WAKEUP(x) BIT((x))
+#define MPMU_WUCRM_PJ_RTC_ALARM BIT(17)
enum {
POWER_MODE_ACTIVE = 0,
diff --git a/arch/arm/mach-mmp/pm-pxa910.h b/arch/arm/mach-mmp/pm-pxa910.h
index 8e6344adaf51..f4a0b9811e87 100644
--- a/arch/arm/mach-mmp/pm-pxa910.h
+++ b/arch/arm/mach-mmp/pm-pxa910.h
@@ -10,54 +10,54 @@
#define __PXA910_PM_H__
#define APMU_MOH_IDLE_CFG APMU_REG(0x0018)
-#define APMU_MOH_IDLE_CFG_MOH_IDLE (1 << 1)
-#define APMU_MOH_IDLE_CFG_MOH_PWRDWN (1 << 5)
-#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN (1 << 6)
+#define APMU_MOH_IDLE_CFG_MOH_IDLE BIT(1)
+#define APMU_MOH_IDLE_CFG_MOH_PWRDWN BIT(5)
+#define APMU_MOH_IDLE_CFG_MOH_SRAM_PWRDWN BIT(6)
#define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16)
#define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18)
-#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ (1 << 21)
-#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN (1 << 20)
+#define APMU_MOH_IDLE_CFG_MOH_DIS_MC_SW_REQ BIT(21)
+#define APMU_MOH_IDLE_CFG_MOH_MC_WAKE_EN BIT(20)
#define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c)
#define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0)
#define MPMU_FCCR MPMU_REG(0x0008)
#define MPMU_APCR MPMU_REG(0x1000)
-#define MPMU_APCR_AXISD (1 << 31)
-#define MPMU_APCR_DSPSD (1 << 30)
-#define MPMU_APCR_SLPEN (1 << 29)
-#define MPMU_APCR_DTCMSD (1 << 28)
-#define MPMU_APCR_DDRCORSD (1 << 27)
-#define MPMU_APCR_APBSD (1 << 26)
-#define MPMU_APCR_BBSD (1 << 25)
-#define MPMU_APCR_SLPWP0 (1 << 23)
-#define MPMU_APCR_SLPWP1 (1 << 22)
-#define MPMU_APCR_SLPWP2 (1 << 21)
-#define MPMU_APCR_SLPWP3 (1 << 20)
-#define MPMU_APCR_VCTCXOSD (1 << 19)
-#define MPMU_APCR_SLPWP4 (1 << 18)
-#define MPMU_APCR_SLPWP5 (1 << 17)
-#define MPMU_APCR_SLPWP6 (1 << 16)
-#define MPMU_APCR_SLPWP7 (1 << 15)
-#define MPMU_APCR_MSASLPEN (1 << 14)
-#define MPMU_APCR_STBYEN (1 << 13)
+#define MPMU_APCR_AXISD BIT(31)
+#define MPMU_APCR_DSPSD BIT(30)
+#define MPMU_APCR_SLPEN BIT(29)
+#define MPMU_APCR_DTCMSD BIT(28)
+#define MPMU_APCR_DDRCORSD BIT(27)
+#define MPMU_APCR_APBSD BIT(26)
+#define MPMU_APCR_BBSD BIT(25)
+#define MPMU_APCR_SLPWP0 BIT(23)
+#define MPMU_APCR_SLPWP1 BIT(22)
+#define MPMU_APCR_SLPWP2 BIT(21)
+#define MPMU_APCR_SLPWP3 BIT(20)
+#define MPMU_APCR_VCTCXOSD BIT(19)
+#define MPMU_APCR_SLPWP4 BIT(18)
+#define MPMU_APCR_SLPWP5 BIT(17)
+#define MPMU_APCR_SLPWP6 BIT(16)
+#define MPMU_APCR_SLPWP7 BIT(15)
+#define MPMU_APCR_MSASLPEN BIT(14)
+#define MPMU_APCR_STBYEN BIT(13)
#define MPMU_AWUCRM MPMU_REG(0x104c)
-#define MPMU_AWUCRM_AP_ASYNC_INT (1 << 25)
-#define MPMU_AWUCRM_AP_FULL_IDLE (1 << 24)
-#define MPMU_AWUCRM_SDH1 (1 << 23)
-#define MPMU_AWUCRM_SDH2 (1 << 22)
-#define MPMU_AWUCRM_KEYPRESS (1 << 21)
-#define MPMU_AWUCRM_TRACKBALL (1 << 20)
-#define MPMU_AWUCRM_NEWROTARY (1 << 19)
-#define MPMU_AWUCRM_RTC_ALARM (1 << 17)
-#define MPMU_AWUCRM_AP2_TIMER_3 (1 << 13)
-#define MPMU_AWUCRM_AP2_TIMER_2 (1 << 12)
-#define MPMU_AWUCRM_AP2_TIMER_1 (1 << 11)
-#define MPMU_AWUCRM_AP1_TIMER_3 (1 << 10)
-#define MPMU_AWUCRM_AP1_TIMER_2 (1 << 9)
-#define MPMU_AWUCRM_AP1_TIMER_1 (1 << 8)
-#define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7))
+#define MPMU_AWUCRM_AP_ASYNC_INT BIT(25)
+#define MPMU_AWUCRM_AP_FULL_IDLE BIT(24)
+#define MPMU_AWUCRM_SDH1 BIT(23)
+#define MPMU_AWUCRM_SDH2 BIT(22)
+#define MPMU_AWUCRM_KEYPRESS BIT(21)
+#define MPMU_AWUCRM_TRACKBALL BIT(20)
+#define MPMU_AWUCRM_NEWROTARY BIT(19)
+#define MPMU_AWUCRM_RTC_ALARM BIT(17)
+#define MPMU_AWUCRM_AP2_TIMER_3 BIT(13)
+#define MPMU_AWUCRM_AP2_TIMER_2 BIT(12)
+#define MPMU_AWUCRM_AP2_TIMER_1 BIT(11)
+#define MPMU_AWUCRM_AP1_TIMER_3 BIT(10)
+#define MPMU_AWUCRM_AP1_TIMER_2 BIT(9)
+#define MPMU_AWUCRM_AP1_TIMER_1 BIT(8)
+#define MPMU_AWUCRM_WAKEUP(x) BIT(((x) & 0x7))
enum {
POWER_MODE_ACTIVE = 0,
--
2.11.0
^ permalink raw reply related
* [PATCH V2 09/15] ARM: omap2: cleanup cppcheck shifting error
From: Phong Tran @ 2019-06-24 13:50 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-omap2/powerdomain.c:190]: (error) Shifting signed 32-bit
value by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-omap2/powerdomain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 1cbac76136d4..886961726380 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,7 +35,7 @@
#include "soc.h"
#include "pm.h"
-#define PWRDM_TRACE_STATES_FLAG (1<<31)
+#define PWRDM_TRACE_STATES_FLAG BIT(31)
void pwrdms_save_context(void);
void pwrdms_restore_context(void);
--
2.11.0
^ permalink raw reply related
* [PATCH V2 10/15] ARM: orion5x: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-orion5x/pci.c:281]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
[arch/arm/mach-orion5x/pci.c:305]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
---
arch/arm/mach-orion5x/pci.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 76951bfbacf5..f47668530d5e 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -200,13 +200,13 @@ static int __init pcie_setup(struct pci_sys_data *sys)
/*
* PCI_MODE bits
*/
-#define PCI_MODE_64BIT (1 << 2)
-#define PCI_MODE_PCIX ((1 << 4) | (1 << 5))
+#define PCI_MODE_64BIT BIT(2)
+#define PCI_MODE_PCIX (BIT(4) | BIT(5))
/*
* PCI_CMD bits
*/
-#define PCI_CMD_HOST_REORDER (1 << 29)
+#define PCI_CMD_HOST_REORDER BIT(29)
/*
* PCI_P2P_CONF bits
@@ -223,7 +223,7 @@ static int __init pcie_setup(struct pci_sys_data *sys)
#define PCI_CONF_FUNC(func) (((func) & 0x3) << 8)
#define PCI_CONF_DEV(dev) (((dev) & 0x1f) << 11)
#define PCI_CONF_BUS(bus) (((bus) & 0xff) << 16)
-#define PCI_CONF_ADDR_EN (1 << 31)
+#define PCI_CONF_ADDR_EN BIT(31)
/*
* Internal configuration space
--
2.11.0
^ permalink raw reply related
* [PATCH V2 11/15] ARM: pxa: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-pxa/irq.c:117]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/mach-pxa/irq.c:131]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-pxa/irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 74efc3ab595f..cbbb5cfecb60 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -35,9 +35,9 @@
#define IPR(i) (((i) < 32) ? (0x01c + ((i) << 2)) : \
((i) < 64) ? (0x0b0 + (((i) - 32) << 2)) : \
(0x144 + (((i) - 64) << 2)))
-#define ICHP_VAL_IRQ (1 << 31)
+#define ICHP_VAL_IRQ BIT(31)
#define ICHP_IRQ(i) (((i) >> 16) & 0x7fff)
-#define IPR_VALID (1 << 31)
+#define IPR_VALID BIT(31)
#define MAX_INTERNAL_IRQS 128
--
2.11.0
^ permalink raw reply related
* [PATCH V2 12/15] ARM: vexpress: cleanup cppcheck shifting error
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mach-vexpress/spc.c:366]: (error) Shifting signed 32-bit value
by 31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mach-vexpress/spc.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
index 0f5381d13494..425ce633667a 100644
--- a/arch/arm/mach-vexpress/spc.c
+++ b/arch/arm/mach-vexpress/spc.c
@@ -57,8 +57,8 @@
/* SPC CPU/cluster reset statue */
#define STANDBYWFI_STAT 0x3c
-#define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu))
-#define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu)))
+#define STANDBYWFI_STAT_A15_CPU_MASK(cpu) BIT((cpu))
+#define STANDBYWFI_STAT_A7_CPU_MASK(cpu) BIT((3 + (cpu)))
/* SPC system config interface registers */
#define SYSCFG_WDATA 0x70
@@ -69,7 +69,7 @@
#define A7_PERFVAL_BASE 0xC30
/* Config interface control bits */
-#define SYSCFG_START (1 << 31)
+#define SYSCFG_START BIT(31)
#define SYSCFG_SCC (6 << 20)
#define SYSCFG_STAT (14 << 20)
@@ -90,8 +90,8 @@
#define CA15_DVFS 0
#define CA7_DVFS 1
#define SPC_SYS_CFG 2
-#define STAT_COMPLETE(type) ((1 << 0) << (type << 2))
-#define STAT_ERR(type) ((1 << 1) << (type << 2))
+#define STAT_COMPLETE(type) (BIT(0) << (type << 2))
+#define STAT_ERR(type) (BIT(1) << (type << 2))
#define RESPONSE_MASK(type) (STAT_COMPLETE(type) | STAT_ERR(type))
struct ve_spc_opp {
@@ -162,7 +162,7 @@ void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set)
if (cluster >= MAX_CLUSTERS)
return;
- mask = 1 << cpu;
+ mask = BIT(cpu);
if (!cluster_is_a15(cluster))
mask <<= 4;
--
2.11.0
^ permalink raw reply related
* [PATCH V2 13/15] ARM: mm: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/mm/alignment.c:875]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/mm/fault.c:556]: (error) Shifting signed 32-bit value by 31
bits is undefined behaviour
[arch/arm/mm/fault.c:585]: (error) Shifting signed 32-bit value by 31
bits is undefined behaviour
[arch/arm/mm/fault.c:219]: (error) Shifting signed 32-bit value by 31
bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/mm/fault.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mm/fault.h b/arch/arm/mm/fault.h
index c063708fa503..8a706cb7f21d 100644
--- a/arch/arm/mm/fault.h
+++ b/arch/arm/mm/fault.h
@@ -5,9 +5,9 @@
/*
* Fault status register encodings. We steal bit 31 for our own purposes.
*/
-#define FSR_LNX_PF (1 << 31)
-#define FSR_WRITE (1 << 11)
-#define FSR_FS4 (1 << 10)
+#define FSR_LNX_PF BIT(31)
+#define FSR_WRITE BIT(11)
+#define FSR_FS4 BIT(10)
#define FSR_FS3_0 (15)
#define FSR_FS5_0 (0x3f)
--
2.11.0
^ permalink raw reply related
* [PATCH V2 14/15] ARM: bpf: cleanup cppcheck shifting error
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/net/bpf_jit_32.c:618]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/net/bpf_jit_32.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index adff54c312bf..4e8ad26305ca 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -612,7 +612,7 @@ static inline void emit_a32_mov_se_i64(const bool is64, const s8 dst[],
const u32 val, struct jit_ctx *ctx) {
u64 val64 = val;
- if (is64 && (val & (1<<31)))
+ if (is64 && (val & (BIT(31))))
val64 |= 0xffffffff00000000ULL;
emit_a32_mov_i64(dst, val64, ctx);
}
--
2.11.0
^ permalink raw reply related
* [PATCH V2 15/15] ARM: vfp: cleanup cppcheck shifting errors
From: Phong Tran @ 2019-06-24 13:51 UTC (permalink / raw)
To: tranmanphong
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
[arch/arm/vfp/vfpdouble.c:397]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/vfp/vfpdouble.c:407]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/vfp/vfpmodule.c:263]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/vfp/vfpmodule.c:264]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/vfp/vfpsingle.c:441]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
[arch/arm/vfp/vfpsingle.c:451]: (error) Shifting signed 32-bit value by
31 bits is undefined behaviour
Signed-off-by: Phong Tran <tranmanphong@gmail.com>
---
arch/arm/vfp/vfpinstr.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h
index 38dc154e39ff..8951637c58ff 100644
--- a/arch/arm/vfp/vfpinstr.h
+++ b/arch/arm/vfp/vfpinstr.h
@@ -57,10 +57,10 @@
#define vfp_single(inst) (((inst) & 0x0000f00) == 0xa00)
-#define FPSCR_N (1 << 31)
-#define FPSCR_Z (1 << 30)
-#define FPSCR_C (1 << 29)
-#define FPSCR_V (1 << 28)
+#define FPSCR_N BIT(31)
+#define FPSCR_Z BIT(30)
+#define FPSCR_C BIT(29)
+#define FPSCR_V BIT(28)
/*
* Since we aren't building with -mfpu=vfp, we need to code
--
2.11.0
^ permalink raw reply related
* Re: [PATCH bpf] bpf: fix NULL deref in btf_type_is_resolve_source_only
From: Daniel Borkmann @ 2019-06-24 13:54 UTC (permalink / raw)
To: Stanislav Fomichev, netdev, bpf; +Cc: davem, ast, syzbot
In-Reply-To: <20190619190105.261533-1-sdf@google.com>
On 06/19/2019 09:01 PM, Stanislav Fomichev wrote:
> Commit 1dc92851849c ("bpf: kernel side support for BTF Var and DataSec")
> added invocations of btf_type_is_resolve_source_only before
> btf_type_nosize_or_null which checks for the NULL pointer.
> Swap the order of btf_type_nosize_or_null and
> btf_type_is_resolve_source_only to make sure the do the NULL pointer
> check first.
>
> Fixes: 1dc92851849c ("bpf: kernel side support for BTF Var and DataSec")
> Reported-by: syzbot <syzkaller@googlegroups.com>
> Signed-off-by: Stanislav Fomichev <sdf@google.com>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH V2 10/15] ARM: orion5x: cleanup cppcheck shifting errors
From: Andrew Lunn @ 2019-06-24 13:54 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, ast,
bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg, gregkh,
gregory.clement, haojian.zhuang, hsweeten, illusionist.neo, info,
jason, jolsa, kafai, kernel, kgene, krzk, kstewart,
linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, linux, liviu.dudau, lkundrak,
lorenzo.pieralisi, mark.rutland, mingo, namhyung, netdev, nsekhar,
peterz, robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-11-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:51:00PM +0700, Phong Tran wrote:
> [arch/arm/mach-orion5x/pci.c:281]: (error) Shifting signed 32-bit value
> by 31 bits is undefined behaviour
> [arch/arm/mach-orion5x/pci.c:305]: (error) Shifting signed 32-bit value
> by 31 bits is undefined behaviour
>
> Signed-off-by: Phong Tran <tranmanphong@gmail.com>
> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Thanks for swapping to the BIT macro.
Andrew
^ permalink raw reply
* Re: [PATCH V2 12/15] ARM: vexpress: cleanup cppcheck shifting error
From: Russell King - ARM Linux admin @ 2019-06-24 13:57 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, liviu.dudau, lkundrak, lorenzo.pieralisi,
mark.rutland, mingo, namhyung, netdev, nsekhar, peterz,
robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-13-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:51:02PM +0700, Phong Tran wrote:
> [arch/arm/mach-vexpress/spc.c:366]: (error) Shifting signed 32-bit value
> by 31 bits is undefined behaviour
>
> Signed-off-by: Phong Tran <tranmanphong@gmail.com>
> ---
> arch/arm/mach-vexpress/spc.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c
> index 0f5381d13494..425ce633667a 100644
> --- a/arch/arm/mach-vexpress/spc.c
> +++ b/arch/arm/mach-vexpress/spc.c
> @@ -57,8 +57,8 @@
>
> /* SPC CPU/cluster reset statue */
> #define STANDBYWFI_STAT 0x3c
> -#define STANDBYWFI_STAT_A15_CPU_MASK(cpu) (1 << (cpu))
> -#define STANDBYWFI_STAT_A7_CPU_MASK(cpu) (1 << (3 + (cpu)))
> +#define STANDBYWFI_STAT_A15_CPU_MASK(cpu) BIT((cpu))
> +#define STANDBYWFI_STAT_A7_CPU_MASK(cpu) BIT((3 + (cpu)))
I guess you did this using a script, however, in the above two cases,
you don't need the extra parens - it was necessary in the original
though.
>
> /* SPC system config interface registers */
> #define SYSCFG_WDATA 0x70
> @@ -69,7 +69,7 @@
> #define A7_PERFVAL_BASE 0xC30
>
> /* Config interface control bits */
> -#define SYSCFG_START (1 << 31)
> +#define SYSCFG_START BIT(31)
> #define SYSCFG_SCC (6 << 20)
> #define SYSCFG_STAT (14 << 20)
>
> @@ -90,8 +90,8 @@
> #define CA15_DVFS 0
> #define CA7_DVFS 1
> #define SPC_SYS_CFG 2
> -#define STAT_COMPLETE(type) ((1 << 0) << (type << 2))
> -#define STAT_ERR(type) ((1 << 1) << (type << 2))
> +#define STAT_COMPLETE(type) (BIT(0) << (type << 2))
> +#define STAT_ERR(type) (BIT(1) << (type << 2))
> #define RESPONSE_MASK(type) (STAT_COMPLETE(type) | STAT_ERR(type))
>
> struct ve_spc_opp {
> @@ -162,7 +162,7 @@ void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set)
> if (cluster >= MAX_CLUSTERS)
> return;
>
> - mask = 1 << cpu;
> + mask = BIT(cpu);
>
> if (!cluster_is_a15(cluster))
> mask <<= 4;
> --
> 2.11.0
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH V2 04/15] ARM: exynos: cleanup cppcheck shifting error
From: Russell King - ARM Linux admin @ 2019-06-24 13:58 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, liviu.dudau, lkundrak, lorenzo.pieralisi,
mark.rutland, mingo, namhyung, netdev, nsekhar, peterz,
robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-5-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:50:54PM +0700, Phong Tran wrote:
> [arch/arm/mach-exynos/suspend.c:288]: (error) Shifting signed 32-bit
> value by 31 bits is undefined behaviour
>
> Signed-off-by: Phong Tran <tranmanphong@gmail.com>
> ---
> arch/arm/mach-exynos/suspend.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
> index be122af0de8f..b6a73dc5bde4 100644
> --- a/arch/arm/mach-exynos/suspend.c
> +++ b/arch/arm/mach-exynos/suspend.c
> @@ -285,7 +285,7 @@ static void exynos_pm_set_wakeup_mask(void)
> * Set wake-up mask registers
> * EXYNOS_EINT_WAKEUP_MASK is set by pinctrl driver in late suspend.
> */
> - pmu_raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
> + pmu_raw_writel(exynos_irqwake_intmask & ~(BIT(31)), S5P_WAKEUP_MASK);
Parens around BIT() are no longer required.
> }
>
> static void exynos_pm_enter_sleep_mode(void)
> --
> 2.11.0
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH V2 08/15] ARM: mmp: cleanup cppcheck shifting errors
From: Russell King - ARM Linux admin @ 2019-06-24 13:59 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, liviu.dudau, lkundrak, lorenzo.pieralisi,
mark.rutland, mingo, namhyung, netdev, nsekhar, peterz,
robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-9-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:50:58PM +0700, Phong Tran wrote:
> #define MPMU_PLL2_CTRL1 MPMU_REG(0x0414)
> #define MPMU_CGR_PJ MPMU_REG(0x1024)
> #define MPMU_WUCRM_PJ MPMU_REG(0x104c)
> -#define MPMU_WUCRM_PJ_WAKEUP(x) (1 << (x))
> -#define MPMU_WUCRM_PJ_RTC_ALARM (1 << 17)
> +#define MPMU_WUCRM_PJ_WAKEUP(x) BIT((x))
Extra parens not required.
> +#define MPMU_AWUCRM_WAKEUP(x) BIT(((x) & 0x7))
Ditto.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH V2 14/15] ARM: bpf: cleanup cppcheck shifting error
From: Russell King - ARM Linux admin @ 2019-06-24 14:00 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, liviu.dudau, lkundrak, lorenzo.pieralisi,
mark.rutland, mingo, namhyung, netdev, nsekhar, peterz,
robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-15-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:51:04PM +0700, Phong Tran wrote:
> [arch/arm/net/bpf_jit_32.c:618]: (error) Shifting signed 32-bit value by
> 31 bits is undefined behaviour
>
> Signed-off-by: Phong Tran <tranmanphong@gmail.com>
> ---
> arch/arm/net/bpf_jit_32.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
> index adff54c312bf..4e8ad26305ca 100644
> --- a/arch/arm/net/bpf_jit_32.c
> +++ b/arch/arm/net/bpf_jit_32.c
> @@ -612,7 +612,7 @@ static inline void emit_a32_mov_se_i64(const bool is64, const s8 dst[],
> const u32 val, struct jit_ctx *ctx) {
> u64 val64 = val;
>
> - if (is64 && (val & (1<<31)))
> + if (is64 && (val & (BIT(31))))
Extra parens are not necessary, please remove.
> val64 |= 0xffffffff00000000ULL;
> emit_a32_mov_i64(dst, val64, ctx);
> }
> --
> 2.11.0
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH 2/3] module: Fix up module_notifier return values.
From: Mathieu Desnoyers @ 2019-06-24 14:01 UTC (permalink / raw)
To: Peter Zijlstra, Frank Ch. Eigler
Cc: Jessica Yu, linux-kernel, Josh Poimboeuf, jikos, mbenes,
Petr Mladek, Alexei Starovoitov, Daniel Borkmann, Andrew Morton,
Robert Richter, rostedt, Ingo Molnar, Martin KaFai Lau, Song Liu,
Yonghong Song, paulmck, Joel Fernandes, Google, Ard Biesheuvel,
Thomas Gleixner, oprofile-list, netdev, bpf
In-Reply-To: <20190624092109.805742823@infradead.org>
----- On Jun 24, 2019, at 5:18 AM, Peter Zijlstra peterz@infradead.org wrote:
> While auditing all module notifiers I noticed a whole bunch of fail
> wrt the return value. Notifiers have a 'special' return semantics.
>
> Cc: Robert Richter <rric@kernel.org>
> Cc: Steven Rostedt <rostedt@goodmis.org>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: Alexei Starovoitov <ast@kernel.org>
> Cc: Daniel Borkmann <daniel@iogearbox.net>
> Cc: Martin KaFai Lau <kafai@fb.com>
> Cc: Song Liu <songliubraving@fb.com>
> Cc: Yonghong Song <yhs@fb.com>
> Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
> Cc: "Paul E. McKenney" <paulmck@linux.ibm.com>
> Cc: "Joel Fernandes (Google)" <joel@joelfernandes.org>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: oprofile-list@lists.sf.net
> Cc: linux-kernel@vger.kernel.org
> Cc: netdev@vger.kernel.org
> Cc: bpf@vger.kernel.org
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Thanks Peter for looking into this, especially considering your
endless love for kernel modules! ;)
It's not directly related to your changes, but I notice that
kernel/trace/trace_printk.c:hold_module_trace_bprintk_format()
appears to leak memory. Am I missing something ?
With respect to your changes:
Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
I have a similar erroneous module notifier return value pattern
in lttng-modules as well. I'll go fix it right away. CCing
Frank Eigler from SystemTAP which AFAIK use a copy of
lttng-tracepoint.c in their project, which should be fixed
as well. I'm pasting the lttng-modules fix below.
Thanks!
Mathieu
--
commit 5eac9d146a7d947f0f314c4f7103c92cbccaeaf3
Author: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Date: Mon Jun 24 09:43:45 2019 -0400
Fix: lttng-tracepoint module notifier should return NOTIFY_OK
Module notifiers should return NOTIFY_OK on success rather than the
value 0. The return value 0 does not seem to have any ill side-effects
in the notifier chain caller, but it is preferable to respect the API
requirements in case this changes in the future.
Notifiers can encapsulate a negative errno value with
notifier_from_errno(), but this is not needed by the LTTng tracepoint
notifier.
The approach taken in this notifier is to just print a console warning
on error, because tracing failure should not prevent loading a module.
So we definitely do not want to stop notifier iteration. Returning
an error without stopping iteration is not really that useful, because
only the return value of the last callback is returned to notifier chain
caller.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
diff --git a/lttng-tracepoint.c b/lttng-tracepoint.c
index bbb2c7a4..8298b397 100644
--- a/lttng-tracepoint.c
+++ b/lttng-tracepoint.c
@@ -256,7 +256,7 @@ int lttng_tracepoint_coming(struct tp_module *tp_mod)
}
}
mutex_unlock(<tng_tracepoint_mutex);
- return 0;
+ return NOTIFY_OK;
}
static
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
^ permalink raw reply related
* [PATCH net v2 2/2] ipv6: fix neighbour resolution with raw socket
From: Nicolas Dichtel @ 2019-06-24 14:01 UTC (permalink / raw)
To: davem; +Cc: netdev, ndesaulniers, Nicolas Dichtel
In-Reply-To: <20190624140109.14775-1-nicolas.dichtel@6wind.com>
The scenario is the following: the user uses a raw socket to send an ipv6
packet, destinated to a not-connected network, and specify a connected nh.
Here is the corresponding python script to reproduce this scenario:
import socket
IPPROTO_RAW = 255
send_s = socket.socket(socket.AF_INET6, socket.SOCK_RAW, IPPROTO_RAW)
# scapy
# p = IPv6(src='fd00:100::1', dst='fd00:200::fa')/ICMPv6EchoRequest()
# str(p)
req = b'`\x00\x00\x00\x00\x08:@\xfd\x00\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\xfd\x00\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xfa\x80\x00\x81\xc0\x00\x00\x00\x00'
send_s.sendto(req, ('fd00:175::2', 0, 0, 0))
fd00:175::/64 is a connected route and fd00:200::fa is not a connected
host.
With this scenario, the kernel starts by sending a NS to resolve
fd00:175::2. When it receives the NA, it flushes its queue and try to send
the initial packet. But instead of sending it, it sends another NS to
resolve fd00:200::fa, which obvioulsy fails, thus the packet is dropped. If
the user sends again the packet, it now uses the right nh (fd00:175::2).
The problem is that ip6_dst_lookup_neigh() uses the rt6i_gateway, which is
:: because the associated route is a connected route, thus it uses the dst
addr of the packet. Let's use rt6_nexthop() to choose the right nh.
Signed-off-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
---
net/ipv6/route.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/net/ipv6/route.c b/net/ipv6/route.c
index 11ad62effd56..b6449bc03f11 100644
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -218,7 +218,8 @@ static struct neighbour *ip6_dst_neigh_lookup(const struct dst_entry *dst,
{
const struct rt6_info *rt = container_of(dst, struct rt6_info, dst);
- return ip6_neigh_lookup(&rt->rt6i_gateway, dst->dev, skb, daddr);
+ return ip6_neigh_lookup(rt6_nexthop(rt, &in6addr_any),
+ dst->dev, skb, daddr);
}
static void ip6_confirm_neigh(const struct dst_entry *dst, const void *daddr)
--
2.21.0
^ permalink raw reply related
* [PATCH net v2 0/2] ipv6: fix neighbour resolution with raw socket
From: Nicolas Dichtel @ 2019-06-24 14:01 UTC (permalink / raw)
To: davem; +Cc: netdev, ndesaulniers
In-Reply-To: <20190622.170816.1879839685931480272.davem@davemloft.net>
The first patch prepares the fix, it constify rt6_nexthop().
The detail of the bug is explained in the second patch.
v1 -> v2:
- fix compilation warnings
- split the initial patch
drivers/net/vrf.c | 2 +-
include/net/ip6_route.h | 4 ++--
net/bluetooth/6lowpan.c | 4 ++--
net/ipv6/ip6_output.c | 2 +-
net/ipv6/route.c | 3 ++-
net/netfilter/nf_flow_table_ip.c | 2 +-
6 files changed, 9 insertions(+), 8 deletions(-)
Comments are welcomed,
Regards,
Nicolas
^ permalink raw reply
* [PATCH net v2 1/2] ipv6: constify rt6_nexthop()
From: Nicolas Dichtel @ 2019-06-24 14:01 UTC (permalink / raw)
To: davem; +Cc: netdev, ndesaulniers, Nicolas Dichtel
In-Reply-To: <20190624140109.14775-1-nicolas.dichtel@6wind.com>
There is no functional change in this patch, it only prepares the next one.
rt6_nexthop() will be used by ip6_dst_lookup_neigh(), which uses const
variables.
Signed-off-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
---
drivers/net/vrf.c | 2 +-
include/net/ip6_route.h | 4 ++--
net/bluetooth/6lowpan.c | 4 ++--
net/ipv6/ip6_output.c | 2 +-
net/netfilter/nf_flow_table_ip.c | 2 +-
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/vrf.c b/drivers/net/vrf.c
index 11b9525dff27..311b0cc6eb98 100644
--- a/drivers/net/vrf.c
+++ b/drivers/net/vrf.c
@@ -350,8 +350,8 @@ static int vrf_finish_output6(struct net *net, struct sock *sk,
{
struct dst_entry *dst = skb_dst(skb);
struct net_device *dev = dst->dev;
+ const struct in6_addr *nexthop;
struct neighbour *neigh;
- struct in6_addr *nexthop;
int ret;
nf_reset(skb);
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index 4790beaa86e0..ee7405e759ba 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -262,8 +262,8 @@ static inline bool ip6_sk_ignore_df(const struct sock *sk)
inet6_sk(sk)->pmtudisc == IPV6_PMTUDISC_OMIT;
}
-static inline struct in6_addr *rt6_nexthop(struct rt6_info *rt,
- struct in6_addr *daddr)
+static inline const struct in6_addr *rt6_nexthop(const struct rt6_info *rt,
+ const struct in6_addr *daddr)
{
if (rt->rt6i_flags & RTF_GATEWAY)
return &rt->rt6i_gateway;
diff --git a/net/bluetooth/6lowpan.c b/net/bluetooth/6lowpan.c
index 19d27bee285e..1555b0c6f7ec 100644
--- a/net/bluetooth/6lowpan.c
+++ b/net/bluetooth/6lowpan.c
@@ -160,10 +160,10 @@ static inline struct lowpan_peer *peer_lookup_dst(struct lowpan_btle_dev *dev,
struct in6_addr *daddr,
struct sk_buff *skb)
{
- struct lowpan_peer *peer;
- struct in6_addr *nexthop;
struct rt6_info *rt = (struct rt6_info *)skb_dst(skb);
int count = atomic_read(&dev->peer_count);
+ const struct in6_addr *nexthop;
+ struct lowpan_peer *peer;
BT_DBG("peers %d addr %pI6c rt %p", count, daddr, rt);
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 834475717110..21efcd02f337 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -59,8 +59,8 @@ static int ip6_finish_output2(struct net *net, struct sock *sk, struct sk_buff *
{
struct dst_entry *dst = skb_dst(skb);
struct net_device *dev = dst->dev;
+ const struct in6_addr *nexthop;
struct neighbour *neigh;
- struct in6_addr *nexthop;
int ret;
if (ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr)) {
diff --git a/net/netfilter/nf_flow_table_ip.c b/net/netfilter/nf_flow_table_ip.c
index 241317473114..cdfc33517e85 100644
--- a/net/netfilter/nf_flow_table_ip.c
+++ b/net/netfilter/nf_flow_table_ip.c
@@ -439,9 +439,9 @@ nf_flow_offload_ipv6_hook(void *priv, struct sk_buff *skb,
struct nf_flowtable *flow_table = priv;
struct flow_offload_tuple tuple = {};
enum flow_offload_tuple_dir dir;
+ const struct in6_addr *nexthop;
struct flow_offload *flow;
struct net_device *outdev;
- struct in6_addr *nexthop;
struct ipv6hdr *ip6h;
struct rt6_info *rt;
--
2.21.0
^ permalink raw reply related
* Re: [PATCH V2 00/15] cleanup cppcheck signed shifting errors
From: Russell King - ARM Linux admin @ 2019-06-24 14:02 UTC (permalink / raw)
To: Phong Tran
Cc: acme, alexander.shishkin, alexander.sverdlin, allison, andrew,
ast, bgolaszewski, bpf, daniel, daniel, dmg, festevam, gerg,
gregkh, gregory.clement, haojian.zhuang, hsweeten,
illusionist.neo, info, jason, jolsa, kafai, kernel, kgene, krzk,
kstewart, linux-arm-kernel, linux-imx, linux-kernel, linux-omap,
linux-samsung-soc, liviu.dudau, lkundrak, lorenzo.pieralisi,
mark.rutland, mingo, namhyung, netdev, nsekhar, peterz,
robert.jarzmik, s.hauer, sebastian.hesselbarth, shawnguo,
songliubraving, sudeep.holla, swinslow, tglx, tony, will, yhs
In-Reply-To: <20190624135105.15579-1-tranmanphong@gmail.com>
On Mon, Jun 24, 2019 at 08:50:50PM +0700, Phong Tran wrote:
> There are errors with cppcheck
>
> "Shifting signed 32-bit value by 31 bits is undefined behaviour errors"
>
> This is just a mirror changing.
"mirror" ?
Apart from that and the extra unnecessary parens (which ought to be
cleaned up) this looks fine to me.
When there's too many parens next to each other, it makes reading
the expression more difficult - and that is definitely bad, so please
avoid unecessary parens where possible.
Thanks.
>
> V2: Using BIT() macro instead of (1UL << nr)
>
> Phong Tran (15):
> arm: perf: cleanup cppcheck shifting error
> ARM: davinci: cleanup cppcheck shifting errors
> ARM: ep93xx: cleanup cppcheck shifting errors
> ARM: exynos: cleanup cppcheck shifting error
> ARM: footbridge: cleanup cppcheck shifting error
> ARM: imx: cleanup cppcheck shifting errors
> ARM: ks8695: cleanup cppcheck shifting error
> ARM: mmp: cleanup cppcheck shifting errors
> ARM: omap2: cleanup cppcheck shifting error
> ARM: orion5x: cleanup cppcheck shifting errors
> ARM: pxa: cleanup cppcheck shifting errors
> ARM: vexpress: cleanup cppcheck shifting error
> ARM: mm: cleanup cppcheck shifting errors
> ARM: bpf: cleanup cppcheck shifting error
> ARM: vfp: cleanup cppcheck shifting errors
>
> arch/arm/kernel/perf_event_v7.c | 6 +-
> arch/arm/mach-davinci/ddr2.h | 6 +-
> arch/arm/mach-ep93xx/soc.h | 132 ++++++++++++++++++-------------------
> arch/arm/mach-exynos/suspend.c | 2 +-
> arch/arm/mach-footbridge/dc21285.c | 2 +-
> arch/arm/mach-imx/iomux-mx3.h | 64 +++++++++---------
> arch/arm/mach-ks8695/regs-pci.h | 4 +-
> arch/arm/mach-mmp/pm-mmp2.h | 40 +++++------
> arch/arm/mach-mmp/pm-pxa910.h | 76 ++++++++++-----------
> arch/arm/mach-omap2/powerdomain.c | 2 +-
> arch/arm/mach-orion5x/pci.c | 8 +--
> arch/arm/mach-pxa/irq.c | 4 +-
> arch/arm/mach-vexpress/spc.c | 12 ++--
> arch/arm/mm/fault.h | 6 +-
> arch/arm/net/bpf_jit_32.c | 2 +-
> arch/arm/vfp/vfpinstr.h | 8 +--
> 16 files changed, 187 insertions(+), 187 deletions(-)
>
> --
> 2.11.0
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
^ permalink raw reply
* Re: [PATCH net-next v2] hinic: implement the statistical interface of ethtool
From: David Miller @ 2019-06-24 14:19 UTC (permalink / raw)
To: xuechaojing
Cc: linux-kernel, netdev, luoshaokai, cloud.wangxiaoyun, chiqijun,
wulike1
In-Reply-To: <20190624035012.7221-1-xuechaojing@huawei.com>
From: Xue Chaojing <xuechaojing@huawei.com>
Date: Mon, 24 Jun 2019 03:50:12 +0000
> This patch implement the statistical interface of ethtool, user can use
> ethtool -S to show hinic statistics.
>
> Signed-off-by: Xue Chaojing <xuechaojing@huawei.com>
Applied.
^ permalink raw reply
* Re: [PATCH bpf] samples/bpf: xdp_redirect, correctly get dummy program id
From: Daniel Borkmann @ 2019-06-24 14:20 UTC (permalink / raw)
To: Prashant Bhole, Alexei Starovoitov; +Cc: netdev, bpf
In-Reply-To: <20190620065815.7698-1-prashantbhole.linux@gmail.com>
On 06/20/2019 08:58 AM, Prashant Bhole wrote:
> When we terminate xdp_redirect, it ends up with following message:
> "Program on iface OUT changed, not removing"
> This results in dummy prog still attached to OUT interface.
> It is because signal handler checks if the programs are the same that
> we had attached. But while fetching dummy_prog_id, current code uses
> prog_fd instead of dummy_prog_fd. This patch passes the correct fd.
>
> Fixes: 3b7a8ec2dec3 ("samples/bpf: Check the prog id before exiting")
> Signed-off-by: Prashant Bhole <prashantbhole.linux@gmail.com>
Applied, thanks!
^ permalink raw reply
* Re: [PATCH net] net/tls: fix page double free on TX cleanup
From: David Miller @ 2019-06-24 14:21 UTC (permalink / raw)
To: jakub.kicinski
Cc: netdev, oss-drivers, john.fastabend, vakul.garg, borisp,
alexei.starovoitov, dirk.vandermerwe
In-Reply-To: <20190624042658.19198-1-jakub.kicinski@netronome.com>
From: Jakub Kicinski <jakub.kicinski@netronome.com>
Date: Sun, 23 Jun 2019 21:26:58 -0700
> From: Dirk van der Merwe <dirk.vandermerwe@netronome.com>
>
> With commit 94850257cf0f ("tls: Fix tls_device handling of partial records")
> a new path was introduced to cleanup partial records during sk_proto_close.
> This path does not handle the SW KTLS tx_list cleanup.
>
> This is unnecessary though since the free_resources calls for both
> SW and offload paths will cleanup a partial record.
>
> The visible effect is the following warning, but this bug also causes
> a page double free.
...
> Fixes: 94850257cf0f ("tls: Fix tls_device handling of partial records")
> Signed-off-by: Dirk van der Merwe <dirk.vandermerwe@netronome.com>
> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Applied and queued up for -stable, thanks.
^ permalink raw reply
* Re: [PATCH bpf-next] bpftool: Add BPF_F_QUERY_EFFECTIVE support in bpftool cgroup [show|tree]
From: Daniel Borkmann @ 2019-06-24 14:22 UTC (permalink / raw)
To: Takshak Chahande, netdev; +Cc: ast, rdna, kernel-team
In-Reply-To: <20190621223311.1380295-1-ctakshak@fb.com>
On 06/22/2019 12:33 AM, Takshak Chahande wrote:
> With different bpf attach_flags available to attach bpf programs specially
> with BPF_F_ALLOW_OVERRIDE and BPF_F_ALLOW_MULTI, the list of effective
> bpf-programs available to any sub-cgroups really needs to be available for
> easy debugging.
>
> Using BPF_F_QUERY_EFFECTIVE flag, one can get the list of not only attached
> bpf-programs to a cgroup but also the inherited ones from parent cgroup.
>
> So "-e" option is introduced to use BPF_F_QUERY_EFFECTIVE query flag here to
> list all the effective bpf-programs available for execution at a specified
> cgroup.
>
> Reused modified test program test_cgroup_attach from tools/testing/selftests/bpf:
> # ./test_cgroup_attach
>
> With old bpftool (without -e option):
>
> # bpftool cgroup show /sys/fs/cgroup/cgroup-test-work-dir/cg1/
> ID AttachType AttachFlags Name
> 271 egress multi pkt_cntr_1
> 272 egress multi pkt_cntr_2
>
> Attached new program pkt_cntr_4 in cg2 gives following:
>
> # bpftool cgroup show /sys/fs/cgroup/cgroup-test-work-dir/cg1/cg2
> ID AttachType AttachFlags Name
> 273 egress override pkt_cntr_4
>
> And with new "-e" option it shows all effective programs for cg2:
>
> # bpftool -e cgroup show /sys/fs/cgroup/cgroup-test-work-dir/cg1/cg2
> ID AttachType AttachFlags Name
> 273 egress override pkt_cntr_4
> 271 egress override pkt_cntr_1
> 272 egress override pkt_cntr_2
>
> Signed-off-by: Takshak Chahande <ctakshak@fb.com>
> Acked-by: Andrey Ignatov <rdna@fb.com>
Applied, thanks!
^ permalink raw reply
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