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Tue, 18 Aug 2026 17:02:11 -0700 (PDT) X-Received: by 2002:a05:620a:2986:b0:936:9253:897a with SMTP id af79cd13be357-9371e430b4cmr101019085a.9.1787097730662; Tue, 18 Aug 2026 17:02:10 -0700 (PDT) Received: from [192.168.8.4] ([100.0.180.93]) by smtp.gmail.com with ESMTPSA id af79cd13be357-9372059ae63sm12749885a.46.2026.08.18.17.02.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2026 17:02:09 -0700 (PDT) Message-ID: <6244a95cc925d8b0f3c01ac000ca56dad246305b.camel@redhat.com> Subject: Re: [PATCH v4 0/2] drm/nouveau: NVAC (MCP79) stability: MSI rearm and a NULL crtc guard From: lyude@redhat.com To: Marek Czernohous , nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Tue, 18 Aug 2026 20:02:08 -0400 In-Reply-To: <178688574400.522643.6695278742335367229@gmail.com> References: <178688574400.522643.6695278742335367229@gmail.com> User-Agent: Evolution 3.58.3 (3.58.3-1.fc43) MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: Li-9Jxky7XNAjtEKfH5XPszYnSTXK_l1PetgeHSRJdI_1787097731 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Message-ID-Hash: 5674AJ2E2N53HC5ZYYAOMBTFL24YRKRB X-Message-ID-Hash: 5674AJ2E2N53HC5ZYYAOMBTFL24YRKRB X-MailFrom: lyude@redhat.com X-Mailman-Rule-Hits: member-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address CC: linux-kernel@vger.kernel.org, Danilo Krummrich , Simona Vetter X-Mailman-Version: 3.3.8 Precedence: list List-Id: Nouveau development list Archived-At: Archived-At: List-Archive: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: First patch looks fine, I sent a new patch series to address the issue pointed out by patch 2, as it was a bit of a bandaid around a larger issue. Will push the first patch in just a moment On Sun, 2026-08-16 at 15:09 +0200, Marek Czernohous wrote: > From: Marek Czernohous >=20 > This is v4 of two NVAC (MCP79) stability fixes.=C2=A0 v3 went out on 11 > June > and has had no replies: >=20 > =C2=A0 > https://lore.kernel.org/all/20260611124535.527275-1-mczernohous@gmail.com= / >=20 > Nothing in either patch changed.=C2=A0 Same diffs, same reasoning, same > trailers.=C2=A0 The reason this is a v4 and not a ping is that 2/2 no > longer > applies to mainline, so a ping would have pointed at a series nobody > can > test. >=20 > What moved was somebody else's context, not this code. > Commit 5164f7e7ff8e ("drm: Rename struct drm_atomic_state to > drm_atomic_commit") changed the callback signature, so > nv50_sor_atomic_disable() now takes a struct drm_atomic_commit > *state. > 2/2 is rebased onto that by hand.=C2=A0 1/2 applies unchanged and is > byte-identical to v3. >=20 > Both bugs are still live in c21bb4193868.=C2=A0 dispnv50/disp.c:1568 stil= l > does nv50_head(nv_encoder->crtc) with no NULL check, and there is no > guard anywhere in the function.=C2=A0 Immediately below it, :1570 takes > nv50_outp_get_old_connector() and :1572 dereferences the result > without > checking it. >=20 > 1/2 drm/nouveau/pci: use config-space MSI rearm on MCP79/MCP7A (NVAC) >=20 > =C2=A0=C2=A0=C2=A0 NVAC re-arms MSI through the MMIO mirror of PCI config= space, > which > =C2=A0=C2=A0=C2=A0 is unreliable on this IGP.=C2=A0 A missed re-arm leave= s the interrupt > =C2=A0=C2=A0=C2=A0 line dead, submission times out and the GPU looks hung= until > =C2=A0=C2=A0=C2=A0 reboot.=C2=A0 Give NVAC its own pci func that re-arms = through real > =C2=A0=C2=A0=C2=A0 config space, the way commit 5112abc6a433 ("drm/nouvea= u/pci/g92: > =C2=A0=C2=A0=C2=A0 Fix rearm") already did for g92.=C2=A0 Only NVAC is sw= itched, because > =C2=A0=C2=A0=C2=A0 that is the part this was validated on. >=20 > 2/2 drm/nouveau/kms: guard NULL crtc in nv50_sor_atomic_disable() >=20 > =C2=A0=C2=A0=C2=A0 Restore the NULL check that > =C2=A0=C2=A0=C2=A0 commit f575f2bdb6c3 ("drm/nouveau/kms/nv50-: Remove > =C2=A0=C2=A0=C2=A0 (nv_encoder->crtc) checks in ->disable callbacks") rem= oved, as a > =C2=A0=C2=A0=C2=A0 drm_WARN_ON_ONCE() rather than a silent return, since = a NULL crtc > =C2=A0=C2=A0=C2=A0 here is a state-tracking inconsistency worth seeing.= =C2=A0 The guard > is > =C2=A0=C2=A0=C2=A0 hoisted above the backlight teardown so the old connec= tor is only > =C2=A0=C2=A0=C2=A0 used after it has been checked; without that the oops = would just > =C2=A0=C2=A0=C2=A0 move a few lines down. >=20 > Testing.=C2=A0 The MSI change continues to run here on the Mac mini as a > daily driver, and Fab Stz confirmed it independently on an iMac9,1. > Both Tested-by tags are carried over unchanged from v3; the > diffs they were given are the diffs sent here, apart from the > mechanical > rebase of 2/2.=C2=A0 For v4 I rebuilt 2/2 with > CONFIG_DRM_NOUVEAU_BACKLIGHT > set to y and to n, because the patch splits the #ifdef block in two > and > that is where a change of this shape tends to break. >=20 > If something about the shape of the series is what is holding it up, > I > would rather hear that than keep rebasing it. >=20 > Marek Czernohous (2): > =C2=A0 drm/nouveau/pci: use config-space MSI rearm on MCP79/MCP7A (NVAC) > =C2=A0 drm/nouveau/kms: guard NULL crtc in nv50_sor_atomic_disable() >=20 > =C2=A0drivers/gpu/drm/nouveau/dispnv50/disp.c=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 | 30 +++++++++++++--- > =C2=A0.../gpu/drm/nouveau/include/nvkm/subdev/pci.h |=C2=A0 1 + > =C2=A0.../gpu/drm/nouveau/nvkm/engine/device/base.c |=C2=A0 2 +- > =C2=A0.../gpu/drm/nouveau/nvkm/subdev/pci/Kbuild=C2=A0=C2=A0=C2=A0 |=C2= =A0 1 + > =C2=A0.../gpu/drm/nouveau/nvkm/subdev/pci/mcp79.c=C2=A0=C2=A0 | 35 > +++++++++++++++++++ > =C2=A05 files changed, 63 insertions(+), 6 deletions(-) > =C2=A0create mode 100644 drivers/gpu/drm/nouveau/nvkm/subdev/pci/mcp79.c >=20 >=20 > base-commit: c21bb4193868a8de71fc4693fa741e195fdf5d86