From: John Hubbard <jhubbard@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
Alexandre Courbot <acourbot@nvidia.com>
Cc: "Timur Tabi" <ttabi@nvidia.com>,
"Alistair Popple" <apopple@nvidia.com>,
"Eliot Courtney" <ecourtney@nvidia.com>,
"Shashank Sharma" <shashanks@nvidia.com>,
"Zhi Wang" <zhiw@nvidia.com>, "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Alex Gaynor" <alex.gaynor@gmail.com>,
"Boqun Feng" <boqun.feng@gmail.com>,
"Gary Guo" <gary@garyguo.net>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Trevor Gross" <tmgross@umich.edu>,
nova-gpu@lists.linux.dev, LKML <linux-kernel@vger.kernel.org>,
"John Hubbard" <jhubbard@nvidia.com>
Subject: [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table
Date: Wed, 10 Jun 2026 16:41:28 -0700 [thread overview]
Message-ID: <20260610234128.547952-1-jhubbard@nvidia.com> (raw)
The Chipset enum lists GPUs in chip-ID order, but FSP capability does
not follow that order. Hopper and Blackwell boot the GSP via FSP, while
Ada, whose chip IDs fall numerically between Hopper and Blackwell, uses
the older SEC2 booter path instead. Add a comment so the table ordering
does not suggest that everything past Hopper uses FSP.
Suggested-by: Timur Tabi <ttabi@nvidia.com>
Signed-off-by: John Hubbard <jhubbard@nvidia.com>
---
Hi,
As mentioned here [1], this is a follow up patch.
[1] https://lore.kernel.org/1022c9e9-7d90-498a-b420-64b945f93c74@nvidia.com
thanks,
John Hubbard
drivers/gpu/nova-core/gpu.rs | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index b3c91731db45..b9451d0d5e15 100644
--- a/drivers/gpu/nova-core/gpu.rs
+++ b/drivers/gpu/nova-core/gpu.rs
@@ -91,6 +91,10 @@ fn try_from(value: u32) -> Result<Self, Self::Error> {
GA104 = 0x174,
GA106 = 0x176,
GA107 = 0x177,
+ // Chipsets are listed in chip-ID order, which does not track FSP
+ // capability. Hopper (GH100) and Blackwell (GB10x/GB20x) boot the GSP
+ // via FSP, but Ada (AD10x), whose chip IDs fall between them, does not.
+ // See Chipset::uses_fsp().
// Hopper
GH100 = 0x180,
// Ada
@@ -137,8 +141,8 @@ pub(crate) const fn needs_fwsec_bootloader(self) -> bool {
matches!(self.arch(), Architecture::Turing) || matches!(self, Self::GA100)
}
- /// Returns `true` if this chipset boots via FSP (Hopper and later), which requires the FMC
- /// firmware image.
+ /// Returns `true` if this chipset boots via FSP (Hopper and Blackwell, but not Ada), which
+ /// requires the FMC firmware image.
pub(crate) const fn uses_fsp(self) -> bool {
matches!(
self.arch(),
base-commit: 550dc7536644db2d67c6f8cf525bba682fba08d9
--
2.54.0
next reply other threads:[~2026-06-10 23:41 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-10 23:41 John Hubbard [this message]
2026-06-11 3:00 ` [PATCH] gpu: nova-core: clarify FSP ordering in the chipset table Timur Tabi
2026-06-11 20:19 ` John Hubbard
2026-06-11 20:24 ` Timur Tabi
2026-06-11 20:28 ` John Hubbard
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