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From: Zhi Wang <zhiw@nvidia.com>
To: <dakr@kernel.org>, <acourbot@nvidia.com>
Cc: <airlied@gmail.com>, <simona@ffwll.ch>, <ojeda@kernel.org>,
	<alex.gaynor@gmail.com>, <boqun.feng@gmail.com>,
	<gary@garyguo.net>, <bjorn3_gh@protonmail.com>,
	<lossin@kernel.org>, <a.hindborg@kernel.org>,
	<aliceryhl@google.com>, <tmgross@umich.edu>,
	<jhubbard@nvidia.com>, <ecourtney@nvidia.com>,
	<joelagnelf@nvidia.com>, <apopple@nvidia.com>, <cjia@nvidia.com>,
	<smitra@nvidia.com>, <kjaju@nvidia.com>, <alkumar@nvidia.com>,
	<ankita@nvidia.com>, <aniketa@nvidia.com>, <kwankhede@nvidia.com>,
	<targupta@nvidia.com>, <nova-gpu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <zhiwang@kernel.org>,
	Zhi Wang <zhiw@nvidia.com>
Subject: [PATCH v3 7/8] gpu: nova-core: set RMSetSriovMode for vGPU
Date: Wed, 1 Jul 2026 09:26:21 +0300	[thread overview]
Message-ID: <20260701062622.3499033-8-zhiw@nvidia.com> (raw)
In-Reply-To: <20260701062622.3499033-1-zhiw@nvidia.com>

The GSP registry setup needs to advertise SR-IOV mode when nova-core boots
GSP for an enabled vGPU configuration. Without the registry entry, GSP-RM
is not told to initialize in the mode required by NVIDIA vGPU.

Append RMSetSriovMode to the SetRegistry command when the vGPU state
detected before GSP boot is enabled. Keep the existing registry entries
unchanged for non-vGPU boots.

Cc: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Zhi Wang <zhiw@nvidia.com>
---
 drivers/gpu/nova-core/gsp/boot.rs     |  2 +-
 drivers/gpu/nova-core/gsp/commands.rs | 16 ++++++++++++++--
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs
index 139cedacffd2..c0513ab7f4c1 100644
--- a/drivers/gpu/nova-core/gsp/boot.rs
+++ b/drivers/gpu/nova-core/gsp/boot.rs
@@ -102,7 +102,7 @@ pub(crate) fn boot(
         self.cmdq
             .send_command_no_wait(bar, commands::SetSystemInfo::new(pdev, chipset))?;
         self.cmdq
-            .send_command_no_wait(bar, commands::SetRegistry::new()?)?;
+            .send_command_no_wait(bar, commands::SetRegistry::new(ctx.vgpu.state())?)?;
 
         hal.post_boot(&self, ctx, &gsp_fw)?;
 
diff --git a/drivers/gpu/nova-core/gsp/commands.rs b/drivers/gpu/nova-core/gsp/commands.rs
index dfb9f04e284d..07712957a5a9 100644
--- a/drivers/gpu/nova-core/gsp/commands.rs
+++ b/drivers/gpu/nova-core/gsp/commands.rs
@@ -34,6 +34,7 @@
         },
     },
     sbuffer::SBufferIter,
+    vgpu::VgpuState, //
 };
 
 /// The `GspSetSystemInfo` command.
@@ -73,8 +74,8 @@ pub(crate) struct SetRegistry {
 impl SetRegistry {
     // For now we hard-code the registry entries. Future work will allow others to
     // be added as module parameters.
-    /// Creates a new `SetRegistry` command, using a set of hardcoded entries.
-    pub(crate) fn new() -> Result<Self> {
+    /// Creates a new `SetRegistry` command.
+    pub(crate) fn new(vgpu_state: VgpuState) -> Result<Self> {
         let mut entries = KVec::new();
 
         // RMSecBusResetEnable - enables PCI secondary bus reset
@@ -106,6 +107,17 @@ pub(crate) fn new() -> Result<Self> {
             GFP_KERNEL,
         )?;
 
+        if matches!(vgpu_state, VgpuState::Enabled { .. }) {
+            // RMSetSriovMode - required when vGPU is enabled.
+            entries.push(
+                RegistryEntry {
+                    key: "RMSetSriovMode",
+                    value: 1,
+                },
+                GFP_KERNEL,
+            )?;
+        }
+
         Ok(Self { entries })
     }
 }
-- 
2.51.0


  parent reply	other threads:[~2026-07-01  6:28 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-01  6:26 [PATCH v3 0/8] gpu: nova-core: boot GSP with vGPU enabled Zhi Wang
2026-07-01  6:26 ` [PATCH v3 1/8] PCI/IOV: Return unsigned int from pci_sriov_get_totalvfs() Zhi Wang
2026-07-08 13:54   ` Alexandre Courbot
2026-07-01  6:26 ` [PATCH v3 2/8] rust: pci: add sriov_get_totalvfs() helper Zhi Wang
2026-07-08 14:03   ` Alexandre Courbot
2026-07-08 14:13     ` Alexandre Courbot
2026-07-09 14:24       ` Zhi Wang
2026-07-08 14:41     ` Alexandre Courbot
2026-07-09 14:25       ` Zhi Wang
2026-07-01  6:26 ` [PATCH v3 3/8] gpu: nova-core: fsp: rename FSP response header type Zhi Wang
2026-07-08 13:37   ` Alexandre Courbot
2026-07-01  6:26 ` [PATCH v3 4/8] gpu: nova-core: read vGPU mode from FSP via PRC protocol Zhi Wang
2026-07-01  6:26 ` [PATCH v3 5/8] gpu: nova-core: add vGPU preludes Zhi Wang
2026-07-09  5:25   ` Alexandre Courbot
2026-07-09 14:39     ` Zhi Wang
2026-07-01  6:26 ` [PATCH v3 6/8] gpu: nova-core: build SetRegistry entries dynamically Zhi Wang
2026-07-08 13:37   ` Alexandre Courbot
2026-07-01  6:26 ` Zhi Wang [this message]
2026-07-01  6:26 ` [PATCH v3 8/8] gpu: nova-core: reserve vGPU WPR2 heap Zhi Wang

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