[PATCH v2 00/12] gpu: nova-core: add PRAMIN window support

[Eliot Courtney <ecourtney@nvidia.com>]

This series adds support for the PRAMIN window, plus some documentation.
Some of these patches were originally written by Joel Fernandes [1]. I
have updated them with changelog notes in each patch. For example, I
updated them for the newer IO machinery from Gary Guo.

This series adds a Pramin structure which deals with updating the PRAMIN
window and handing out typed MMIO views. The PRAMIN window is a method
that lets arbitrary VRAM be written over BAR0 by configuring a 1 MiB
window through GPU registers. That 1 MiB window can point anywhere in
VRAM. This is useful for bootstrapping e.g. GPU side page tables.

The Pramin structure hands out typed MMIO views to do writes through
rather than letting callers write directly through it. A follow up
series will add support for GPU side page table entry writing through
this mechanism. This abstraction is important for later since we will
eventually want to write the PTEs via BAR2 not PRAMIN - using a view
that we grab from the Pramin structure can abstract this out.

[1]: https://lore.kernel.org/all/20260518180342.2387845-1-joelagnelf@nvidia.com/

This is based on drm-rust-next.

Signed-off-by: Eliot Courtney <ecourtney@nvidia.com>
---
Changes in v2:
- Rebase onto Gary's IO register projection series
- Drop Region::try_subregion patch in favour of Gary's reg projection
- Convert Pramin code to use Gary's reg projection
- Fix const {assert!} -> const_assert! (Gary)
- Add #[inline] to shr_exact (Sashiko, Alex)
- Link to v1: https://patch.msgid.link/20260805-pramin-split-v1-0-ff3e84a75dac@nvidia.com

---
Eliot Courtney (6):
      rust: num: use const_assert! in Bounded
      rust: num: reject Bounded::shr overshifts at build time
      rust: num: add Bounded::shr_exact
      gpu: nova-core: mm: Implement Alignable and Debug for VramAddress
      gpu: nova-core: mm: Add the memory management HAL
      gpu: nova-core: Add self-test assertion macros and config option

Joel Fernandes (6):
      gpu: nova-core: mm: Add VramAddress type
      gpu: nova-core: mm: Add PRAMIN window registers
      gpu: nova-core: mm: Add support to use PRAMIN windows to write to VRAM
      docs: gpu: nova-core: Document the PRAMIN aperture mechanism
      gpu: nova-core: mm: Add GpuMm centralized memory manager
      gpu: nova-core: mm: Add PRAMIN aperture self-tests

 Documentation/gpu/nova/core/pramin.rst   | 128 +++++++++++++
 Documentation/gpu/nova/index.rst         |   1 +
 drivers/gpu/nova-core/Kconfig            |   9 +
 drivers/gpu/nova-core/driver.rs          |   3 +
 drivers/gpu/nova-core/gpu.rs             |  30 ++-
 drivers/gpu/nova-core/gsp/commands.rs    |   4 +
 drivers/gpu/nova-core/gsp/fw/commands.rs |   5 +
 drivers/gpu/nova-core/mm.rs              | 163 ++++++++++++++++
 drivers/gpu/nova-core/mm/hal.rs          |  56 ++++++
 drivers/gpu/nova-core/mm/hal/gb100.rs    |  35 ++++
 drivers/gpu/nova-core/mm/hal/gh100.rs    |  35 ++++
 drivers/gpu/nova-core/mm/hal/tu102.rs    |  37 ++++
 drivers/gpu/nova-core/mm/pramin.rs       | 312 +++++++++++++++++++++++++++++++
 drivers/gpu/nova-core/mm/regs.rs         |  70 +++++++
 drivers/gpu/nova-core/nova_core.rs       |   3 +
 drivers/gpu/nova-core/selftest.rs        |  64 +++++++
 rust/kernel/num/bounded.rs               |  36 +++-
 17 files changed, 988 insertions(+), 3 deletions(-)
---
base-commit: 4c9ba407018e8deb06dbc643112bac8f40404f95
change-id: 20260804-pramin-split-950e210b6e3f
prerequisite-change-id: 20260721-typed_register-176eab3abee7:v2
prerequisite-patch-id: d58e4b8a0fabdeb9363b30f1aa28ca0d42d5190e
prerequisite-patch-id: 5f0c85c6bea0600a4b0bd28b389351e71010a846
prerequisite-patch-id: 8094bc0f51da3764837321c84d71d9c49ac2ac3f
prerequisite-patch-id: cc38839e9c3d9866bd889d89b7e2fdfe609ffc5b
prerequisite-patch-id: 2e919d4f6db02e9d9ed51081a1a803b12f67535f
prerequisite-patch-id: af8a6b3f4bed0953fa8d8f7c1b9e52d746aeb6b2
prerequisite-patch-id: 131291b0a4dc1ee7e43dd038f6f99fc5dc0eb99b
prerequisite-patch-id: 12288c2ebdd58989c5fdabab6237137dd12da566
prerequisite-patch-id: 8224018b7cfec0b00cce46b238abd9f68240e187
prerequisite-patch-id: c7676cbc77ff50b2b7bf13b28c8b7c971285cc9d
prerequisite-patch-id: 1aaed2df7816f907a9403d693be068ddc9a2e43c
prerequisite-patch-id: 04d879d32289f6d715c97ba0cc94b5e94371cc92
prerequisite-patch-id: 127be60ba6331574f6784cc8a5013d4f91b47df4
prerequisite-patch-id: 97fde91d1a5eb35efbbd43e99f595d8bba844cb5
prerequisite-patch-id: 77292e35e0b794e12c0ba7eea16f89c76d899757
prerequisite-patch-id: 95bfd46c2861a2da0179630b02565398d79d55a3

Best regards,
--  
Eliot Courtney <ecourtney@nvidia.com>