From: Gary Guo <gary@garyguo.net>
To: "Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Boqun Feng" <boqun@kernel.org>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"Tamir Duberstein" <tamird@kernel.org>,
"Alexandre Courbot" <acourbot@nvidia.com>,
"Onur Özkan" <work@onurozkan.dev>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>
Cc: driver-core@lists.linux.dev, rust-for-linux@vger.kernel.org,
linux-kernel@vger.kernel.org, nova-gpu@lists.linux.dev,
dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org,
Gary Guo <gary@garyguo.net>
Subject: [PATCH v4 16/16] rust: io: register: unify handling of register with/without bitfields
Date: Tue, 01 Sep 2026 17:50:40 +0100 [thread overview]
Message-ID: <20260901-typed_register-v4-16-5552b1d59525@garyguo.net> (raw)
In-Reply-To: <20260901-typed_register-v4-0-5552b1d59525@garyguo.net>
Move the `FixedRegister` from a property of register to become a property
of type. Name the new trait `FixedIoLoc` indicating if I/O location of a
type is unique for a specific base. Thus, bitfields become just a special
case of this (where type is unique because we're generating it in the
register macro), and expose feature to registers without inline bitfield
definition with the `#[unique]` attribute.
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Gary Guo <gary@garyguo.net>
---
Changes since v3:
- Add a note that discourage `#[unique]` on primitives (Sashiko).
- Fix array's bitfield check to check `bitfield.is_none()` instead of
`!unique` (Sashiko).
---
rust/kernel/io/register.rs | 114 +++++++++++++++++++++------------------------
rust/macros/io/register.rs | 58 ++++++++++++++---------
2 files changed, 89 insertions(+), 83 deletions(-)
diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
index 9df7572aee9d..b6513fa0f412 100644
--- a/rust/kernel/io/register.rs
+++ b/rust/kernel/io/register.rs
@@ -121,61 +121,15 @@
io::IoLoc, //
};
-/// Trait implemented by registers with a fixed offset.
-pub trait FixedRegister: Sized {
- /// Base type for this register.
- type Base: ?Sized;
-
- /// Start offset of the register.
- ///
- /// The interpretation of this offset depends on the type of the register.
- const OFFSET: usize;
-}
-
/// Allows `()` to be used as the `location` parameter of [`Io::write`](super::Io::write) when
-/// passing a [`FixedRegister`] value.
+/// passing a [`FixedIoLoc`] value.
impl<Base: ?Sized, T> IoLoc<Base, T> for ()
where
- T: FixedRegister<Base = Base>,
+ T: FixedIoLoc<Base>,
{
#[inline(always)]
fn offset(self) -> usize {
- T::OFFSET
- }
-}
-
-/// A [`FixedRegister`] carries its location in its type. Thus `FixedRegister` values can be used
-/// as an [`IoLoc`].
-impl<Base: ?Sized, T> IoLoc<Base, T> for T
-where
- T: FixedRegister<Base = Base>,
-{
- #[inline(always)]
- fn offset(self) -> usize {
- T::OFFSET
- }
-}
-
-/// Location of a fixed register.
-pub struct FixedRegisterLoc<T: FixedRegister>(PhantomData<T>);
-
-impl<T: FixedRegister> FixedRegisterLoc<T> {
- /// Returns the location of `T`.
- #[inline(always)]
- // We do not implement `Default` so we can be const.
- #[expect(clippy::new_without_default)]
- pub const fn new() -> Self {
- Self(PhantomData)
- }
-}
-
-impl<Base: ?Sized, T> IoLoc<Base, T> for FixedRegisterLoc<T>
-where
- T: FixedRegister<Base = Base>,
-{
- #[inline(always)]
- fn offset(self) -> usize {
- T::OFFSET
+ T::LOCATION.offset()
}
}
@@ -188,6 +142,11 @@ impl<Base: ?Sized, T> OffsetLoc<Base, T> {
pub const fn new(offset: usize) -> Self {
Self(offset, PhantomData)
}
+
+ #[inline]
+ pub const fn const_offset(self) -> usize {
+ self.0
+ }
}
impl<Base: ?Sized, T> IoLoc<Base, T> for OffsetLoc<Base, T> {
@@ -266,6 +225,17 @@ fn try_at(idx: usize) -> Option<RegisterArrayLoc<Self>>
}
}
+/// Trait implemented by types that indicate there is a fixed I/O location for this given type.
+///
+/// Implementors can be used with [`Io::write_reg`](super::Io::write_reg).
+pub trait FixedIoLoc<Base: ?Sized>: Sized {
+ /// Type of [`FixedIoLoc::LOCATION`].
+ type Location: IoLoc<Base, Self>;
+
+ /// Location of this type within given base.
+ const LOCATION: Self::Location;
+}
+
/// Trait implemented by items that contain both a register value and the absolute I/O location at
/// which to write it.
///
@@ -283,26 +253,17 @@ pub trait LocatedRegister<Base: ?Sized> {
impl<Base: ?Sized, T> LocatedRegister<Base> for T
where
- T: FixedRegister<Base = Base>,
+ T: FixedIoLoc<Base>,
{
- type Location = FixedRegisterLoc<Self::Value>;
+ type Location = T::Location;
type Value = T;
#[inline(always)]
- fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
- (FixedRegisterLoc::new(), self)
+ fn into_io_op(self) -> (T::Location, T) {
+ (T::LOCATION, self)
}
}
-/// Helper function for register alias implementation.
-///
-/// This is used to enforce base matching.
-#[doc(hidden)]
-#[inline(always)] // for const eval only
-pub const fn alias_offset<Base: ?Sized, Alias: FixedRegister<Base = Base>>() -> usize {
- Alias::OFFSET
-}
-
/// Helper function for register element alias implementation.
///
/// This is used to enforce base matching and provide bounds checking.
@@ -419,6 +380,35 @@ pub const fn element_alias_offset<Base: ?Sized, Alias: RegisterArray<Base = Base
/// }
/// ```
///
+/// In case there is a fixed register associated with a specific type in the base, you can apply
+/// `#[unique]` attribute which enables `write_reg` shorthand. This is automatically applied to
+/// bitfields instantiated via the `register!` macro.
+///
+/// This should only be used when types meaningfully represent a register. For example, in the
+/// previous `UART_RX` example, even if only a single register is defined with `u8` type, it is a
+/// bad idea to annotate it with `#[unique]`.
+///
+/// ```no_run
+/// # use kernel::{bitfield, io::*};
+///
+/// bitfield! {
+/// pub struct Reset(u32) {
+/// 0:0 reset;
+/// }
+/// }
+///
+/// register! {
+/// base: Region<0x1000>;
+///
+/// pub RESET: #[unique] Reset @ 0x100;
+/// }
+///
+/// # fn test(mmio: Mmio<'_, Region<0x1000>>) {
+/// // let mmio: Mmio<'_, Region<0x1000>>;
+/// mmio.write_reg(Reset::zeroed().with_const_reset::<1>());
+/// # }
+/// ```
+///
/// ## Arrays of registers
///
/// Some I/O areas contain consecutive registers that share the same field layout. These areas can
diff --git a/rust/macros/io/register.rs b/rust/macros/io/register.rs
index 7d3160c4873a..6a89e4b60735 100644
--- a/rust/macros/io/register.rs
+++ b/rust/macros/io/register.rs
@@ -63,6 +63,7 @@ struct Reg {
attrs: Vec<Attribute>,
vis: Visibility,
name: Ident,
+ unique: bool,
ty: Type,
array: Option<RegArrayDef>,
offset: RegOffset,
@@ -76,16 +77,26 @@ fn parse(input: syn::parse::ParseStream<'_>) -> Result<Self> {
let name = input.parse()?;
let lh = input.lookahead1();
- let (ty, bitfield_storage) = if lh.peek(Token![:]) {
+ let (unique, ty, bitfield_storage) = if lh.peek(Token![:]) {
let _: Token![:] = input.parse()?;
- (input.parse()?, None)
+
+ let mut attrs = input.call(Attribute::parse_outer)?;
+ let unique = attrs
+ .extract_if(.., |attr| attr.path().is_ident("unique"))
+ .count()
+ != 0;
+ if !attrs.is_empty() {
+ Err(Error::new_spanned(&attrs[0], "unexpected attributes"))?
+ }
+
+ (unique, input.parse()?, None)
} else if lh.peek(token::Paren) {
let content;
parenthesized!(content in input);
let bitfield_storage = Some(content.parse()?);
// For bitfields, bitfield macro will generate a type with the same name as `name`.
- (parse_quote!(#name), bitfield_storage)
+ (true, parse_quote!(#name), bitfield_storage)
} else {
Err(lh.error())?
};
@@ -150,6 +161,7 @@ fn parse(input: syn::parse::ParseStream<'_>) -> Result<Self> {
attrs,
vis,
name,
+ unique,
ty,
array,
offset,
@@ -193,6 +205,7 @@ pub(crate) fn register(def: RegDef) -> Result<TokenStream> {
attrs,
vis,
name,
+ unique,
ty,
array,
offset,
@@ -207,7 +220,7 @@ pub(crate) fn register(def: RegDef) -> Result<TokenStream> {
RegOffset::Fixed { offset } => quote!(#offset),
RegOffset::Alias { alias } => {
quote_spanned!(alias.span().resolved_at(span) =>
- ::kernel::io::register::alias_offset::<#base, #alias>()
+ ::kernel::io::register::OffsetLoc::<#base, _>::const_offset(#alias)
)
}
RegOffset::ElementAlias { alias, idx } => {
@@ -229,27 +242,30 @@ pub(crate) fn register(def: RegDef) -> Result<TokenStream> {
}
match array {
- None if bitfield.is_none() => outputs.extend(quote!(
- #(#attrs)* #vis const #name: ::kernel::io::register::OffsetLoc<#base, #ty> =
- ::kernel::io::register::OffsetLoc::new(#offset);
- )),
-
- _ if bitfield.is_none() => Err(Error::new_spanned(
- ty,
- "defining without bitfield is not yet supported for this type of register",
- ))?,
-
- None => outputs.extend(quote_spanned!(span =>
- impl ::kernel::io::register::FixedRegister for #name {
- type Base = #base;
- const OFFSET: usize = #offset;
+ None => {
+ if unique {
+ outputs.extend(quote!(
+ impl ::kernel::io::register::FixedIoLoc<#base> for #ty {
+ type Location = ::kernel::io::register::OffsetLoc<#base, #ty>;
+ const LOCATION: Self::Location = #name;
+ }
+ ))
}
- #(#attrs)* #vis const #name: ::kernel::io::register::FixedRegisterLoc<#name> =
- ::kernel::io::register::FixedRegisterLoc::<#name>::new();
- )),
+ outputs.extend(quote_spanned!(span =>
+ #(#attrs)* #vis const #name: ::kernel::io::register::OffsetLoc<#base, #ty> =
+ ::kernel::io::register::OffsetLoc::new(#offset);
+ ));
+ }
Some(def) => {
+ if bitfield.is_none() {
+ Err(Error::new_spanned(
+ &ty,
+ "defining without bitfield is not yet supported for this type of register",
+ ))?
+ }
+
let size = &def.size;
let stride = if let Some(stride) = &def.stride {
outputs.extend(quote_spanned!(stride.span().resolved_at(span) =>
--
2.54.0
next prev parent reply other threads:[~2026-09-01 16:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 16:50 [PATCH v4 00/16] rust: io: support register projections and remove relative registers Gary Guo
2026-09-01 16:50 ` [PATCH v4 01/16] rust: io: register: reimplement as proc macro Gary Guo
2026-09-03 11:46 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 02/16] rust: mem: add `transmute` with deferred size check Gary Guo
2026-09-03 11:46 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 03/16] rust: mem: add `AsRepr` and `AsReprMut` Gary Guo
2026-09-03 12:02 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 04/16] rust: io: perform conversions using `AsRepr` Gary Guo
2026-09-01 16:50 ` [PATCH v4 05/16] rust: io: support register projections Gary Guo
2026-09-01 16:50 ` [PATCH v4 06/16] rust: io: register: allow explicit base type specification Gary Guo
2026-09-03 12:16 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 07/16] gpu: nova-core: specify base type for registers Gary Guo
2026-09-01 16:50 ` [PATCH v4 08/16] drm/tyr: " Gary Guo
2026-09-01 16:50 ` [PATCH v4 09/16] samples: rust: pci: " Gary Guo
2026-09-01 16:50 ` [PATCH v4 10/16] rust: io: register: make register have a typed base Gary Guo
2026-09-03 12:27 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 11/16] rust: io: register: support fixed offset register without bitfield Gary Guo
2026-09-01 16:50 ` [PATCH v4 12/16] gpu: nova-core: use projection for PFALCON and PFALCON2 registers Gary Guo
2026-09-03 12:34 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 13/16] gpu: nova-core: convert hshub0 from relative register to projection Gary Guo
2026-09-03 12:41 ` Alexandre Courbot
2026-09-01 16:50 ` [PATCH v4 14/16] rust: io: register: remove relative registers Gary Guo
2026-09-01 16:50 ` [PATCH v4 15/16] rust: io: register: remove `Register` trait and cleanup macro Gary Guo
2026-09-03 12:43 ` Alexandre Courbot
2026-09-01 16:50 ` Gary Guo [this message]
2026-09-03 12:49 ` [PATCH v4 00/16] rust: io: support register projections and remove relative registers Alexandre Courbot
2026-09-03 19:22 ` Danilo Krummrich
2026-09-03 19:27 ` Danilo Krummrich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260901-typed_register-v4-16-5552b1d59525@garyguo.net \
--to=gary@garyguo.net \
--cc=a.hindborg@kernel.org \
--cc=acourbot@nvidia.com \
--cc=airlied@gmail.com \
--cc=aliceryhl@google.com \
--cc=bhelgaas@google.com \
--cc=bjorn3_gh@protonmail.com \
--cc=boqun@kernel.org \
--cc=dakr@kernel.org \
--cc=daniel.almeida@collabora.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=driver-core@lists.linux.dev \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lossin@kernel.org \
--cc=nova-gpu@lists.linux.dev \
--cc=ojeda@kernel.org \
--cc=rust-for-linux@vger.kernel.org \
--cc=simona@ffwll.ch \
--cc=tamird@kernel.org \
--cc=tmgross@umich.edu \
--cc=work@onurozkan.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox