Re: [PATCH 01/10] rust: io: register: allow explicit base type specification

[John Hubbard <jhubbard@nvidia.com>]

On 7/27/26 1:14 AM, Alexandre Courbot wrote:
> On Mon Jul 27, 2026 at 2:27 PM JST, Eliot Courtney wrote:
>> On Fri Jul 24, 2026 at 10:22 PM JST, Gary Guo wrote:
>>> On Fri Jul 24, 2026 at 7:38 AM BST, Alexandre Courbot wrote:
...>> It also feels natural to me to specify
>> the space that a register is in (Region), and you can decide what method
>> you access that region (Mmio, other, etc). The cost seems to be that you
>> need to specify some region on every register, but afaict you could make
>> that a Region the size of the entire BAR0 space, or a non-sized Region
>> and just have all your accesses fallible. So it's a bit noisy but otoh
>> it's nice to think about what space each of your registers exist in.
> 
> In the case of Nova that's something we might actually want to do: as
> their name suggest, registers are split in large blocks (PBUS, PFB,
> etc). And we are currently trying to move every register out of the

Yes. The HW ref manuals have already set up an extensive taxonomy, and
it's probably a "feature-not-a-bug" to specify which region each access
is in, actually.

For NVIDIA GPUs and other HW, that is.

thanks,
-- 
John Hubbard