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quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Wed, 03 Jun 2026 14:19:35 +0900 Message-Id: Subject: Re: [PATCH v12 19/22] gpu: nova-core: Hopper/Blackwell: add FSP Chain of Trust boot From: "Alexandre Courbot" To: "John Hubbard" Cc: "Danilo Krummrich" , "Timur Tabi" , "Alistair Popple" , "Eliot Courtney" , "Shashank Sharma" , "Zhi Wang" , "David Airlie" , "Simona Vetter" , "Bjorn Helgaas" , "Miguel Ojeda" , "Alex Gaynor" , "Boqun Feng" , "Gary Guo" , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , , "LKML" References: <20260602032111.224790-1-jhubbard@nvidia.com> <20260602032111.224790-20-jhubbard@nvidia.com> In-Reply-To: <20260602032111.224790-20-jhubbard@nvidia.com> X-ClientProxiedBy: OS3P301CA0009.JPNP301.PROD.OUTLOOK.COM (2603:1096:604:21d::9) To CH2PR12MB3990.namprd12.prod.outlook.com (2603:10b6:610:28::18) Precedence: bulk X-Mailing-List: nova-gpu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: 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XKkRSqpJjfMVadnu6Hd1UtmPHkUzoUpOjy0vtCcPy4HpfOv7FJJDeAbd0yXa41QxRGHfS7NbvCuOAQplBQb2qA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6412 On Tue Jun 2, 2026 at 12:21 PM JST, John Hubbard wrote: > Build and send the Chain of Trust message to FSP, bundling the > DMA-coherent boot parameters that FSP reads at boot time. > > Co-developed-by: Alexandre Courbot > Signed-off-by: Alexandre Courbot > Signed-off-by: John Hubbard > --- > drivers/gpu/nova-core/firmware/fsp.rs | 2 - > drivers/gpu/nova-core/fsp.rs | 140 +++++++++++++++++- > drivers/gpu/nova-core/fsp/hal.rs | 1 - > drivers/gpu/nova-core/gsp.rs | 1 + > drivers/gpu/nova-core/gsp/fw.rs | 64 ++++++++ > .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 82 ++++++++++ > drivers/gpu/nova-core/gsp/hal/gh100.rs | 23 ++- > drivers/gpu/nova-core/mctp.rs | 2 - > 8 files changed, 302 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/nova-core/firmware/fsp.rs b/drivers/gpu/nova-cor= e/firmware/fsp.rs > index db61905eac9d..938aa3a3bad5 100644 > --- a/drivers/gpu/nova-core/firmware/fsp.rs > +++ b/drivers/gpu/nova-core/firmware/fsp.rs > @@ -39,10 +39,8 @@ pub(crate) struct FmcSignatures { > =20 > pub(crate) struct FspFirmware { > /// FMC firmware image data (only the "image" ELF section). > - #[expect(dead_code)] > pub(crate) fmc_image: Coherent<[u8]>, > /// FMC firmware signatures. > - #[expect(dead_code)] > pub(crate) fmc_sigs: KBox, > } > =20 > diff --git a/drivers/gpu/nova-core/fsp.rs b/drivers/gpu/nova-core/fsp.rs > index 67cf83aba83c..352ef7683cf2 100644 > --- a/drivers/gpu/nova-core/fsp.rs > +++ b/drivers/gpu/nova-core/fsp.rs > @@ -9,8 +9,14 @@ > =20 > use kernel::{ > device, > + dma::Coherent, > io::poll::read_poll_timeout, > prelude::*, > + ptr::{ > + Alignable, > + Alignment, // > + }, > + sizes::SZ_2M, > time::Delta, > transmute::{ > AsBytes, > @@ -24,8 +30,13 @@ > fsp::Fsp as FspEngine, > Falcon, // > }, > - firmware::fsp::FspFirmware, > + fb::FbLayout, > + firmware::fsp::{ > + FmcSignatures, > + FspFirmware, // > + }, > gpu::Chipset, > + gsp::GspFmcBootParams, > mctp::{ > MctpHeader, > NvdmHeader, > @@ -49,6 +60,35 @@ struct NvdmPayloadCommandResponse { > error_code: u32, > } > =20 > +/// NVDM (NVIDIA Device Management) CoT (Chain of Trust) payload, the ma= in > +/// message body sent to FSP for Chain of Trust boot. > +#[repr(C, packed)] > +#[derive(Clone, Copy)] > +struct NvdmPayloadCot { > + version: u16, > + size: u16, > + gsp_fmc_sysmem_offset: u64, > + frts_sysmem_offset: u64, > + frts_sysmem_size: u32, > + frts_vidmem_offset: u64, > + frts_vidmem_size: u32, > + sigs: FmcSignatures, > + gsp_boot_args_sysmem_offset: u64, > +} > + > +/// Complete FSP message structure with MCTP and NVDM headers. > +#[repr(C, packed)] > +#[derive(Clone, Copy)] > +struct FspMessage { > + mctp_header: MctpHeader, > + nvdm_header: NvdmHeader, > + cot: NvdmPayloadCot, > +} > + > +// SAFETY: `FspMessage` is `#[repr(C, packed)]` with no padding, so all = of its > +// bytes are initialized. > +unsafe impl AsBytes for FspMessage {} > + > /// Complete FSP response structure with MCTP and NVDM headers. > #[repr(C, packed)] > #[derive(Clone, Copy)] > @@ -70,6 +110,44 @@ pub(crate) trait MessageToFsp: AsBytes { > const NVDM_TYPE: u32; This should probably be a `NvdmType`. > } > =20 > +impl MessageToFsp for FspMessage { > + const NVDM_TYPE: u32 =3D NvdmType::Cot as u32; > +} > + > +/// Bundled arguments for FMC boot via FSP Chain of Trust. > +pub(crate) struct FmcBootArgs { > + chipset: Chipset, > + fmc_boot_params: Coherent, > + resume: bool, > +} > + > +impl FmcBootArgs { > + /// Builds FMC boot arguments, allocating the DMA-coherent boot para= meter > + /// structure that FSP will read. > + pub(crate) fn new( > + dev: &device::Device, > + chipset: Chipset, > + wpr_meta_addr: u64, > + libos_addr: u64, > + resume: bool, > + ) -> Result { > + let init =3D GspFmcBootParams::new(wpr_meta_addr, libos_addr); > + > + Ok(Self { > + chipset, > + fmc_boot_params: Coherent::::init(dev, GFP= _KERNEL, init)?, > + resume, > + }) > + } > + > + /// DMA address of the FMC boot parameters, needed after boot for lo= ckdown > + /// release polling. > + #[expect(dead_code)] > + pub(crate) fn boot_params_dma_handle(&self) -> u64 { > + self.fmc_boot_params.dma_handle() > + } > +} > + > /// FSP interface for Hopper/Blackwell GPUs. > /// > /// An `Fsp` is produced by [`Fsp::wait_secure_boot`], which only return= s once FSP secure boot > @@ -77,7 +155,6 @@ pub(crate) trait MessageToFsp: AsBytes { > /// Chain of Trust boot. > pub(crate) struct Fsp { > falcon: Falcon, > - #[expect(dead_code)] > fsp_fw: FspFirmware, > } > =20 > @@ -113,8 +190,65 @@ pub(crate) fn wait_secure_boot( > Ok(Fsp { falcon, fsp_fw }) > } > =20 > + /// Boots GSP FMC via FSP Chain of Trust. > + /// > + /// Builds the CoT message from the pre-configured [`FmcBootArgs`], = sends it > + /// to FSP, and waits for the response. > + pub(crate) fn boot_fmc( > + &mut self, > + dev: &device::Device, > + bar: &Bar0, > + fb_layout: &FbLayout, > + args: &FmcBootArgs, > + ) -> Result { > + dev_dbg!(dev, "Starting FSP boot sequence for {}\n", args.chipse= t); > + > + let fmc_addr =3D self.fsp_fw.fmc_image.dma_handle(); > + let fmc_boot_params_addr =3D args.fmc_boot_params.dma_handle(); > + > + // frts_offset is relative to FB end: FRTS_location =3D FB_END -= frts_offset > + let frts_offset =3D if !args.resume { > + let frts_reserved_size =3D fb_layout.heap.len() + u64::from(= fb_layout.pmu_reserved_size); > + > + frts_reserved_size > + .align_up(Alignment::new::()) > + .ok_or(EINVAL)? > + } else { > + 0 > + }; > + let frts_size: u32 =3D if !args.resume { > + fb_layout.frts.len().try_into()? > + } else { > + 0 > + }; > + > + let msg =3D KBox::new( > + FspMessage { We have the same problem as the FSP signatures, this will result in the `FspMessage` (868 bytes) being created on the stack before being moved into the `KBox`. And because `FspMessage` is `packed` we cannot use `init!`= ... So I guess the only way for now will be to zero-init it and initialize the fields =C3=A0 la C using `chain`. Let me do that in a constructor. > + mctp_header: MctpHeader::single_packet(), > + nvdm_header: NvdmHeader::new(NvdmType::Cot), > + cot: NvdmPayloadCot { > + version: hal::fsp_hal(args.chipset).ok_or(ENOTSUPP)?= .cot_version(), > + size: u16::try_from(core::mem::size_of::()) > + .map_err(|_| EINVAL)?, This can be: size: num::usize_into_u16::<{ core::mem::size_of::() }>= (), to infer the value at build time and avoid the runtime error check.