From: "Gary Guo" <gary@garyguo.net>
To: "Alexandre Courbot" <acourbot@nvidia.com>, "Gary Guo" <gary@garyguo.net>
Cc: "Danilo Krummrich" <dakr@kernel.org>,
"Alice Ryhl" <aliceryhl@google.com>,
"Daniel Almeida" <daniel.almeida@collabora.com>,
"Miguel Ojeda" <ojeda@kernel.org>,
"Boqun Feng" <boqun@kernel.org>,
"Björn Roy Baron" <bjorn3_gh@protonmail.com>,
"Benno Lossin" <lossin@kernel.org>,
"Andreas Hindborg" <a.hindborg@kernel.org>,
"Trevor Gross" <tmgross@umich.edu>,
"Tamir Duberstein" <tamird@kernel.org>,
"Onur Özkan" <work@onurozkan.dev>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
driver-core@lists.linux.dev, rust-for-linux@vger.kernel.org,
linux-kernel@vger.kernel.org, nova-gpu@lists.linux.dev,
dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 12/16] gpu: nova-core: use projection for PFALCON and PFALCON2 registers
Date: Fri, 14 Aug 2026 14:05:21 +0100 [thread overview]
Message-ID: <DKOOSSXDVVUK.SY5IAXJXUX5F@garyguo.net> (raw)
In-Reply-To: <DKN1QEH1HWD1.1ZV0LWLNCZJTH@nvidia.com>
On Wed Aug 12, 2026 at 3:48 PM BST, Alexandre Courbot wrote:
> On Thu Aug 6, 2026 at 1:35 AM JST, Gary Guo wrote:
>> -/// Type used to represent the `PFALCON` registers address base for a given falcon engine.
>> -pub(crate) struct PFalconBase(());
>> +/// Type used to represent the `PFALCON` registers.
>> +#[repr(align(4))]
>> +#[derive(FromBytes, IntoBytes)]
>> +pub(crate) struct PFalconRegisters([u8; SZ_4K]);
>>
>> -/// Type used to represent the `PFALCON2` registers address base for a given falcon engine.
>> -pub(crate) struct PFalcon2Base(());
>> +/// Type used to represent the `PFALCON2` registers.
>> +#[repr(align(4))]
>> +#[derive(FromBytes, IntoBytes)]
>> +pub(crate) struct PFalcon2Registers([u8; SZ_4K]);
>>
>> /// Trait defining the parameters of a given Falcon engine.
>> ///
>> /// Each engine provides one base for `PFALCON` and `PFALCON2` registers.
>> -pub(crate) trait FalconEngine:
>> - Send + Sync + RegisterBase<PFalconBase> + RegisterBase<PFalcon2Base> + Sized
>> -{
>> +pub(crate) trait FalconEngine: Send + Sync + Sized {
>> + fn pfalcon(io: Bar0<'_>) -> Mmio<'_, PFalconRegisters>;
>> + fn pfalcon2(io: Bar0<'_>) -> Mmio<'_, PFalcon2Registers>;
>
> Remember on v1 when we contemplated using associated consts? Turns out
> we can with this version:
>
> // Need a better name, but you get the idea.
> pub(crate) type PFalconRegs = OffsetLoc<NovaRegisters, PFalconRegisters>;
> pub(crate) type PFalcon2Regs = OffsetLoc<NovaRegisters, PFalcon2Registers>;
>
> pub(crate) trait FalconEngine: Send + Sync + Sized {
> const PFALCON: PFalconRegs;
> const PFALCON2: PFalcon2Regs;
> }
>
> ... and make `Falcon::new` call `io_project` directly, and it works! At
> the cost of importing `OffsetLoc` in `falcon.rs`, but that removes ~30
> LoCs in total, and I'm not sure `OffsetLoc` should be hidden anyway.
Originally I want the type of consts created by `register!()` to be considered
as implementation detail and thus ideally not to be named by the user. To user I
want them to treat it as just `impl IoLoc<>`.
However, thinking about this again, I think we might be able to have a single
type for all registers after all the cleanups, so it'd make sense to make this
public API. However, I do want a better name than `OffsetLoc` if we're going to
make this use case supported, though.
Best,
Gary
>
>> }
>>
>> /// Represents a portion of the firmware to be loaded into a particular memory (e.g. IMEM or DMEM)
>> @@ -358,6 +361,8 @@ pub(crate) struct Falcon<'a, E: FalconEngine> {
>> hal: KBox<dyn FalconHal<E>>,
>> dev: &'a device::Device<device::Bound>,
>> bar: Bar0<'a>,
>> + pub(crate) pfalcon: Mmio<'a, PFalconRegisters>,
>> + pfalcon2: Mmio<'a, PFalcon2Registers>,
>> }
>>
next prev parent reply other threads:[~2026-08-14 13:05 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 16:35 [PATCH v2 00/16] rust: io: support register projections and remove relative registers Gary Guo
2026-08-05 16:35 ` [PATCH v2 01/16] rust: io: add static `cast()` method for views Gary Guo
2026-08-10 9:29 ` Alexandre Courbot
2026-08-13 17:29 ` Gary Guo
2026-08-05 16:35 ` [PATCH v2 02/16] rust: io: add `IoRepr` trait Gary Guo
2026-08-10 9:30 ` Alexandre Courbot
2026-08-10 11:21 ` Gary Guo
2026-08-12 4:51 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 03/16] rust: io: support register projections Gary Guo
2026-08-10 9:30 ` Alexandre Courbot
2026-08-10 11:23 ` Gary Guo
2026-08-05 16:35 ` [PATCH v2 04/16] rust: io: register: handle one register at a time Gary Guo
2026-08-10 9:30 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 05/16] rust: io: register extract offset computation to helper rules Gary Guo
2026-08-10 9:31 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 06/16] rust: io: register: allow explicit base type specification Gary Guo
2026-08-10 9:32 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 07/16] gpu: nova-core: specify base type for registers Gary Guo
2026-08-05 16:35 ` [PATCH v2 08/16] drm/tyr: " Gary Guo
2026-08-05 16:59 ` Gary Guo
2026-08-05 16:35 ` [PATCH v2 09/16] samples: rust: pci: " Gary Guo
2026-08-05 16:35 ` [PATCH v2 10/16] rust: io: register: make register have a typed base Gary Guo
2026-08-05 16:35 ` [PATCH v2 11/16] rust: io: register: support fixed offset register without bitfield Gary Guo
2026-08-12 9:01 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 12/16] gpu: nova-core: use projection for PFALCON and PFALCON2 registers Gary Guo
2026-08-12 14:48 ` Alexandre Courbot
2026-08-12 20:44 ` John Hubbard
2026-08-14 13:05 ` Gary Guo [this message]
2026-08-05 16:35 ` [PATCH v2 13/16] gpu: nova-core: convert hshub0 from relative register to projection Gary Guo
2026-08-05 16:35 ` [PATCH v2 14/16] rust: io: register: remove relative registers Gary Guo
2026-08-13 0:58 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 15/16] rust: io: register: remove `Register` trait and cleanup macro Gary Guo
2026-08-14 13:56 ` Alexandre Courbot
2026-08-05 16:35 ` [PATCH v2 16/16] rust: io: register: unify handling of register with/without bitfields Gary Guo
2026-08-14 13:56 ` Alexandre Courbot
2026-08-14 14:27 ` Gary Guo
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