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From: "Alexandre Courbot" <acourbot@nvidia.com>
To: "Dave Airlie via B4 Relay" <devnull+airlied.redhat.com@kernel.org>
Cc: <airlied@redhat.com>, "Andreas Hindborg" <a.hindborg@kernel.org>,
	"FUJITA Tomonori" <fujita.tomonori@gmail.com>,
	"Gary Guo" <gary@garyguo.net>,
	"Alice Ryhl" <aliceryhl@google.com>,
	"Danilo Krummrich" <dakr@kernel.org>,
	"Daniel Almeida" <daniel.almeida@collabora.com>,
	<nova-gpu@lists.linux.dev>, <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v7 2/2] gpu: nova-core: add support for GPU timer block. (v7)
Date: Thu, 12 Nov 2026 22:28:57 +0900	[thread overview]
Message-ID: <DMT9NWCA0XW1.936X5AXCNUE3@nvidia.com> (raw)
In-Reply-To: <20261111-nova-timer-v7-2-3031c2476551@redhat.com>

On Wed Nov 11, 2026 at 2:23 PM JST, Dave Airlie via B4 Relay wrote:
> From: Dave Airlie <airlied@redhat.com>
>
> This is needed to calculate the system timer offset that is passed
> to GSP init.
>
> 2 HALs exist:
>
> a) tu102 is the gv100 path from open-gpu, the priv level is checked
> and the cpu time is written to the gpu timer. no offset is used.
>
> b) gh100 is for hopper+
> This is the gh100 path from open-gpu, where the secure system
> timer is read, the offset is calculated.
> The offset is written to hw offset registers, except on the
> original gh100 where a workaround is needed for older FSP versions.
>
> Signed-off-by: Dave Airlie <airlied@redhat.com>

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>

One last nit (which can be addressed upon applying) below.

<...>
> diff --git a/drivers/gpu/nova-core/timer/hal/tu102.rs b/drivers/gpu/nova-core/timer/hal/tu102.rs
> new file mode 100644
> index 000000000000..93fe17990ec8
> --- /dev/null
> +++ b/drivers/gpu/nova-core/timer/hal/tu102.rs
> @@ -0,0 +1,49 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +use super::TimerHal;
> +
> +use kernel::{
> +    device,
> +    io::Io,
> +    prelude::*,
> +    time::*, //
> +};
> +
> +use crate::{
> +    driver::Bar0,
> +    fsp::Fsp,
> +    timer::regs::*, //
> +};
> +
> +/// Timer HAL for Turing, Ampere, Ada
> +struct Tu102;
> +
> +fn set_time(bar: Bar0<'_>, time_ns: u64) -> Result {
> +    if !bar.read(NV_PTIMER_TIME_PRIV_LEVEL_MASK).level0() {
> +        return Err(EINVAL);
> +    }
> +    bar.write_reg(NV_PTIMER_TIME_1::from_nsec(time_ns));
> +    bar.write_reg(NV_PTIMER_TIME_0::from_nsec(time_ns));
> +    Ok(())
> +}
> +
> +impl TimerHal for Tu102 {
> +    fn setup(
> +        &self,
> +        dev: &device::Device<device::Bound>,
> +        bar: Bar0<'_>,
> +        _fsp: Option<&Fsp<'_>>,
> +    ) -> Result<u64> {
> +        // The OpenRM driver uses wall clock time here not monotonic
> +        let sys_time_ns = Instant::<RealTime>::now().as_nanos();
> +
> +        // CAST: realtime system time can't be negative.
> +        // not setting the timer isn't fatal, just log.
> +        let _ = set_time(bar, sys_time_ns as u64)
> +            .inspect_err(|e| dev_err!(dev, "timer block failed to initialise: {:?}", e));

Missing `\n` at the end of the error message.

      reply	other threads:[~2026-11-12 13:29 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-11  5:23 [PATCH v7 0/2] nova-core: add initial support for gpu timer (v7) Dave Airlie via B4 Relay
2026-11-11  5:23 ` [PATCH v7 1/2] rust: time: expose as_nanos for clock sources Dave Airlie via B4 Relay
2026-11-12 12:47   ` Andreas Hindborg
2026-11-12 12:59     ` Danilo Krummrich
2026-11-12 13:50       ` Andreas Hindborg
2026-11-12 14:22         ` Danilo Krummrich
2026-11-11  5:23 ` [PATCH v7 2/2] gpu: nova-core: add support for GPU timer block. (v7) Dave Airlie via B4 Relay
2026-11-12 13:28   ` Alexandre Courbot [this message]

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