From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35D5E2EACF2 for ; Fri, 16 Oct 2026 02:00:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792116059; cv=none; b=RWeGCxgIHBr70YwuzjpUjfP+CKaQDzsgDuyekMy5wl9mFqJTi5vxCgPBFRfaJEJJ7v+/D40MyqTfxgd+j/36HtAKKBx4sP84eIbuRkYSUun50AX4lUQCvIa90esRqbpoa8TGo62ild3fqWra91JVgw8eWxKGeLqE3oZSLrAalo4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1792116059; c=relaxed/simple; bh=8KesLW2kczVUS6uaMPLpQXXG4FsL2rs+uXnWoMh5Ct4=; h=Message-ID:From:Subject:To:Cc:In-Reply-To:References:Content-Type: Date; b=WfrgIZXkSQZcxeykcrz0XbDNrhzyfruzx/zqk4LSKwPRPUOLmlLqy+XDmFulYer5behrEHB0mOdbWmDydvyQ34+WuUe/F+oYDy98R5Myi2YAlzSyyTo0LjHR4VRd6sPpjdPS56WLYkjGXCAP06/xhNHRFy0XVTi1VbUNUqAoXs4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bJ3JxsGC; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bJ3JxsGC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8E82D1F000C4; Fri, 16 Oct 2026 02:00:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1792116057; bh=WrAhFT75iG01wckpU+08pAhzVcHyqZ2mMr1iWIBV2nM=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=bJ3JxsGCR8wlp8P28aClHN17WfiqKrewncfp6r4C830qq5XAi1+4yA0XQZoYGiBQl v/kpX2P/hFo/mWPgDe3J6f7llg3h8N3AUHa9avdlbce9ttqViCUPyi8exm0deuNTA0 jnr1zr4poDhZYb28JzKiJppKCDVtdDpZ/igmTPLYDwuVVHb2oZFUqm3/znmqWaC74W ZG0SE6lBefijQ2c7oZ9TVB+yzWBd4NcuazGGyG3+aD1LdW5M6s4H76UKk7AusnzutC LlcFGi0dnX3JofjqftLCNrvPFh/TDnHrizVgZTOIzcTP00pT3Uo1D6RenD/EaZN9yh LDeJGnWu6uToA== Message-ID: From: sashiko-bot@kernel.org Subject: Re: [PATCH v4 4/7] gpu: nova-core: add NVKV decoder Reply-To: sashiko-reviews@lists.linux.dev To: "Eliot Courtney" , "Danilo Krummrich" , "Lorenzo Stoakes" , "Vlastimil Babka" , "Liam R. Howlett" , "Uladzislau Rezki" , "Miguel Ojeda" , "Boqun Feng" , "Gary Guo" , =?utf-8?b?QmrDtnJuIFJveSBCYXJvbg==?= , "Benno Lossin" , "Andreas Hindborg" , "Alice Ryhl" , "Trevor Gross" , "Daniel Almeida" , "Tamir Duberstein" , "Alexandre Courbot" , =?utf-8?b?T251ciDDlnprYW4=?= , "David Airlie" , "Simona Vetter" Cc: "John Hubbard" , "Alistair Popple" , "Timur Tabi" , nova-gpu@lists.linux.dev, dri-devel@lists.freedesktop.org In-Reply-To: <20261016-b4-nvkv-v4-4-e8b92b91aa5b@nvidia.com> References: <20261016-b4-nvkv-v4-0-e8b92b91aa5b@nvidia.com> <20261016-b4-nvkv-v4-4-e8b92b91aa5b@nvidia.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Fri, 16 Oct 2026 02:00:56 +0000 Precedence: bulk X-Mailing-List: nova-gpu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Thank you for your contribution! Sashiko AI review found 1 potential issue(= s) to consider: - [High] gpu: nova-core: endianness bug when extracting u8/u32 arrays from = native &[u64] stream -- commit 60056513188e14b734dcdb09e45f7f46bb4688b6 Author: Eliot Courtney gpu: nova-core: add NVKV decoder This commit adds an NVKV decoder for parsing messages from GSP for GMCAPI calls. It reads an encoded stream of (key, index, value) tuples and invokes a Schema/Visit trait interface to consume the values. > diff --git a/drivers/gpu/nova-core/gsp/nvkv/decode.rs b/drivers/gpu/nova-= core/gsp/nvkv/decode.rs > new file mode 100644 > index 0000000000000..6496fab1c0c62 > --- /dev/null > +++ b/drivers/gpu/nova-core/gsp/nvkv/decode.rs [ ... ] > + /// Takes `count` bytes. If `count` is not a multiple of 8 (`u64` si= ze), bytes are discarded up > + /// to the next multiple. > + fn take_u8s(&mut self, count: usize) -> Result<&'a [u8]> { > + let values =3D self.take_u64s(count.div_ceil(size_of::()))?; > + values.as_bytes().get(..count).ok_or(EINVAL) > + } [Severity: High] Does casting a native u64 slice to bytes extract the wrong payload on big-endian architectures? Because Cursor::take_u64s() reads host-native 64-bit integers, using .as_bytes() reverses the byte layout on big-endian hosts compared to little-endian. For example, if a 3-byte payload is stored inside a 64-bit word, a big-endi= an host will have the payload at the end of the word and zero-padding at the beginning, causing .get(..count) to extract the zeros instead of the actual data payload. > + > + /// Takes `count` 32-bit values. If `count` is not a multiple of 2 (= `u32` values per `u64`), > + /// bytes are discarded up to the next multiple. > + fn take_u32s(&mut self, count: usize) -> Result<&'a [u32]> { > + let values =3D self.take_u64s(count.div_ceil(size_of::() / = size_of::()))?; > + <[u32]>::ref_from_prefix_with_elems(values.as_bytes(), count) > + .map(|(elems, _)| elems) > + .map_err(|_| EINVAL) > + } [Severity: High] Can this result in swapped 32-bit words on big-endian systems? Similar to the byte array extraction above, passing the native memory representation through .as_bytes() to recreate a [u32] slice will swap the order of the 32-bit halves on big-endian architectures compared to little-endian ones. [ ... ] > + /// Decodes every pair into `schema` and returns the result of [`Sch= ema::finish`]. > + pub(crate) fn decode<'s, S: Schema + Visit<'a>>( > + &self, > + schema: &'s mut S, > + ) -> Result + 's> { > + let mut cursor =3D Cursor::new(self.data); > + while !cursor.is_empty() { > + let op: Op =3D cursor.take_u64()?.into(); [Severity: High] Does this misalign the operation bitfields on big-endian hosts? The 64-bit operation word is read as a host-native integer via take_u64(). If the NVKV stream comes from a little-endian GSP, parsing it directly as a native u64 on a big-endian host will misalign the key, index, and value fields inside Op. Should this explicitly handle endianness (e.g., using little-endian read functions) instead of relying on native host integers? --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20261016-b4-nvkv-v4= -0-e8b92b91aa5b@nvidia.com?part=3D4