Linux PCI Non-Transparent Bridge framework and drivers
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From: "Jiang, Dave" <dave.jiang@intel.com>
To: "cem@FreeBSD.org" <cem@FreeBSD.org>
Cc: "allen.hubbe@emc.com" <allen.hubbe@emc.com>,
	"jdmason@kudzu.us" <jdmason@kudzu.us>,
	"linux-ntb@googlegroups.com" <linux-ntb@googlegroups.com>
Subject: Re: [PATCH] NTB: Clear property bits in BAR value
Date: Thu, 19 Nov 2015 20:54:46 +0000	[thread overview]
Message-ID: <1447966484.83864.268.camel@intel.com> (raw)
In-Reply-To: <CAG6CVpXqKnRfOR_WKmrnScB0t1w7nGOFsgfYPGFrYh9Hv4LFvg@mail.gmail.com>



On Thu, 2015-11-19 at 12:50 -0800, Conrad Meyer wrote:
> Looks fine to me.  Isn't unsigned long 64 bits on Linux amd64?
> (Should NTB_BAR_MASK_32 just be ~(0xfu)?)

Good catch! I'll fix that. 

> 
> Best,
> Conrad
> 
> On Thu, Nov 19, 2015 at 12:47 PM, Dave Jiang <dave.jiang@intel.com>
> wrote:
> > The lower bits read from a BAR register will contain property bits
> > that we do not care about. Clear those so that we can use the BAR
> > values for limit and xlat registers.
> > 
> > Reported-by: Conrad Meyer <cem@freebsd.org>
> > Signed-off-by: Dave Jiang <dave.jiang@intel.com>
> > ---
> >  drivers/ntb/hw/intel/ntb_hw_intel.c |    4 ++--
> >  drivers/ntb/hw/intel/ntb_hw_intel.h |    3 +++
> >  2 files changed, 5 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.c
> > b/drivers/ntb/hw/intel/ntb_hw_intel.c
> > index a198f82..40d04ef 100644
> > --- a/drivers/ntb/hw/intel/ntb_hw_intel.c
> > +++ b/drivers/ntb/hw/intel/ntb_hw_intel.c
> > @@ -875,7 +875,7 @@ static int intel_ntb_mw_set_trans(struct
> > ntb_dev *ntb, int idx,
> >         limit_reg = bar2_off(ndev->xlat_reg->bar2_limit, bar);
> > 
> >         if (bar < 4 || !ndev->bar4_split) {
> > -               base = ioread64(mmio + base_reg);
> > +               base = ioread64(mmio + base_reg) & NTB_BAR_MASK_64;
> > 
> >                 /* Set the limit if supported, if size is not
> > mw_size */
> >                 if (limit_reg && size != mw_size)
> > @@ -906,7 +906,7 @@ static int intel_ntb_mw_set_trans(struct
> > ntb_dev *ntb, int idx,
> >                 if ((addr + size) & (~0ull << 32))
> >                         return -EINVAL;
> > 
> > -               base = ioread32(mmio + base_reg);
> > +               base = ioread32(mmio + base_reg) & NTB_BAR_MASK_32;
> > 
> >                 /* Set the limit if supported, if size is not
> > mw_size */
> >                 if (limit_reg && size != mw_size)
> > diff --git a/drivers/ntb/hw/intel/ntb_hw_intel.h
> > b/drivers/ntb/hw/intel/ntb_hw_intel.h
> > index 2eb4add..a257c7c 100644
> > --- a/drivers/ntb/hw/intel/ntb_hw_intel.h
> > +++ b/drivers/ntb/hw/intel/ntb_hw_intel.h
> > @@ -245,6 +245,9 @@
> >  #define NTB_UNSAFE_DB                  BIT_ULL(0)
> >  #define NTB_UNSAFE_SPAD                        BIT_ULL(1)
> > 
> > +#define NTB_BAR_MASK_64                        ~(0xfull)
> > +#define NTB_BAR_MASK_32                        ~(0xful)
> > +
> >  struct intel_ntb_dev;
> > 
> >  struct intel_ntb_reg {
> > 
> 

      reply	other threads:[~2015-11-19 20:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-19 20:47 [PATCH] NTB: Clear property bits in BAR value Dave Jiang
2015-11-19 20:50 ` Conrad Meyer
2015-11-19 20:54   ` Jiang, Dave [this message]

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