From: Dave Jiang <dave.jiang@intel.com>
To: Grace Zhuang <gzhuang@celestica.com>
Cc: linux-ntb@googlegroups.com, Jon Mason <jdmason@kudzu.us>
Subject: Re: AER event in NTB
Date: Fri, 13 Jul 2018 08:47:50 -0700 [thread overview]
Message-ID: <56d92ea7-0184-7f14-edc7-69f9ab0f4483@intel.com> (raw)
In-Reply-To: <CAM+4PA2SQ+=F47-SrmrbeOTsFhw0OihtbpFsXq-pkUOHvht8MA@mail.gmail.com>
On 07/13/2018 01:25 AM, Grace Zhuang wrote:
> Thanks Dave.
> I studied Intel documents these days.
> I found In SKX_EDS_vol2B_546833_Rev1_7.pdf :
>
> In Figure 4-1 NTB Internal Endpoint
> There is Vendor-Specific Advanced Error Reporting Capability.
> But in Figure 4-4 NTB External Endpoint
> There is standard Advanced Error Reporting Capability.
As far as I know the standard report mechanism is not supported by the
hardware.
>
>
> Grace Zhuang(庄燕子）
> Diagnostics Engineer
> +86-21-61006028 ext:7637
> 13917171202
> gzhuang@celestica.com <mailto:gzhuang@celestica.com>
> www.celestica.com <http://www.celestica.com>
>
> On Tue, Jul 3, 2018 at 12:09 AM, Dave Jiang <dave.jiang@intel.com
> <mailto:dave.jiang@intel.com>> wrote:
>
>
>
> On 07/01/2018 09:33 PM, Grace Zhuang wrote:
> > On Purley platform, have any AER event/msi will be reported in dmesg?
> > I found there was a ntb-aer branch, but it was maintained before 2015.
>
> Intel NTB does not support standard PCIe AER. Support was never added
> for it. I think that branch was Jon playing around with the proprietary
> support. I don't believe it ties into the Linux standard PCIe AER
> framework.
>
>
prev parent reply other threads:[~2018-07-13 15:48 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-02 4:33 AER event in NTB Grace Zhuang
2018-07-02 16:09 ` Dave Jiang
2018-07-13 8:25 ` Grace Zhuang
2018-07-13 15:47 ` Dave Jiang [this message]
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