From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ale.deltatee.com (ale.deltatee.com. [207.54.116.67]) by gmr-mx.google.com with ESMTPS id s83-v6si157515ywb.1.2018.07.03.17.03.03 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 17:03:03 -0700 (PDT) From: Logan Gunthorpe References: <20180622194752.11221-1-logang@deltatee.com> <20180622194752.11221-7-logang@deltatee.com> <13ea3f97-4a33-3a24-1b7e-b819be73d867@deltatee.com> <6e5224b9-343f-990c-19bd-fe37c6fbdc9b@deltatee.com> <7ddda181-6337-32cc-7a0d-43fc6a7ba78b@deltatee.com> <991b2298-bb3f-dad3-c93b-b43ee5f372de@deltatee.com> Message-ID: <6d8df4be-a2da-5ddb-3b13-ca47d903ac80@deltatee.com> Date: Tue, 3 Jul 2018 18:02:53 -0600 MIME-Version: 1.0 In-Reply-To: <991b2298-bb3f-dad3-c93b-b43ee5f372de@deltatee.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [PATCH v18 6/7] crypto: caam: cleanup CONFIG_64BIT ifdefs when using io{read|write}64 To: Andy Shevchenko Cc: Fabio Estevam , Andrew Morton , linux-kernel , Linux-Arch , linux-ntb@googlegroups.com, "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Arnd Bergmann , Greg Kroah-Hartman , =?UTF-8?Q?Horia_Geant=c4=83?= , Dan Douglass , Herbert Xu , "David S. Miller" List-ID: On 03/07/18 05:57 PM, Logan Gunthorpe wrote: > To confirm, can you try the patch below? Actually, scratch that: try this patch as I forgot the read side on the previous one. Logan -- diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index 5826acd9194e..796ff764dcbf 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -138,18 +138,26 @@ static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) */ static inline void wr_reg64(void __iomem *reg, u64 data) { - if (!caam_imx && caam_little_end) + if (caam_imx && caam_little_end) { + iowrite32(data >> 32, reg); + iowrite32(data, reg + sizeof(u32)); + } else if (caam_little_end) { iowrite64(data, reg); - else + } else { iowrite64be(data, reg); + } } static inline u64 rd_reg64(void __iomem *reg) { - if (!caam_imx && caam_little_end) + if (caam_imx && caam_little_end) { + return ((u64)ioread32(reg) << 32) | + (u64)ioread32(reg + sizeof(u32)); + } else if (caam_little_end) { return ioread64(reg); - else + } else { return ioread64be(reg); + } } static inline u64 cpu_to_caam_dma64(dma_addr_t value)