From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ale.deltatee.com (ale.deltatee.com. [207.54.116.67]) by gmr-mx.google.com with ESMTPS id d16-v6si101161ual.3.2018.07.03.16.58.04 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jul 2018 16:58:05 -0700 (PDT) References: <20180622194752.11221-1-logang@deltatee.com> <20180622194752.11221-7-logang@deltatee.com> <13ea3f97-4a33-3a24-1b7e-b819be73d867@deltatee.com> <6e5224b9-343f-990c-19bd-fe37c6fbdc9b@deltatee.com> <7ddda181-6337-32cc-7a0d-43fc6a7ba78b@deltatee.com> From: Logan Gunthorpe Message-ID: <991b2298-bb3f-dad3-c93b-b43ee5f372de@deltatee.com> Date: Tue, 3 Jul 2018 17:57:55 -0600 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [PATCH v18 6/7] crypto: caam: cleanup CONFIG_64BIT ifdefs when using io{read|write}64 To: Andy Shevchenko Cc: Fabio Estevam , Andrew Morton , linux-kernel , Linux-Arch , linux-ntb@googlegroups.com, "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Arnd Bergmann , Greg Kroah-Hartman , =?UTF-8?Q?Horia_Geant=c4=83?= , Dan Douglass , Herbert Xu , "David S. Miller" List-ID: On 03/07/18 04:21 PM, Andy Shevchenko wrote: > It is an explicit call to BUG(). > That's why we see wrong instruction trap. Ok, I think I see the problem... the code is rather confusing: Prior to the patch, IOs were BE depending on caam_little_end but if caam_imx was set, then it wrote two LE writes with the high one first. After the patch, it writes two BE writes with the high one first. To confirm, can you try the patch below? If this is the case, we can either revert the commit or fold in this patch depending on what others think is clearer. Thanks, Logan -- diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h index 5826acd9194e..5f70c460da25 100644 --- a/drivers/crypto/caam/regs.h +++ b/drivers/crypto/caam/regs.h @@ -138,10 +138,14 @@ static inline void clrsetbits_32(void __iomem *reg, u32 clear, u32 set) */ static inline void wr_reg64(void __iomem *reg, u64 data) { - if (!caam_imx && caam_little_end) + if (caam_imx && caam_little_end) { + iowrite32(data >> 32, reg); + iowrite32(data, reg + sizeof(u32)); + } else if (caam_little_end) { iowrite64(data, reg); - else + } else { iowrite64be(data, reg); + } } static inline u64 rd_reg64(void __iomem *reg)