From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from ale.deltatee.com (ale.deltatee.com. [207.54.116.67]) by gmr-mx.google.com with ESMTPS id o8-v6si234441qtm.4.2018.07.04.10.13.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 04 Jul 2018 10:13:21 -0700 (PDT) References: <20180622194752.11221-1-logang@deltatee.com> <13ea3f97-4a33-3a24-1b7e-b819be73d867@deltatee.com> <6e5224b9-343f-990c-19bd-fe37c6fbdc9b@deltatee.com> <7ddda181-6337-32cc-7a0d-43fc6a7ba78b@deltatee.com> <991b2298-bb3f-dad3-c93b-b43ee5f372de@deltatee.com> <55236e2b-a2a5-493a-5696-19c5926885b3@deltatee.com> From: Logan Gunthorpe Message-ID: Date: Wed, 4 Jul 2018 11:13:13 -0600 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Subject: Re: [PATCH v18 6/7] crypto: caam: cleanup CONFIG_64BIT ifdefs when using io{read|write}64 To: Andy Shevchenko Cc: Fabio Estevam , Horia Geanta , Aymen Sghaier , Andrew Morton , linux-kernel , Linux-Arch , "linux-ntb@googlegroups.com" , "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" , Arnd Bergmann , Greg Kroah-Hartman , Dan Douglass , Herbert Xu , "David S. Miller" List-ID: On 7/4/2018 11:10 AM, Andy Shevchenko wrote: > We have an iDMA 32-bit hardware (see drivers/dma/dw/) which has an > extension 64-bit registers where only one of them has a specific bit > to "commit" the changes written to all of them. And by some very > unknown reason that bit is in lo part which automatically means we > must to write it last. And it supports both BE and LE? And in both cases it's the lo part? Logan