From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FE744A18 for ; Tue, 27 Sep 2022 19:39:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664307552; x=1695843552; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=eN4jmEX43FC2hynGPrezejUCbvmijBGF9PDOUGgeBks=; b=CcZk4mnZpN006yxMiYVbLyP2Uxig9M4XRmnKSsEulyQXcv5GaovMKZEC QPW5mrFC4hzHYB1k9Ep7A+29a42FKkUtUMWO7xKfv8VqECh5cbLX5pCG6 tInpYbtx4nBOx+ahPk7bhkeycKBrIm7NMRzRZkRSnunrIdrKmTh3Pwsxz r3mx19YtaFZEwUIIpltmXX62APezDxZmz747uapMr/xTqsRlEv8Tv2HUO f7wob2+7RY6IskqGgOq6a5Yc7BVgQ0mDdZrqJCTDKGSzHnzT2pG6ZpIDf qscHbYtNaRqMOstUb+O0/iuYOpxk+j3OBSVT3rFlbFDOw7Do2ffbfrDWT Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="363253113" X-IronPort-AV: E=Sophos;i="5.93,350,1654585200"; d="scan'208";a="363253113" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 12:39:12 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10483"; a="690113946" X-IronPort-AV: E=Sophos;i="5.93,350,1654585200"; d="scan'208";a="690113946" Received: from weimingg-mobl.amr.corp.intel.com (HELO [10.212.244.112]) ([10.212.244.112]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2022 12:39:11 -0700 Message-ID: Date: Tue, 27 Sep 2022 12:39:10 -0700 Precedence: bulk X-Mailing-List: ntb@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Firefox/91.0 Thunderbird/91.11.0 Subject: Re: [PATCH v2 3/9] NTB: Change to use pci_aer_clear_uncorrect_error_status() Content-Language: en-US To: Zhuo Chen , bhelgaas@google.com, ruscur@russell.cc, oohall@gmail.com, fancer.lancer@gmail.com, jdmason@kudzu.us, dave.jiang@intel.com, allenbh@gmail.com, james.smart@broadcom.com, dick.kennedy@broadcom.com, jejb@linux.ibm.com, martin.petersen@oracle.com Cc: linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ntb@lists.linux.dev, linux-scsi@vger.kernel.org References: <20220927153524.49172-1-chenzhuo.1@bytedance.com> <20220927153524.49172-4-chenzhuo.1@bytedance.com> From: Sathyanarayanan Kuppuswamy In-Reply-To: <20220927153524.49172-4-chenzhuo.1@bytedance.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 9/27/22 8:35 AM, Zhuo Chen wrote: > Status bits for ERR_NONFATAL errors only are cleared in > pci_aer_clear_nonfatal_status(), but we want clear uncorrectable > error status in idt_init_pci(), so we change to use > pci_aer_clear_uncorrect_error_status(). You mean currently driver does not clear fatal errors now, and it is a problem? Any error reported? Also, I am wondering why is it required to clear errors during init code. Is it a norm? > > Signed-off-by: Zhuo Chen > --- > drivers/ntb/hw/idt/ntb_hw_idt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/ntb/hw/idt/ntb_hw_idt.c b/drivers/ntb/hw/idt/ntb_hw_idt.c > index 0ed6f809ff2e..d5f0aa87f817 100644 > --- a/drivers/ntb/hw/idt/ntb_hw_idt.c > +++ b/drivers/ntb/hw/idt/ntb_hw_idt.c > @@ -2657,8 +2657,8 @@ static int idt_init_pci(struct idt_ntb_dev *ndev) > ret = pci_enable_pcie_error_reporting(pdev); > if (ret != 0) > dev_warn(&pdev->dev, "PCIe AER capability disabled\n"); > - else /* Cleanup nonfatal error status before getting to init */ > - pci_aer_clear_nonfatal_status(pdev); > + else /* Cleanup uncorrectable error status before getting to init */ > + pci_aer_clear_uncorrect_error_status(pdev); > > /* First enable the PCI device */ > ret = pcim_enable_device(pdev); -- Sathyanarayanan Kuppuswamy Linux Kernel Developer