public inbox for nvdimm@lists.linux.dev
 help / color / mirror / Atom feed
From: Neeraj Kumar <s.neeraj@samsung.com>
To: Dave Jiang <dave.jiang@intel.com>
Cc: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev,
	linux-kernel@vger.kernel.org, gost.dev@samsung.com,
	a.manzanares@samsung.com, vishak.g@samsung.com,
	neeraj.kernel@gmail.com, cpgs@samsung.com
Subject: Re: [PATCH V3 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation
Date: Mon, 29 Sep 2025 19:07:38 +0530	[thread overview]
Message-ID: <158453976.61759726503893.JavaMail.epsvc@epcpadp1new> (raw)
In-Reply-To: <e45d7687-fb93-4d2e-8cb4-e84c5a7ce782@intel.com>

[-- Attachment #1: Type: text/plain, Size: 2991 bytes --]

On 23/09/25 04:50PM, Dave Jiang wrote:
>
>> +static ssize_t alloc_region_hpa(struct cxl_region *cxlr, u64 size)
>> +{
>> +	int rc;
>> +
>> +	ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region);
>> +	rc = ACQUIRE_ERR(rwsem_write_kill, &rwsem);
>> +	if (rc)
>> +		return rc;
>
>Just a nit. Please conform to existing style in the subsystem for this new usage.
>
>  +	ACQUIRE(rwsem_write_kill, rwsem)(&cxl_rwsem.region);
>  +	if ((rc = ACQUIRE_ERR(rwsem_write_kill, &rwsem))))
>  +		return rc;
>

Actually because of checkpatch.pl error, it is different from existing
style. But recent fix by Alison at [1] will allow to fix it as per others.
Sure, I will fix it in next patch-set
[1]: https://lore.kernel.org/linux-cxl/20250815010645.2980846-1-alison.schofield@intel.com/

>> +
>> +	if (!size)
>> +		return -EINVAL;
>> +
>> +	return alloc_hpa(cxlr, size);
>> +}
>
>I think you can create another helper free_region_hpa() and call them in size_store() function to remove the duplicate code.

Sure Dave, I will fix it in next patch-set

>> +
>> +static ssize_t alloc_region_dpa(struct cxl_endpoint_decoder *cxled, u64 size)
>> +{
>> +	int rc;
>> +
>> +	if (!size)
>> +		return -EINVAL;
>> +
>> +	if (!IS_ALIGNED(size, SZ_256M))
>> +		return -EINVAL;
>> +
>> +	rc = cxl_dpa_free(cxled);
>> +	if (rc)
>> +		return rc;
>> +
>> +	return cxl_dpa_alloc(cxled, size);
>> +}
>> +
>> +static struct cxl_region *
>> +devm_cxl_pmem_add_region(struct cxl_root_decoder *cxlrd, int id,
>> +			 enum cxl_partition_mode mode,
>
>Wouldn't this not needed since it would be CXL_PARTMODE_PMEM always? I also wonder if we need to rename devm_cxl_add_region() to devm_cxl_add_ram_region() to be explicit.
>

Yes devm_cxl_pmem_add_region() always need CXL_PARTMODE_PMEM, So I will
modify it accordingly. Also I will rename devm_cxl_add_region() to
devm_cxl_add_ram_region().

>> +			 enum cxl_decoder_type type,
>> +			 struct cxl_pmem_region_params *params,
>> +			 struct cxl_decoder *cxld)
>> +{
>> +	struct cxl_endpoint_decoder *cxled;
>> +	struct cxl_region_params *p;
>> +	struct cxl_port *root_port;
>> +	struct device *dev;
>> +	int rc;
>> +

<snip>

>> +	rc = alloc_region_dpa(cxled, params->rawsize);
>> +	if (rc)
>> +		return ERR_PTR(rc);
>> +
>> +	/*
>> +	 * TODO: Currently we have support of interleave_way == 1, where
>> +	 * we can only have one region per mem device. It means mem device
>> +	 * position (params->position) will always be 0. It is therefore
>> +	 * attaching only one target at params->position
>> +	 */
>> +	if (params->position)
>> +		return ERR_PTR(-EINVAL);
>
>EOPNOTSUPP?

Yes, EOPNOTSUPP would be more appropriate than EINVAL. I will fix it in
next patch-set

>
>Speaking of which, are there plans to support interleave in the near future?
>
>DJ

My current focus is to get this upstreamed and after that will focus on
multi-interleave support. Multi-interleave support will require some more
efforts on top of this change. So will take it in another series.


Regards,
Neeraj

[-- Attachment #2: Type: text/plain, Size: 0 bytes --]



  reply	other threads:[~2025-10-06  4:55 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250917134126epcas5p3e20c773759b91f70a1caa32b9f6f27ff@epcas5p3.samsung.com>
2025-09-17 13:40 ` [PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and cxl pmem Neeraj Kumar
2025-09-17 13:40   ` [PATCH V3 01/20] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label Neeraj Kumar
2025-09-19 23:10     ` Dave Jiang
2025-09-22 12:41       ` Neeraj Kumar
2025-09-17 13:40   ` [PATCH V3 02/20] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-09-19 23:31     ` Dave Jiang
2025-09-17 13:40   ` [PATCH V3 03/20] nvdimm/label: Modify nd_label_base() signature Neeraj Kumar
2025-09-19 21:42     ` Ira Weiny
2025-09-19 23:34     ` Dave Jiang
2025-09-22 12:44       ` Neeraj Kumar
2025-09-24 21:02         ` Alison Schofield
2025-09-29 14:07           ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 04/20] nvdimm/label: Update mutex_lock() with guard(mutex)() Neeraj Kumar
2025-09-19 21:55     ` Ira Weiny
2025-09-22 12:56       ` Neeraj Kumar
2025-09-19 23:50     ` Dave Jiang
2025-09-20 17:44       ` Ira Weiny
2025-09-22 13:01         ` Neeraj Kumar
2025-09-24 21:42     ` Alison Schofield
2025-09-29 14:19       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 05/20] nvdimm/namespace_label: Add namespace label changes as per CXL LSA v2.1 Neeraj Kumar
2025-09-17 14:54     ` Jonathan Cameron
2025-09-19 22:00     ` Ira Weiny
2025-09-22 13:05       ` Neeraj Kumar
2025-09-19 23:59     ` Dave Jiang
2025-09-22 13:03       ` Neeraj Kumar
2025-09-23 21:48     ` Dave Jiang
2025-09-29 13:28       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 06/20] nvdimm/region_label: Add region label update support Neeraj Kumar
2025-09-17 15:36     ` Jonathan Cameron
2025-09-22 13:12       ` Neeraj Kumar
2025-10-06 16:56       ` Dave Jiang
2025-09-22 23:11     ` Dave Jiang
2025-09-29 13:24       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 07/20] nvdimm/region_label: Add region label delete support Neeraj Kumar
2025-09-22 21:37     ` Dave Jiang
2025-09-29 13:13       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 08/20] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-09-22 22:17     ` Dave Jiang
2025-09-29 13:17       ` Neeraj Kumar
2025-09-24 21:30     ` Alison Schofield
2025-09-29 14:10       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 09/20] nvdimm/namespace_label: Skip region label during ns label DPA reservation Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 10/20] nvdimm/namespace_label: Skip region label during namespace creation Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 11/20] nvdimm/region_label: Preserve cxl region information from region label Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 12/20] nvdimm/region_label: Export routine to fetch region information Neeraj Kumar
2025-09-23 20:23     ` Dave Jiang
2025-09-29 13:26       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 13/20] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-09-23 22:37     ` Dave Jiang
2025-09-29 13:30       ` Neeraj Kumar
2025-10-06 15:55         ` Dave Jiang
2025-11-07 12:39           ` Neeraj Kumar
2025-11-12 15:55             ` Dave Jiang
2025-11-13  7:27               ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar
2025-09-23 23:50     ` Dave Jiang
2025-09-29 13:37       ` Neeraj Kumar [this message]
2025-09-17 13:41   ` [PATCH V3 15/20] cxl: Add a routine to find cxl root decoder on cxl bus using cxl port Neeraj Kumar
2025-09-24 18:11     ` Dave Jiang
2025-09-29 13:40       ` Neeraj Kumar
2025-10-06 16:02         ` Dave Jiang
2025-09-17 13:41   ` [PATCH V3 16/20] cxl/mem: Preserve cxl root decoder during mem probe Neeraj Kumar
2025-09-24 18:23     ` Dave Jiang
2025-09-29 13:52       ` Neeraj Kumar
2025-09-24 21:38     ` Alison Schofield
2025-09-29 14:13       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 17/20] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 18/20] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-09-24 18:53     ` Dave Jiang
2025-09-29 13:57       ` Neeraj Kumar
2025-10-06 16:06         ` Dave Jiang
2025-11-07 12:49           ` Neeraj Kumar
2025-11-12 15:40             ` Dave Jiang
2025-11-13  7:29               ` Neeraj Kumar
2025-10-06 16:09         ` Dave Jiang
2025-09-17 13:41   ` [PATCH V3 19/20] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Neeraj Kumar
2025-09-24 20:25     ` Dave Jiang
2025-09-29 14:00       ` Neeraj Kumar
2025-09-17 13:41   ` [PATCH V3 20/20] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem Neeraj Kumar
2025-09-24 20:47     ` Dave Jiang
2025-09-29 14:02       ` Neeraj Kumar
2025-10-06 16:13         ` Dave Jiang
2025-09-17 14:50   ` [PATCH V3 00/20] Add CXL LSA 2.1 format support in nvdimm and " Jonathan Cameron
2025-09-17 15:38     ` Dave Jiang
2025-09-22 12:36     ` Neeraj Kumar
2025-09-23 23:04   ` Alison Schofield
2025-09-29 13:33     ` Neeraj Kumar
     [not found] <CGME20250917133050epcas5p3979792644e47ee94956bcf00c84a832e@epcas5p3.samsung.com>
2025-09-17 13:29 ` Neeraj Kumar
2025-09-17 13:29   ` [PATCH V3 14/20] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=158453976.61759726503893.JavaMail.epsvc@epcpadp1new \
    --to=s.neeraj@samsung.com \
    --cc=a.manzanares@samsung.com \
    --cc=cpgs@samsung.com \
    --cc=dave.jiang@intel.com \
    --cc=gost.dev@samsung.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=neeraj.kernel@gmail.com \
    --cc=nvdimm@lists.linux.dev \
    --cc=vishak.g@samsung.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox