From: Dave Jiang <dave.jiang@intel.com>
To: Neeraj Kumar <s.neeraj@samsung.com>,
linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev,
linux-kernel@vger.kernel.org, gost.dev@samsung.com
Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com
Subject: Re: [PATCH V4 08/17] nvdimm/label: Preserve cxl region information from region label
Date: Wed, 19 Nov 2025 13:13:13 -0700 [thread overview]
Message-ID: <f161f011-e4f3-47f4-aa09-6266da1cd423@intel.com> (raw)
In-Reply-To: <20251119075255.2637388-9-s.neeraj@samsung.com>
On 11/19/25 12:52 AM, Neeraj Kumar wrote:
> Preserve region information from region label during nvdimm_probe. This
> preserved region information is used for creating cxl region to achieve
> region persistency across reboot.
>
> Signed-off-by: Neeraj Kumar <s.neeraj@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Assume there's a plan to add >1 region labels preservation in the next step?
> ---
> drivers/nvdimm/dimm.c | 4 ++++
> drivers/nvdimm/label.c | 40 +++++++++++++++++++++++++++++++++++++++
> drivers/nvdimm/nd-core.h | 2 ++
> drivers/nvdimm/nd.h | 1 +
> include/linux/libnvdimm.h | 14 ++++++++++++++
> 5 files changed, 61 insertions(+)
>
> diff --git a/drivers/nvdimm/dimm.c b/drivers/nvdimm/dimm.c
> index 07f5c5d5e537..590ec883903d 100644
> --- a/drivers/nvdimm/dimm.c
> +++ b/drivers/nvdimm/dimm.c
> @@ -107,6 +107,10 @@ static int nvdimm_probe(struct device *dev)
> if (rc)
> goto err;
>
> + /* Preserve cxl region info if available */
> + if (ndd->cxl)
> + nvdimm_cxl_region_preserve(ndd);
> +
> return 0;
>
> err:
> diff --git a/drivers/nvdimm/label.c b/drivers/nvdimm/label.c
> index da55ecd95e2f..0f8aea61b504 100644
> --- a/drivers/nvdimm/label.c
> +++ b/drivers/nvdimm/label.c
> @@ -490,6 +490,46 @@ int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd)
> return 0;
> }
>
> +int nvdimm_cxl_region_preserve(struct nvdimm_drvdata *ndd)
> +{
> + struct nvdimm *nvdimm = to_nvdimm(ndd->dev);
> + struct cxl_pmem_region_params *p = &nvdimm->cxl_region_params;
> + struct nd_namespace_index *nsindex;
> + unsigned long *free;
> + u32 nslot, slot;
> +
> + if (!preamble_current(ndd, &nsindex, &free, &nslot))
> + return 0; /* no label, nothing to preserve */
> +
> + for_each_clear_bit_le(slot, free, nslot) {
> + union nd_lsa_label *lsa_label;
> + struct cxl_region_label *region_label;
> + uuid_t *region_uuid;
> +
> + lsa_label = to_lsa_label(ndd, slot);
> + region_label = &lsa_label->region_label;
> + region_uuid = (uuid_t *) ®ion_label->type;
> +
> + /* TODO: Currently preserving only one region */
> + if (uuid_equal(&cxl_region_uuid, region_uuid)) {
> + nvdimm->is_region_label = true;
> + import_uuid(&p->uuid, region_label->uuid);
> + p->flags = __le32_to_cpu(region_label->flags);
> + p->nlabel = __le16_to_cpu(region_label->nlabel);
> + p->position = __le16_to_cpu(region_label->position);
> + p->dpa = __le64_to_cpu(region_label->dpa);
> + p->rawsize = __le64_to_cpu(region_label->rawsize);
> + p->hpa = __le64_to_cpu(region_label->hpa);
> + p->slot = __le32_to_cpu(region_label->slot);
> + p->ig = __le32_to_cpu(region_label->ig);
> + p->align = __le32_to_cpu(region_label->align);
> + break;
> + }
> + }
> +
> + return 0;
> +}
> +
> int nd_label_data_init(struct nvdimm_drvdata *ndd)
> {
> size_t config_size, read_size, max_xfer, offset;
> diff --git a/drivers/nvdimm/nd-core.h b/drivers/nvdimm/nd-core.h
> index bfc6bfeb6e24..a73fac81531e 100644
> --- a/drivers/nvdimm/nd-core.h
> +++ b/drivers/nvdimm/nd-core.h
> @@ -46,6 +46,8 @@ struct nvdimm {
> } sec;
> struct delayed_work dwork;
> const struct nvdimm_fw_ops *fw_ops;
> + bool is_region_label;
> + struct cxl_pmem_region_params cxl_region_params;
> };
>
> static inline unsigned long nvdimm_security_flags(
> diff --git a/drivers/nvdimm/nd.h b/drivers/nvdimm/nd.h
> index b241a0b2e314..281d30dd9ba0 100644
> --- a/drivers/nvdimm/nd.h
> +++ b/drivers/nvdimm/nd.h
> @@ -600,6 +600,7 @@ void nvdimm_set_locked(struct device *dev);
> void nvdimm_clear_locked(struct device *dev);
> int nvdimm_security_setup_events(struct device *dev);
> bool nvdimm_region_label_supported(struct device *dev);
> +int nvdimm_cxl_region_preserve(struct nvdimm_drvdata *ndd);
> #if IS_ENABLED(CONFIG_NVDIMM_KEYS)
> int nvdimm_security_unlock(struct device *dev);
> #else
> diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h
> index bbf14a260c93..07ea2e3f821a 100644
> --- a/include/linux/libnvdimm.h
> +++ b/include/linux/libnvdimm.h
> @@ -108,6 +108,20 @@ struct nd_cmd_desc {
> int out_sizes[ND_CMD_MAX_ELEM];
> };
>
> +struct cxl_pmem_region_params {
> + uuid_t uuid;
> + u32 flags;
> + u16 nlabel;
> + u16 position;
> + u64 dpa;
> + u64 rawsize;
> + u64 hpa;
> + u32 slot;
> + u32 ig;
> + u32 align;
> + int nr_targets;
> +};
> +
> struct nd_interleave_set {
> /* v1.1 definition of the interleave-set-cookie algorithm */
> u64 cookie1;
next prev parent reply other threads:[~2025-11-19 20:13 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20251119075306epcas5p22a87515de65a3c668275b394cdea83b0@epcas5p2.samsung.com>
2025-11-19 7:52 ` [PATCH V4 00/17] Add CXL LSA 2.1 format support in nvdimm and cxl pmem Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 01/17] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 02/17] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 03/17] nvdimm/label: Add namespace/region label support as per LSA 2.1 Neeraj Kumar
2025-11-19 15:51 ` Dave Jiang
2026-01-09 11:46 ` Neeraj Kumar
2025-12-17 14:31 ` Jonathan Cameron
2026-01-09 11:51 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 04/17] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-11-19 16:54 ` Dave Jiang
2025-11-19 7:52 ` [PATCH V4 05/17] nvdimm/label: Skip region label during ns label DPA reservation Neeraj Kumar
2025-11-19 17:01 ` Dave Jiang
2025-12-17 14:33 ` Jonathan Cameron
2026-01-09 11:53 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 06/17] nvdimm/label: Preserve region label during namespace creation Neeraj Kumar
2025-11-19 18:07 ` Dave Jiang
2025-11-19 7:52 ` [PATCH V4 07/17] nvdimm/label: Add region label delete support Neeraj Kumar
2025-11-19 19:50 ` Dave Jiang
2026-01-09 11:56 ` Neeraj Kumar
2025-12-17 15:05 ` Jonathan Cameron
2026-01-09 11:58 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 08/17] nvdimm/label: Preserve cxl region information from region label Neeraj Kumar
2025-11-19 20:13 ` Dave Jiang [this message]
2026-01-09 12:03 ` Neeraj Kumar
2025-12-17 15:09 ` Jonathan Cameron
2026-01-09 12:06 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 09/17] nvdimm/label: Export routine to fetch region information Neeraj Kumar
2025-11-19 20:18 ` Dave Jiang
2025-12-17 15:12 ` Jonathan Cameron
2026-01-09 12:09 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 10/17] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-11-19 20:44 ` Dave Jiang
2026-01-09 12:10 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 11/17] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar
2025-11-19 21:33 ` Dave Jiang
2026-01-09 12:13 ` Neeraj Kumar
2025-12-17 15:28 ` Jonathan Cameron
2026-01-09 12:22 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 12/17] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
2025-11-19 22:00 ` Dave Jiang
2025-11-19 7:52 ` [PATCH V4 13/17] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-11-19 22:08 ` Dave Jiang
2025-12-17 15:35 ` Jonathan Cameron
2026-01-09 12:26 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 14/17] cxl/pmem_region: Introduce CONFIG_CXL_PMEM_REGION for core/pmem_region.c Neeraj Kumar
2025-11-19 22:24 ` Dave Jiang
2025-12-17 15:38 ` Jonathan Cameron
2026-01-09 12:29 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 15/17] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Neeraj Kumar
2025-11-19 23:10 ` Dave Jiang
2026-01-09 12:31 ` Neeraj Kumar
2025-12-17 15:40 ` Jonathan Cameron
2026-01-09 12:32 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 16/17] cxl/pmem_region: Create pmem region using information parsed from LSA Neeraj Kumar
2025-11-19 23:37 ` Dave Jiang
2026-01-09 12:37 ` Neeraj Kumar
2025-11-19 7:52 ` [PATCH V4 17/17] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem Neeraj Kumar
2025-11-19 23:37 ` Dave Jiang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f161f011-e4f3-47f4-aa09-6266da1cd423@intel.com \
--to=dave.jiang@intel.com \
--cc=a.manzanares@samsung.com \
--cc=gost.dev@samsung.com \
--cc=linux-cxl@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=neeraj.kernel@gmail.com \
--cc=nvdimm@lists.linux.dev \
--cc=s.neeraj@samsung.com \
--cc=vishak.g@samsung.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox