[OPAE] Low level design information and RapidWright

[OPAE] Low level design information and RapidWright

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If you look at RapidWright (RapidWright.io) you will find a more powerful
way to program FPGAs. RapidWright uses Java (any object-oriented language
like C++ could be used) to instantiate hardware at the lowest level. There
is an example that places and routes a design in 6 seconds.  RapidWright
uses a constructive method that does not rely on random place and route
methods. 

Intel should adopt this level of device information. Altera would never do
this out of fear of reverse engineering and support. RapidWright is an
open-source program. 

RapidWright is an extremely dynamic system that ties hardware and software
directly into one system.

I urge everyone to take a look and demand that Intel matches Xilinx in its
openness.

Cheers

Steve Casselman