From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: multipart/mixed; boundary="===============7937201441483880987==" MIME-Version: 1.0 From: sc at commacorp.com Subject: [OPAE] Low level design information and RapidWright Date: Thu, 11 Jun 2020 08:30:40 -0700 Message-ID: <7f8f01d64005$44060e30$cc122a90$@commacorp.com> List-ID: To: opae@lists.01.org --===============7937201441483880987== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable If you look at RapidWright (RapidWright.io) you will find a more powerful way to program FPGAs. RapidWright uses Java (any object-oriented language like C++ could be used) to instantiate hardware at the lowest level. There is an example that places and routes a design in 6 seconds. RapidWright uses a constructive method that does not rely on random place and route methods. = Intel should adopt this level of device information. Altera would never do this out of fear of reverse engineering and support. RapidWright is an open-source program. = RapidWright is an extremely dynamic system that ties hardware and software directly into one system. I urge everyone to take a look and demand that Intel matches Xilinx in its openness. Cheers Steve Casselman --===============7937201441483880987==--