From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 881F7CAC586 for ; Mon, 8 Sep 2025 13:00:19 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [127.0.0.1]) by lists.ozlabs.org (Postfix) with ESMTP id 4cL6Vb5WMDz30RJ; Mon, 8 Sep 2025 22:59:51 +1000 (AEST) Authentication-Results: lists.ozlabs.org; arc=none smtp.remote-ip="2a00:1450:4864:20::42c" ARC-Seal: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1757336391; cv=none; b=byRVmHYMo8el836PHQ29bomgRTbLyil1kYb4TaBqYJoTD1kMEMz7s2bKQiSoJvXVWCYG875BZzqIzLhciuYddckCkNFgnfKOfF9ZIAx8dKOfh7GbhXj4t+y623Pn0mOI6+tp2UtbKIc61dKjb8Luwl2p7pObZDtYhOAqg0wukp4TLPGcq9IUXc3h7gn49GWRRNUIk5FfndbQ57bk4dAReGvBDFBluQGRi16K9s1mW4CWXejAd0BvtQdIlfb3nQ4XZGwbHqIpBZgAugrHwWO5oMQxU2Oi/qlNcBkhXW8XCyUjSm/xLOFIaf7rAhnNe/+RJzPK6g7sSTu/tJN9ts4KUA== ARC-Message-Signature: i=1; a=rsa-sha256; d=lists.ozlabs.org; s=201707; t=1757336391; c=relaxed/relaxed; bh=ohTjPehvEZpnbTZWGGl3LmVxYQyjSBeyFWblJS+0WIQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kssMLIVoTUBLnHg5m7lhIyYGTgG4RtqR8jOdL1WS7FVIZbEX1hkBDCdxEC8Dwqm0dto3HgSW2apvkrtAFt9+pGJfB1kNjYVLCu8GQ72EnHgMXqPo6yPKWSewmzQG/G+5xf7gCJhqsLrQ8yUY/w06VaiSfed9av7fqlAVxSZfR1XTgUD0+LyUXSeUkcBxJqmgOdM/l7kSVVnTtwGZukw3gSjiPcnlFueeq306saTQmoDBwxw/U0KVyvO1BwL44wR1OMKLhP5Iy+AaM7mPYRXImjwEDXPTfa65sa8/MS8R1jRcmELdI77VIL0P4oYcsc7K/5ZXx6xVaDNDs/2Z8Kj5lA== ARC-Authentication-Results: i=1; lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=WlW0Oqko; dkim-atps=neutral; spf=pass (client-ip=2a00:1450:4864:20::42c; helo=mail-wr1-x42c.google.com; envelope-from=tmaimon77@gmail.com; receiver=lists.ozlabs.org) smtp.mailfrom=gmail.com Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20230601 header.b=WlW0Oqko; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2a00:1450:4864:20::42c; helo=mail-wr1-x42c.google.com; envelope-from=tmaimon77@gmail.com; receiver=lists.ozlabs.org) Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4cL6VZ5zxtz30QJ for ; Mon, 8 Sep 2025 22:59:50 +1000 (AEST) Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-3df35a67434so2702108f8f.3 for ; Mon, 08 Sep 2025 05:59:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1757336388; x=1757941188; darn=lists.ozlabs.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ohTjPehvEZpnbTZWGGl3LmVxYQyjSBeyFWblJS+0WIQ=; b=WlW0Oqkoj+kFPF/yzXocafawCKr38ZX8swnGtjgTpX6JDbtNsb261xhFX7T80UB92U n75FAiCu5hbFjUbxItrd8LxBL+o+bg6DX7qYETKLY7bUTPpVSIzXAGbdpeTkmBAg2co5 BCP/nQSYDDzX1RMdeaJHW10qOtRmP3Tx62krQB2S0W/4lquUR1O4YrEafVwotz6TzaQk P8U9nxniuOGogjxBZuz8JyYI3oh0pNDGbtAdeCoyClH4z/sGxGDaWmNUpulAWA6QO9Ui NQzfSURpgHsklkmqogPo4yTcG/JvU8Gu36slEH8EoE6viFBd5R2/jgLJcqdYuiSvjwyJ WWbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1757336388; x=1757941188; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ohTjPehvEZpnbTZWGGl3LmVxYQyjSBeyFWblJS+0WIQ=; b=h4tDof8djy6ua6Ij+8ZqNTpyIKC6eAeeLRhMGp1B2we+qkASTYbows9lYnJybu6mtG li6+NKHWuFn9r2Kv64lylgDAgv40PUlztnyo3JBoIGqM7pRLjEP0xw6hPZsq+m4XdOgl FMSjG3wIF4dXa7WlMjIp8351wq/IhXVRJXIamBvlGWD7e/vVx4c/Qp/74n5GBpFiXeEy ukmlrQ3684iwFDAjadX8cYWrBlANHQabdGjvf9pgRST1O9POe7ILgDLU19Ss4PB71dnQ oybDWfpqUkcW8ilx+Amv6G8RpSdLKkRJYczNGI7vaCqyJcAiEmJM+5nlimi0io3BQFf6 Y3KA== X-Gm-Message-State: AOJu0Yw6s9h5niufHU2293IVHoV9olKKArzIhRAZeljh06fG+/yyb9oL ik2J5btFXPW7Tjy1Dl7Q22qVleHNy0zQ6OT1SvcwWFbORU8/eY4zbdgWYuntzQ== X-Gm-Gg: ASbGncsNY4HUNaND+8M9OaULswHCKegkTuF4SITPXXbfYeYPdMvx1kd+LuO8Vhsa3ud 2Vg1io+sftmYlco2jKxFqwmGHJsYhcrH4IhdOjZOaVm+CQAo7DO/IUhxMTofX6IU9goU8Af9fio q52aEDAp3ZYRYFgFS1+r2h9AH3+9Y0FJC1qtVeLB3AZIctaVsfpTdFisnMpI2L+lLLXNFMSQV2W cNKu13/vqsicqR8B2BqDqx7+3RC+mpQXPSLihCyweHpAJjhAxPcwMqgF9wPUdK+/g1rMykdJpEZ z3nTtKt9By3GgHMti6rWfR7d5emgUoc1UF/85vADu4wrm3l+TDqhiLumVWbNcKaiFbxBDsQ+eA2 xJxwrp22db/FxWYE3jooadw5iDnVhbqT30focHSV6yfXb X-Google-Smtp-Source: AGHT+IG/sznJSOJRWqTPYkU9mtj3z/JTHqvpHXVfviEB9X7NQmlAgsa7OmrD+qN2TANTMUAGW3TFnw== X-Received: by 2002:a05:6000:200f:b0:3e7:4c93:18d9 with SMTP id ffacd0b85a97d-3e74c931c04mr1957542f8f.60.1757336387588; Mon, 08 Sep 2025 05:59:47 -0700 (PDT) Received: from taln60.nuvoton.co.il ([212.199.177.18]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3cf276d5816sm41260581f8f.25.2025.09.08.05.59.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Sep 2025 05:59:47 -0700 (PDT) From: Tomer Maimon To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, avifishman70@gmail.com, tali.perry1@gmail.com, joel@jms.id.au, venture@google.com, yuenn@google.com, benjaminfair@google.com Cc: openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tomer Maimon Subject: [PATCH v2 2/2] arm64: dts: nuvoton: npcm845-evb: Add peripheral nodes Date: Mon, 8 Sep 2025 15:59:38 +0300 Message-Id: <20250908125938.3584927-3-tmaimon77@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250908125938.3584927-1-tmaimon77@gmail.com> References: <20250908125938.3584927-1-tmaimon77@gmail.com> X-Mailing-List: openbmc@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Enable peripheral support for the Nuvoton NPCM845 Evaluation Board by adding device nodes for Ethernet controllers, MMC controller, SPI controllers, USB device controllers, random number generator, ADC, PWM-FAN controller, I2C controllers, and PECI interface. Include MDIO nodes for Ethernet PHYs, reserved memory for TIP, and aliases for device access. Signed-off-by: Tomer Maimon --- .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 439 ++++++++++++++++++ 1 file changed, 439 insertions(+) diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts index 2638ee1c3846..145a2e599600 100644 --- a/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts @@ -10,6 +10,42 @@ / { aliases { serial0 = &serial0; + ethernet1 = &gmac1; + ethernet2 = &gmac2; + ethernet3 = &gmac3; + mdio-gpio0 = &mdio0; + mdio-gpio1 = &mdio1; + fiu0 = &fiu0; + fiu1 = &fiu3; + fiu2 = &fiux; + fiu3 = &fiu1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c7 = &i2c7; + i2c8 = &i2c8; + i2c9 = &i2c9; + i2c10 = &i2c10; + i2c11 = &i2c11; + i2c12 = &i2c12; + i2c13 = &i2c13; + i2c14 = &i2c14; + i2c15 = &i2c15; + i2c16 = &i2c16; + i2c17 = &i2c17; + i2c18 = &i2c18; + i2c19 = &i2c19; + i2c20 = &i2c20; + i2c21 = &i2c21; + i2c22 = &i2c22; + i2c23 = &i2c23; + i2c24 = &i2c24; + i2c25 = &i2c25; + i2c26 = &i2c26; }; chosen { @@ -25,12 +61,415 @@ refclk: refclk-25mhz { clock-frequency = <25000000>; #clock-cells = <0>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + tip_reserved: tip@0 { + reg = <0x0 0x0 0x0 0x6200000>; + }; + }; + + mdio0: mdio-0 { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>, + <&gpio1 26 GPIO_ACTIVE_HIGH>; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + + mdio1: mdio-1 { + compatible = "virtual,mdio-gpio"; + #address-cells = <1>; + #size-cells = <0>; + gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>, + <&gpio2 28 GPIO_ACTIVE_HIGH>; + + phy1: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&gmac1 { + phy-mode = "rgmii-id"; + snps,eee-force-disable; + status = "okay"; +}; + +&gmac2 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&r1_pins + &r1oen_pins>; + phy-handle = <&phy0>; + status = "okay"; +}; + +&gmac3 { + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <&r2_pins + &r2oen_pins>; + phy-handle = <&phy1>; + status = "okay"; }; &serial0 { status = "okay"; }; +&fiu0 { + status = "okay"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + spi-rx-bus-width = <1>; + reg = <0>; + spi-max-frequency = <5000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + bbuboot1@0 { + label = "bb-uboot-1"; + reg = <0x0000000 0x80000>; + read-only; + }; + bbuboot2@80000 { + label = "bb-uboot-2"; + reg = <0x0080000 0x80000>; + read-only; + }; + envparam@100000 { + label = "env-param"; + reg = <0x0100000 0x40000>; + read-only; + }; + spare@140000 { + label = "spare"; + reg = <0x0140000 0xC0000>; + }; + kernel@200000 { + label = "kernel"; + reg = <0x0200000 0x400000>; + }; + rootfs@600000 { + label = "rootfs"; + reg = <0x0600000 0x700000>; + }; + spare1@D00000 { + label = "spare1"; + reg = <0x0D00000 0x200000>; + }; + spare2@F00000 { + label = "spare2"; + reg = <0x0F00000 0x200000>; + }; + spare3@1100000 { + label = "spare3"; + reg = <0x1100000 0x200000>; + }; + spare4@1300000 { + label = "spare4"; + reg = <0x1300000 0x0>; + }; + }; + }; +}; + +&fiu1 { + status = "okay"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + reg = <0>; + spi-max-frequency = <5000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + system1@0 { + label = "spi1-system1"; + reg = <0x0 0x0>; + }; + }; + }; +}; + +&fiu3 { + pinctrl-0 = <&spi3_pins>, <&spi3quad_pins>; + status = "okay"; + spi-nor@0 { + compatible = "jedec,spi-nor"; + spi-rx-bus-width = <1>; + reg = <0>; + spi-max-frequency = <5000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + system1@0 { + label = "spi3-system1"; + reg = <0x0 0x0>; + }; + }; + }; +}; + +&fiux { + spix-mode; +}; + +&sdhci { + status = "okay"; +}; + +&udc0 { + status = "okay"; +}; + +&udc1 { + status = "okay"; +}; + +&udc2 { + status = "okay"; +}; + +&udc3 { + status = "okay"; +}; + +&udc4 { + status = "okay"; +}; + +&udc5 { + status = "okay"; +}; + +&udc6 { + status = "okay"; +}; + +&udc7 { + status = "okay"; +}; + +&mc { + status = "okay"; +}; + +&peci { + status = "okay"; +}; + +&rng { + status = "okay"; +}; + +&adc { + #io-channel-cells = <1>; + status = "okay"; +}; + &watchdog1 { status = "okay"; }; + +&pwm_fan { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pins &pwm1_pins + &pwm2_pins &pwm3_pins + &pwm4_pins &pwm5_pins + &pwm6_pins &pwm7_pins + &fanin0_pins &fanin1_pins + &fanin2_pins &fanin3_pins + &fanin4_pins &fanin5_pins + &fanin6_pins &fanin7_pins>; + #address-cells = <1>; + #size-cells = <0>; + fan@0 { + reg = <0x00>; + fan-tach-ch = /bits/ 8 <0x00 0x01>; + cooling-levels = <127 255>; + }; + fan@1 { + reg = <0x01>; + fan-tach-ch = /bits/ 8 <0x02 0x03>; + cooling-levels = <127 255>; + }; + fan@2 { + reg = <0x02>; + fan-tach-ch = /bits/ 8 <0x04 0x05>; + cooling-levels = <127 255>; + }; + fan@3 { + reg = <0x03>; + fan-tach-ch = /bits/ 8 <0x06 0x07>; + cooling-levels = <127 255>; + }; + fan@4 { + reg = <0x04>; + fan-tach-ch = /bits/ 8 <0x08 0x09>; + cooling-levels = <127 255>; + }; + fan@5 { + reg = <0x05>; + fan-tach-ch = /bits/ 8 <0x0A 0x0B>; + cooling-levels = <127 255>; + }; + fan@6 { + reg = <0x06>; + fan-tach-ch = /bits/ 8 <0x0C 0x0D>; + cooling-levels = <127 255>; + }; + fan@7 { + reg = <0x07>; + fan-tach-ch = /bits/ 8 <0x0E 0x0F>; + cooling-levels = <127 255>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + eeprom@50 { + compatible = "atmel,24c256"; + reg = <0x50>; + }; +}; + +&i2c2 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ipmb@10 { + compatible = "ipmb-dev"; + reg = <0x10>; + i2c-protocol; + }; +}; + +&i2c3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ipmb@11 { + compatible = "ipmb-dev"; + reg = <0x11>; + i2c-protocol; + }; +}; + +&i2c4 { + status = "okay"; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + tmp100@48 { + compatible = "tmp100"; + reg = <0x48>; + status = "okay"; + }; +}; + +&i2c7 { + status = "okay"; +}; + +&i2c8 { + status = "okay"; +}; + +&i2c9 { + status = "okay"; +}; + +&i2c10 { + status = "okay"; +}; + +&i2c11 { + status = "okay"; +}; + +&i2c12 { + status = "okay"; +}; + +&i2c13 { + status = "okay"; +}; + +&i2c14 { + status = "okay"; +}; + +&i2c15 { + status = "okay"; +}; + +&i2c16 { + status = "okay"; +}; + +&i2c17 { + status = "okay"; +}; + +&i2c18 { + status = "okay"; +}; + +&i2c19 { + status = "okay"; +}; + +&i2c20 { + status = "okay"; +}; + +&i2c21 { + status = "okay"; +}; + +&i2c22 { + status = "okay"; +}; + +&i2c23 { + status = "okay"; +}; + +&i2c24 { + status = "okay"; +}; + +&i2c25 { + status = "okay"; +}; + +&i2c26 { + status = "okay"; +}; -- 2.34.1