[PATCH 0/3] Add Emerald Rapids PECI support

[PATCH 0/3] Add Emerald Rapids PECI support

[Ivan Mikhaylov]

Add PECI Emerald Rapids support for CPU and hwmon interfaces. dimmtemp use
Sapphire's callbacks about reading thresholds because it's same
platform/socket.

Ivan Mikhaylov (3):
  peci: cpu: add Intel Emerald Rapids support
  hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support
  hwmon: (peci/cputemp) add Intel Emerald Rapids support

 drivers/hwmon/peci/cputemp.c  | 18 ++++++++++++++++++
 drivers/hwmon/peci/dimmtemp.c | 19 +++++++++++++++++++
 drivers/peci/cpu.c            |  4 ++++
 3 files changed, 41 insertions(+)

-- 
2.49.0

[PATCH 1/3] peci: cpu: add Intel Emerald Rapids support

[Ivan Mikhaylov]

Add support for detection of Intel Emerald Rapids processor based on
CPU model.

Emerald Rapids Xeon processors with the model set to
INTEL_EMERALDRAPIDS_X. The data field for this entry is "emr".

Tested the patch series with AST2600 BMC with 5S Intel Emerald Rapids
processors & verified by reading cpu & dimm temperature which matches
host sensor values from lmsensors.

Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
---
 drivers/peci/cpu.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c
index 2dac8ba82787..fbccc1d1b637 100644
--- a/drivers/peci/cpu.c
+++ b/drivers/peci/cpu.c
@@ -321,6 +321,10 @@ static const struct peci_device_id peci_cpu_device_ids[] = {
 		.x86_vfm = INTEL_SAPPHIRERAPIDS_X,
 		.data	= "spr",
 	},
+	{ /* Emerald Rapids Xeon */
+		.x86_vfm  = INTEL_EMERALDRAPIDS_X,
+		.data  = "emr",
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(peci, peci_cpu_device_ids);
-- 
2.49.0

[PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support

[Ivan Mikhaylov]

Extend the functionality of hwmon (peci/dimmtemp) for Emerald Rapids
platform.

The patch has been tested on a 5S system with 16 DIMMs installed.
Verified read of DIMM temperature thresholds & temperature.

Using Sapphire's callbacks about getting thresholds because it's same
platform/socket.

Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
---
 drivers/hwmon/peci/dimmtemp.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
index fbe82d9852e0..a281476c7a31 100644
--- a/drivers/hwmon/peci/dimmtemp.c
+++ b/drivers/hwmon/peci/dimmtemp.c
@@ -32,6 +32,8 @@
 #define DIMM_IDX_MAX_ON_ICXD	2
 #define CHAN_RANK_MAX_ON_SPR	8
 #define DIMM_IDX_MAX_ON_SPR	2
+#define CHAN_RANK_MAX_ON_EMR	8
+#define DIMM_IDX_MAX_ON_EMR	2
 
 #define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_HSX
 #define DIMM_IDX_MAX		DIMM_IDX_MAX_ON_HSX
@@ -571,6 +573,12 @@ read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
 	return 0;
 }
 
+static int read_thresholds_emr(struct peci_dimmtemp *priv, int dimm_order,
+			       int chan_rank, u32 *data)
+{
+	return read_thresholds_spr(priv, dimm_order, chan_rank, data);
+}
+
 static const struct dimm_info dimm_hsx = {
 	.chan_rank_max	= CHAN_RANK_MAX_ON_HSX,
 	.dimm_idx_max	= DIMM_IDX_MAX_ON_HSX,
@@ -620,6 +628,13 @@ static const struct dimm_info dimm_spr = {
 	.read_thresholds = &read_thresholds_spr,
 };
 
+static const struct dimm_info dimm_emr = {
+	.chan_rank_max  = CHAN_RANK_MAX_ON_EMR,
+	.dimm_idx_max  = DIMM_IDX_MAX_ON_EMR,
+	.min_peci_revision = 0x40,
+	.read_thresholds = &read_thresholds_emr,
+};
+
 static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
 	{
 		.name = "peci_cpu.dimmtemp.hsx",
@@ -649,6 +664,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
 		.name = "peci_cpu.dimmtemp.spr",
 		.driver_data = (kernel_ulong_t)&dimm_spr,
 	},
+	{
+		.name = "peci_cpu.dimmtemp.emr",
+		.driver_data = (kernel_ulong_t)&dimm_emr,
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);
-- 
2.49.0

[PATCH 3/3] hwmon: (peci/cputemp) add Intel Emerald Rapids support

[Ivan Mikhaylov]

Add support to read DTS for reading Intel Emerald Rapids platform.

Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
---
 drivers/hwmon/peci/cputemp.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c
index c7112dbf008b..b350c9a76894 100644
--- a/drivers/hwmon/peci/cputemp.c
+++ b/drivers/hwmon/peci/cputemp.c
@@ -364,6 +364,7 @@ static int init_core_mask(struct peci_cputemp *priv)
 	case INTEL_ICELAKE_X:
 	case INTEL_ICELAKE_D:
 	case INTEL_SAPPHIRERAPIDS_X:
+	case INTEL_EMERALDRAPIDS_X:
 		ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev,
 					     reg->func, reg->offset + 4, &data);
 		if (ret)
@@ -539,6 +540,13 @@ static struct resolved_cores_reg resolved_cores_reg_spr = {
 	.offset = 0x80,
 };
 
+static struct resolved_cores_reg resolved_cores_reg_emr = {
+	.bus = 31,
+	.dev = 30,
+	.func = 6,
+	.offset = 0x80,
+};
+
 static const struct cpu_info cpu_hsx = {
 	.reg		= &resolved_cores_reg_hsx,
 	.min_peci_revision = 0x33,
@@ -563,6 +571,12 @@ static const struct cpu_info cpu_spr = {
 	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,
 };
 
+static const struct cpu_info cpu_emr = {
+	.reg    = &resolved_cores_reg_emr,
+	.min_peci_revision = 0x40,
+	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,
+};
+
 static const struct auxiliary_device_id peci_cputemp_ids[] = {
 	{
 		.name = "peci_cpu.cputemp.hsx",
@@ -592,6 +606,10 @@ static const struct auxiliary_device_id peci_cputemp_ids[] = {
 		.name = "peci_cpu.cputemp.spr",
 		.driver_data = (kernel_ulong_t)&cpu_spr,
 	},
+	{
+		.name = "peci_cpu.cputemp.emr",
+		.driver_data = (kernel_ulong_t)&cpu_emr,
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids);
-- 
2.49.0

Re: [PATCH 1/3] peci: cpu: add Intel Emerald Rapids support

[Paul Menzel]

Dear Ivan,


Thank you for the patch.


Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
> Add support for detection of Intel Emerald Rapids processor based on
> CPU model.
> 
> Emerald Rapids Xeon processors with the model set to
> INTEL_EMERALDRAPIDS_X. The data field for this entry is "emr".
> 
> Tested the patch series with AST2600 BMC with 5S Intel Emerald Rapids
> processors & verified by reading cpu & dimm temperature which matches
> host sensor values from lmsensors.

Should you resend you could add the output.

> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> ---
>   drivers/peci/cpu.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/peci/cpu.c b/drivers/peci/cpu.c
> index 2dac8ba82787..fbccc1d1b637 100644
> --- a/drivers/peci/cpu.c
> +++ b/drivers/peci/cpu.c
> @@ -321,6 +321,10 @@ static const struct peci_device_id peci_cpu_device_ids[] = {
>   		.x86_vfm = INTEL_SAPPHIRERAPIDS_X,
>   		.data	= "spr",
>   	},
> +	{ /* Emerald Rapids Xeon */
> +		.x86_vfm  = INTEL_EMERALDRAPIDS_X,
> +		.data  = "emr",
> +	},
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(peci, peci_cpu_device_ids);

Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>


Kind regards,

Paul

Re: [PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support

[Paul Menzel]

Dear Ivan,


Thank you for your patch.

Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
> Extend the functionality of hwmon (peci/dimmtemp) for Emerald Rapids
> platform.
> 
> The patch has been tested on a 5S system with 16 DIMMs installed.

What is 5S? 5 sockets? (Probably not.)

> Verified read of DIMM temperature thresholds & temperature.

Also paste the output?

> Using Sapphire's callbacks about getting thresholds because it's same
> platform/socket.
> 
> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> ---
>   drivers/hwmon/peci/dimmtemp.c | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
> index fbe82d9852e0..a281476c7a31 100644
> --- a/drivers/hwmon/peci/dimmtemp.c
> +++ b/drivers/hwmon/peci/dimmtemp.c
> @@ -32,6 +32,8 @@
>   #define DIMM_IDX_MAX_ON_ICXD	2
>   #define CHAN_RANK_MAX_ON_SPR	8
>   #define DIMM_IDX_MAX_ON_SPR	2
> +#define CHAN_RANK_MAX_ON_EMR	8
> +#define DIMM_IDX_MAX_ON_EMR	2
>   
>   #define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_HSX
>   #define DIMM_IDX_MAX		DIMM_IDX_MAX_ON_HSX
> @@ -571,6 +573,12 @@ read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
>   	return 0;
>   }
>   
> +static int read_thresholds_emr(struct peci_dimmtemp *priv, int dimm_order,
> +			       int chan_rank, u32 *data)
> +{
> +	return read_thresholds_spr(priv, dimm_order, chan_rank, data);
> +}
> +
>   static const struct dimm_info dimm_hsx = {
>   	.chan_rank_max	= CHAN_RANK_MAX_ON_HSX,
>   	.dimm_idx_max	= DIMM_IDX_MAX_ON_HSX,
> @@ -620,6 +628,13 @@ static const struct dimm_info dimm_spr = {
>   	.read_thresholds = &read_thresholds_spr,
>   };
>   
> +static const struct dimm_info dimm_emr = {
> +	.chan_rank_max  = CHAN_RANK_MAX_ON_EMR,
> +	.dimm_idx_max  = DIMM_IDX_MAX_ON_EMR,
> +	.min_peci_revision = 0x40,
> +	.read_thresholds = &read_thresholds_emr,
> +};
> +
>   static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
>   	{
>   		.name = "peci_cpu.dimmtemp.hsx",
> @@ -649,6 +664,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
>   		.name = "peci_cpu.dimmtemp.spr",
>   		.driver_data = (kernel_ulong_t)&dimm_spr,
>   	},
> +	{
> +		.name = "peci_cpu.dimmtemp.emr",
> +		.driver_data = (kernel_ulong_t)&dimm_emr,
> +	},
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);

Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>


Kind regards,

Paul

Re: [PATCH 3/3] hwmon: (peci/cputemp) add Intel Emerald Rapids support

[Paul Menzel]

Dear Ivan,


Thank you for your patch.

Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
> Add support to read DTS for reading Intel Emerald Rapids platform.
> 
> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> ---
>   drivers/hwmon/peci/cputemp.c | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/hwmon/peci/cputemp.c b/drivers/hwmon/peci/cputemp.c
> index c7112dbf008b..b350c9a76894 100644
> --- a/drivers/hwmon/peci/cputemp.c
> +++ b/drivers/hwmon/peci/cputemp.c
> @@ -364,6 +364,7 @@ static int init_core_mask(struct peci_cputemp *priv)
>   	case INTEL_ICELAKE_X:
>   	case INTEL_ICELAKE_D:
>   	case INTEL_SAPPHIRERAPIDS_X:
> +	case INTEL_EMERALDRAPIDS_X:
>   		ret = peci_ep_pci_local_read(peci_dev, 0, reg->bus, reg->dev,
>   					     reg->func, reg->offset + 4, &data);
>   		if (ret)
> @@ -539,6 +540,13 @@ static struct resolved_cores_reg resolved_cores_reg_spr = {
>   	.offset = 0x80,
>   };
>   
> +static struct resolved_cores_reg resolved_cores_reg_emr = {
> +	.bus = 31,
> +	.dev = 30,
> +	.func = 6,
> +	.offset = 0x80,
> +};
> +
>   static const struct cpu_info cpu_hsx = {
>   	.reg		= &resolved_cores_reg_hsx,
>   	.min_peci_revision = 0x33,
> @@ -563,6 +571,12 @@ static const struct cpu_info cpu_spr = {
>   	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,
>   };
>   
> +static const struct cpu_info cpu_emr = {
> +	.reg    = &resolved_cores_reg_emr,

Only use one space before the =.

> +	.min_peci_revision = 0x40,
> +	.thermal_margin_to_millidegree = &dts_ten_dot_six_to_millidegree,
> +};
> +
>   static const struct auxiliary_device_id peci_cputemp_ids[] = {
>   	{
>   		.name = "peci_cpu.cputemp.hsx",
> @@ -592,6 +606,10 @@ static const struct auxiliary_device_id peci_cputemp_ids[] = {
>   		.name = "peci_cpu.cputemp.spr",
>   		.driver_data = (kernel_ulong_t)&cpu_spr,
>   	},
> +	{
> +		.name = "peci_cpu.cputemp.emr",
> +		.driver_data = (kernel_ulong_t)&cpu_emr,
> +	},
>   	{ }
>   };
>   MODULE_DEVICE_TABLE(auxiliary, peci_cputemp_ids);

Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>


Kind regards,

Paul

Re: [PATCH 1/3] peci: cpu: add Intel Emerald Rapids support

[Guenter Roeck]

On Tue, Oct 07, 2025 at 12:53:19AM +0300, Ivan Mikhaylov wrote:
> Add support for detection of Intel Emerald Rapids processor based on
> CPU model.
> 
> Emerald Rapids Xeon processors with the model set to
> INTEL_EMERALDRAPIDS_X. The data field for this entry is "emr".
> 
> Tested the patch series with AST2600 BMC with 5S Intel Emerald Rapids
> processors & verified by reading cpu & dimm temperature which matches
> host sensor values from lmsensors.
> 
> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>

Applied to hwmon-next.

Thanks,
Guenter

Re: [PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support

[Guenter Roeck]

On Tue, Oct 07, 2025 at 12:53:20AM +0300, Ivan Mikhaylov wrote:
> Extend the functionality of hwmon (peci/dimmtemp) for Emerald Rapids
> platform.
> 
> The patch has been tested on a 5S system with 16 DIMMs installed.
> Verified read of DIMM temperature thresholds & temperature.
> 
> Using Sapphire's callbacks about getting thresholds because it's same
> platform/socket.
> 
> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>

Applied to hwmon-next.

Thanks,
Guenter

Re: [PATCH 3/3] hwmon: (peci/cputemp) add Intel Emerald Rapids support

[Guenter Roeck]

On Tue, Oct 07, 2025 at 12:53:21AM +0300, Ivan Mikhaylov wrote:
> Add support to read DTS for reading Intel Emerald Rapids platform.
> 
> Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>

Applied to hwmon-next.

Thanks,
Guenter

Re: [PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support

[Ivan Mikhaylov]

On Tue, 2025-10-07 at 10:26 +0200, Paul Menzel wrote:
> Dear Ivan,
> 
> 
> Thank you for your patch.
> 
> Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
> > Extend the functionality of hwmon (peci/dimmtemp) for Emerald
> > Rapids
> > platform.
> > 
> > The patch has been tested on a 5S system with 16 DIMMs installed.
> 
> What is 5S? 5 sockets? (Probably not.)

Paul, thank your for review and sorry for late reply.
5S - Intel 5 Series/5th Gen

> 
> > Verified read of DIMM temperature thresholds & temperature.
> 
> Also paste the output?
> 

root@bmc:/sys/bus/peci# ls -l devices/0-30/
lrwxrwxrwx    1 root     root             0 Oct 13 10:51 driver ->
../../../../../../../bus/peci/drivers/peci-cpu
drwxr-xr-x    4 root     root             0 Oct 13 10:51
peci_cpu.cputemp.emr.48
drwxr-xr-x    4 root     root             0 Oct 13 10:51
peci_cpu.dimmtemp.emr.48
drwxr-xr-x    2 root     root             0 Oct 13 10:51 power
--w-------    1 root     root          4096 Oct 13 10:51 remove
lrwxrwxrwx    1 root     root             0 Oct 13 10:51 subsystem ->
../../../../../../../bus/peci
-rw-r--r--    1 root     root          4096 Oct 13 10:51 uevent
root@bmc:/sys/bus/peci# ls -l devices/0-31/
lrwxrwxrwx    1 root     root             0 Oct 13 10:51 driver ->
../../../../../../../bus/peci/drivers/peci-cpu
drwxr-xr-x    4 root     root             0 Oct 13 10:51
peci_cpu.cputemp.emr.49
drwxr-xr-x    4 root     root             0 Oct 13 10:51
peci_cpu.dimmtemp.emr.49
drwxr-xr-x    2 root     root             0 Oct 13 10:51 power
--w-------    1 root     root          4096 Oct 13 10:51 remove
lrwxrwxrwx    1 root     root             0 Oct 13 10:51 subsystem ->
../../../../../../../bus/peci
-rw-r--r--    1 root     root          4096 Oct 13 10:51 uevent

root@bmc:/sys/class/hwmon/hwmon3# ls
device        of_node       subsystem     temp11_input  temp11_max   
temp13_input  temp13_max    temp15_input  temp15_max    temp1_input  
temp1_max     temp3_input   temp3_max     temp5_input   temp5_max    
temp7_input   temp7_max     temp9_input   temp9_max
name          power         temp11_crit   temp11_label  temp13_crit  
temp13_label  temp15_crit   temp15_label  temp1_crit    temp1_label  
temp3_crit    temp3_label   temp5_crit    temp5_label   temp7_crit   
temp7_label   temp9_crit    temp9_label   uevent

root@bmc:/sys/class/hwmon/hwmon5# ls
device        of_node       subsystem     temp11_input  temp11_max   
temp13_input  temp13_max    temp15_input  temp15_max    temp1_input  
temp1_max     temp3_input   temp3_max     temp5_input   temp5_max    
temp7_input   temp7_max     temp9_input   temp9_max
name          power         temp11_crit   temp11_label  temp13_crit  
temp13_label  temp15_crit   temp15_label  temp1_crit    temp1_label  
temp3_crit    temp3_label   temp5_crit    temp5_label   temp7_crit   
temp7_label   temp9_crit    temp9_label   uevent

root@bmc:/sys/class/hwmon/hwmon3# cat temp*
95000
35000
DIMM F1
93000
95000
35000
DIMM G1
93000
95000
34000
DIMM H1
93000
95000
35000
DIMM A1
93000
95000
36000
DIMM B1
93000
95000
36000
DIMM C1
93000
95000
36000
DIMM D1
93000
95000
36000

root@bmc:/sys/class/hwmon/hwmon5# cat temp*
95000
34000
DIMM F1
93000
95000
34000
DIMM G1
93000
95000
35000
DIMM H1
93000
95000
36000
DIMM A1
93000
95000
35000
DIMM B1
93000
95000
35000
DIMM C1
93000
95000
35000
DIMM D1
93000
95000
35000
DIMM E1
93000

Values around ~35 is temp*_input and thresholds as 93,95 for max and
crit temepratures plus temp*_label.

Guenter, I saw that you already applied other two patches, need I
resubmit series with updated info of commit for this one or just this
one?
> 

Re: [PATCH 2/3] hwmon: (peci/dimmtemp) add Intel Emerald Rapids platform support

[Guenter Roeck]

On 10/13/25 04:44, Ivan Mikhaylov wrote:
> On Tue, 2025-10-07 at 10:26 +0200, Paul Menzel wrote:
>> Dear Ivan,
>>
>>
>> Thank you for your patch.
>>
>> Am 06.10.25 um 23:53 schrieb Ivan Mikhaylov:
>>> Extend the functionality of hwmon (peci/dimmtemp) for Emerald
>>> Rapids
>>> platform.
>>>
>>> The patch has been tested on a 5S system with 16 DIMMs installed.
>>
>> What is 5S? 5 sockets? (Probably not.)
> 
> Paul, thank your for review and sorry for late reply.
> 5S - Intel 5 Series/5th Gen
> 
>>
>>> Verified read of DIMM temperature thresholds & temperature.
>>
>> Also paste the output?
>>
...
> Guenter, I saw that you already applied other two patches, need I
> resubmit series with updated info of commit for this one or just this
> one?

No. While that information is valuable as comment, I don't see value
of having it in the commit log.

Guenter