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Tue, 10 Feb 2026 05:38:56 -0800 (PST) From: Tomer Maimon To: andrew@codeconstruct.com.au, avifishman70@gmail.com, tali.perry1@gmail.com, wim@linux-watchdog.org, linux@roeck-us.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: venture@google.com, yuenn@google.com, benjaminfair@google.com, joel@jms.id.au, openbmc@lists.ozlabs.org, linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tomer Maimon Subject: [PATCH v1 1/2] dt-bindings: watchdog: Add NPCM reset status support Date: Tue, 10 Feb 2026 15:38:42 +0200 Message-Id: <20260210133843.1078463-2-tmaimon77@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260210133843.1078463-1-tmaimon77@gmail.com> References: <20260210133843.1078463-1-tmaimon77@gmail.com> X-Mailing-List: openbmc@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add reset status detection for NPCM7XX and NPCM8XX platforms via syscon integration. Document syscon property and three configurable reset type properties (nuvoton,card-reset-type, nuvoton,ext1-reset-type, nuvoton,ext2-reset-type)that map reset signal detection to specific reset bit positions. Signed-off-by: Tomer Maimon --- .../watchdog/nuvoton,npcm750-wdt.yaml | 51 ++++++++++++++++++- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml index 7aa30f5b5c49..054cc0115af2 100644 --- a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm750-wdt.yaml @@ -12,7 +12,7 @@ maintainers: description: Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog. The watchdog supports a pre-timeout interrupt that fires 10ms before the - expiry. + expiry and reset status detection via syscon integration. allOf: - $ref: watchdog.yaml# @@ -40,12 +40,55 @@ properties: clock-frequency: description: Frequency in Hz of the clock that drives the NPCM timer. + syscon: + description: phandle to the Global Control Register (GCR) syscon node. + $ref: /schemas/types.yaml#/definitions/phandle + + nuvoton,card-reset-type: + description: Reset type for external card reset signal detection. + enum: + - porst + - corst + - wd0 + - wd1 + - wd2 + - sw1 + - sw2 + - sw3 + - sw4 + + nuvoton,ext1-reset-type: + description: Reset type for external reset signal 1 detection. + enum: + - porst + - corst + - wd0 + - wd1 + - wd2 + - sw1 + - sw2 + - sw3 + - sw4 + + nuvoton,ext2-reset-type: + description: Reset type for external reset signal 2 detection. + enum: + - porst + - corst + - wd0 + - wd1 + - wd2 + - sw1 + - sw2 + - sw3 + - sw4 + required: - compatible - reg - interrupts -unevaluatedProperties: false +additionalProperties: false examples: - | @@ -57,4 +100,8 @@ examples: interrupts = ; reg = <0xf000801c 0x4>; clocks = <&clk NPCM7XX_CLK_TIMER>; + syscon = <&gcr>; + nuvoton,card-reset-type = "porst"; + nuvoton,ext1-reset-type = "wd0"; + nuvoton,ext2-reset-type = "wd2"; }; -- 2.34.1