From: Jacky Huang <jackyhuang@nvidia.com>
To: <openbmc@lists.ozlabs.org>
Cc: <andrew@codeconstruct.com.au>, <joel@jms.id.au>,
Jacky Huang <jackyhuang@nvidia.com>
Subject: [PATCH u-boot] ARM: dts: aspeed: Add Nvidia VR-NVL BMC
Date: Thu, 25 Jun 2026 02:20:52 +0900 [thread overview]
Message-ID: <20260624172052.752986-1-jackyhuang@nvidia.com> (raw)
Adds a dts for the NVIDIA VR-NVL BMC board, an AST2600-based BMC for
the Vera Rubin NVL platform.
MAC0 uses phy-mode = "rgmii-id" with no SoC-side clk-delay node, so it
relies on the zero default introduced by commit 3f6198c0db1c ("clk:
ast2600: set default clk-delay for all ethernet macs to 0"). With that
change in place, MAC0 brings up its MDIO bus and establishes a link
with the on-board PHY.
Signed-off-by: Jacky Huang <jackyhuang@nvidia.com>
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-vr-bmc-nvidia.dts | 222 +++++++++++++++++++++++++
2 files changed, 223 insertions(+)
create mode 100644 arch/arm/dts/ast2600-vr-bmc-nvidia.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fa6837be74..4db765dd83 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-fpga.dtb \
ast2600-gb200nvl-bmc-nvidia.dtb \
ast2600-msx4-bmc-nvidia.dtb \
+ ast2600-vr-bmc-nvidia.dtb \
ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-intel.dtb \
diff --git a/arch/arm/dts/ast2600-vr-bmc-nvidia.dts b/arch/arm/dts/ast2600-vr-bmc-nvidia.dts
new file mode 100644
index 0000000000..f8856b1e59
--- /dev/null
+++ b/arch/arm/dts/ast2600-vr-bmc-nvidia.dts
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "AST2600 VR-NVL BMC";
+ compatible = "nvidia,vr-nvl-bmc", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ mmc0 = &emmc_slot0;
+ mmc1 = &sdhci_slot0;
+ mmc2 = &sdhci_slot1;
+ spi0 = &fmc;
+ spi1 = &spi1;
+ spi2 = &spi2;
+ ethernet0 = &mac0;
+ ethernet1 = &mac1;
+ ethernet2 = &mac2;
+ ethernet3 = &mac3;
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <800000000>;
+ };
+ cpu@1 {
+ clock-frequency = <800000000>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <400000000>;
+ aspeed,ecc-enabled;
+ aspeed,ecc-size-mb = <0>;
+};
+
+&wdt1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
+
+&wdt3 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1_default>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <ðphy0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@2 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
+ &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
+ &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
+
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "disabled";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&spi2 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
+ &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
+ num-cs = <1>;
+ flash@0 {
+ compatible = "spi-flash", "sst,w25q256";
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&i2c4 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c5_default>;
+};
+
+&i2c5 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6_default>;
+};
+
+&i2c6 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c7_default>;
+};
+
+&i2c7 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
+};
+
+&i2c8 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
+};
+
+&i2c10 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c11_default>;
+};
+
+&pcie_phy1 {
+ status = "okay";
+};
+
+&pcie_bridge {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hace {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&acry {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&display_port {
+ status = "okay";
+};
--
2.43.0
next reply other threads:[~2026-06-24 23:43 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-24 17:20 Jacky Huang [this message]
2026-06-25 8:37 ` [PATCH u-boot] ARM: dts: aspeed: Add Nvidia VR-NVL BMC Tan Siewert
2026-06-27 18:20 ` Jacky Huang (Engrg-Hardware 3)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260624172052.752986-1-jackyhuang@nvidia.com \
--to=jackyhuang@nvidia.com \
--cc=andrew@codeconstruct.com.au \
--cc=joel@jms.id.au \
--cc=openbmc@lists.ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox