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Wed, 16 Sep 2026 02:28:01 -0700 (PDT) From: Triet Hoang To: andrew@codeconstruct.com.au, avifishman70@gmail.com, tmaimon77@gmail.com, tali.perry1@gmail.com, wim@linux-watchdog.org, linux@roeck-us.net Cc: venture@google.com, yuenn@google.com, benjaminfair@google.com, joel@jms.id.au, openbmc@lists.ozlabs.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Triet Hoang Subject: [PATCH] watchdog: npcm: Propagate errors from clock enable Date: Wed, 16 Sep 2026 16:27:53 +0700 Message-ID: <20260916092753.187583-1-triet.hoang.dev@gmail.com> X-Mailer: git-send-email 2.53.0 X-Mailing-List: openbmc@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Check and propagate errors returned by clk_prepare_enable() when starting or restarting the watchdog. Also propagate errors from npcm_wdt_start() through npcm_wdt_set_timeout() and probe. This prevents the driver from silently continuing when the watchdog clock cannot be enabled. Fixes: 975b7f0fe669 ("watchdog: Add Nuvoton NPCM watchdog driver") Signed-off-by: Triet Hoang --- drivers/watchdog/npcm_wdt.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/watchdog/npcm_wdt.c b/drivers/watchdog/npcm_wdt.c index 51348969bf49..0976a580b9f2 100644 --- a/drivers/watchdog/npcm_wdt.c +++ b/drivers/watchdog/npcm_wdt.c @@ -149,8 +149,11 @@ static int npcm_wdt_start(struct watchdog_device *wdd) { struct npcm_wdt *wdt = to_npcm_wdt(wdd); u32 val; + int err; - clk_prepare_enable(wdt->clk); + err = clk_prepare_enable(wdt->clk); + if (err) + return err; if (wdd->timeout < 2) val = 0x800; @@ -216,7 +219,7 @@ static int npcm_wdt_set_timeout(struct watchdog_device *wdd, wdd->timeout = 2750; if (watchdog_active(wdd)) - npcm_wdt_start(wdd); + return npcm_wdt_start(wdd); return 0; } @@ -234,9 +237,12 @@ static int npcm_wdt_restart(struct watchdog_device *wdd, unsigned long action, void *data) { struct npcm_wdt *wdt = to_npcm_wdt(wdd); + int err; /* For reset, we start the WDT clock and leave it running. */ - clk_prepare_enable(wdt->clk); + err = clk_prepare_enable(wdt->clk); + if (err) + return err; writel(NPCM_WTR | NPCM_WTRE | NPCM_WTE, wdt->reg); udelay(1000); @@ -428,13 +434,18 @@ static int npcm_wdt_probe(struct platform_device *pdev) watchdog_init_timeout(&wdt->wdd, 0, dev); /* Ensure timeout is able to be represented by the hardware */ - npcm_wdt_set_timeout(&wdt->wdd, wdt->wdd.timeout); + ret = npcm_wdt_set_timeout(&wdt->wdd, wdt->wdd.timeout); + if (ret) + return ret; npcm_get_reset_status(wdt, dev, data, start); if (npcm_is_running(&wdt->wdd)) { /* Restart with the default or device-tree specified timeout */ - npcm_wdt_start(&wdt->wdd); + ret = npcm_wdt_start(&wdt->wdd); + if (ret) + return ret; + set_bit(WDOG_HW_RUNNING, &wdt->wdd.status); } -- 2.53.0