From: Donald Shannon <donalds@nvidia.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
joel@jms.id.au, andrew@codeconstruct.com.au,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
openbmc@lists.ozlabs.org, etanous@nvidia.com
Subject: Re: [PATCH v3 2/2] ARM: dts: aspeed: Add NVIDIA VR144NVL board
Date: Wed, 10 Sep 2025 09:14:55 -0700 [thread overview]
Message-ID: <29ab5e2d-2b76-477c-a4fa-39de622544bc@nvidia.com> (raw)
In-Reply-To: <3114a51c-47a2-4b67-8965-33841ee87fd5@lunn.ch>
On 9/10/25 05:56, Andrew Lunn wrote:
>> Changes v2 -> v3:
>> - Removed unused phy-mode property from mac0
>> +&mac0 {
>> + pinctrl-names = "default";
>> + phy-handle = <ðphy0>;
>> + pinctrl-0 = <&pinctrl_rgmii1_default>;
>> + status = "okay";
>> +};
> Oh, fun.
>
> Please don't do that. At some point Aspeed it going to clean up the
> mess they made with RGMII delays. And at that point, it is very likely
> your board will mysteriously break, if nobody remembers it is doing
> something probably no other board does.
>
> Andrew
Hi Andrew,
I will add it back in. Our board phy has tx and rx delays.
Don
prev parent reply other threads:[~2025-09-10 16:15 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 4:05 [PATCH v3 0/2] Add NVIDIA VR144NVL board Donald Shannon
2025-09-10 4:06 ` [PATCH v3 1/2] dt-bindings: arm: aspeed: " Donald Shannon
2025-09-10 4:06 ` [PATCH v3 2/2] ARM: dts: " Donald Shannon
2025-09-10 12:56 ` Andrew Lunn
2025-09-10 16:14 ` Donald Shannon [this message]
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