From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7DB2C87FCA for ; Tue, 29 Jul 2025 12:19:31 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.29580.1753057958724188929 for ; Sun, 20 Jul 2025 17:32:38 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=XdcfoYAM; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: robh@kernel.org) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 384865C4C43; Mon, 21 Jul 2025 00:26:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 56CF0C4CEE7; Mon, 21 Jul 2025 00:26:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1753057594; bh=2jXD6fV2pi4XdodBU4IjziGtCooOyqc6QbykipInwFo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=XdcfoYAMJGyOpwexECJfGYYaLJpKEJYaYhR7Ve456pp1Mu/xlx0GKy77EaNihR0qP bbNTuZ8BdR8SrB7V52lvnWlaWytC0BjVLaKfuxfcrSlflGZfDVJ6uQjJDyfd26XiJi fMa6nsR62qdGsIU+RMMsX1MTLVFKYZXHrT8eF36Hyv0351dK7+Nd14tTw0KWxznmaW Hy0UXyrAlM0GzSVNTcvup5NX/GBBqXfVt77RpIkmxeK52AdeepglwFzNzr+f3/QPAW XC89vjEWEpVDy8wdkBiDimVW/g9fiPtALjYmQYNvSslUw06gfM2CWvRgQtzjWaELm7 OKLrf9nnyB8Qw== Date: Sun, 20 Jul 2025 19:26:33 -0500 From: Rob Herring To: Macpaul Lin Cc: Alim Akhtar , Avri Altman , Bart Van Assche , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Peter Wang , Stanley Jhu , "James E . J . Bottomley" , "Martin K . Petersen" , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, openembedded-core@lists.openembedded.org, patches@lists.linux.dev, stable@vger.kernel.org, Bear Wang , Pablo Sun , Ramax Lo , Macpaul Lin , MediaTek Chromebook Upstream Subject: Re: [PATCH 2/3] dt-bindings: ufs: mediatek,ufs: add MT8195 compatible and update clock nodes Message-ID: <20250721002633.GA3083612-robh@kernel.org> References: <20250718082719.653228-1-macpaul.lin@mediatek.com> <20250718082719.653228-2-macpaul.lin@mediatek.com> MIME-Version: 1.0 In-Reply-To: <20250718082719.653228-2-macpaul.lin@mediatek.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline List-Id: X-Webhook-Received: from li982-79.members.linode.com [45.33.32.79] by aws-us-west-2-korg-lkml-1.web.codeaurora.org with HTTPS for ; Tue, 29 Jul 2025 12:19:31 -0000 X-Groupsio-URL: https://lists.openembedded.org/g/openembedded-core/message/221068 On Fri, Jul 18, 2025 at 04:27:17PM +0800, Macpaul Lin wrote: > Add 'mediatek,mt8195-ufshci' to compatible list. > Update clocks and clock-names constraints to allow one to eight entries. > Introduce 'mediatek,ufs-disable-mcq' property to disable > MCQ (Multi-Circular Queue). Update conditional schema for mt8195 > requiring eight 'clocks' and eight 'clock-names'. Don't just describe the diff, we can read it. Describe why you are making the changes. How is the new h/w different (or the same). > > Signed-off-by: Macpaul Lin > --- > .../devicetree/bindings/ufs/mediatek,ufs.yaml | 49 ++++++++++++++++--- > 1 file changed, 43 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml > index 32fd535a514a..9d6bcf735920 100644 > --- a/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml > +++ b/Documentation/devicetree/bindings/ufs/mediatek,ufs.yaml > @@ -9,21 +9,20 @@ title: Mediatek Universal Flash Storage (UFS) Controller > maintainers: > - Stanley Chu > > -allOf: > - - $ref: ufs-common.yaml > - > properties: > compatible: > enum: > - mediatek,mt8183-ufshci > - mediatek,mt8192-ufshci > + - mediatek,mt8195-ufshci > > clocks: > - maxItems: 1 > + minItems: 1 > + maxItems: 8 > > clock-names: > - items: > - - const: ufs > + minItems: 1 > + maxItems: 8 > > phys: > maxItems: 1 > @@ -33,6 +32,11 @@ properties: > > vcc-supply: true > > + mediatek,ufs-disable-mcq: > + $ref: /schemas/types.yaml#/definitions/flag > + description: The mask to disable MCQ (Multi-Circular Queue) for UFS host. > + type: boolean Seems this was undocumented, but already in use. That should be a separate patch. > + > required: > - compatible > - clocks > @@ -43,6 +47,39 @@ required: > > unevaluatedProperties: false > > +allOf: > + - $ref: ufs-common.yaml > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - mediatek,mt8195-ufshci > + then: > + properties: > + clocks: > + minItems: 8 > + maxItems: 8 > + clock-names: > + items: > + - const: ufs > + - const: ufs_aes > + - const: ufs_tick > + - const: unipro_sysclk > + - const: unipro_tick > + - const: unipro_mp_bclk > + - const: ufs_tx_symbol > + - const: ufs_mem_sub > + else: > + properties: > + clocks: > + minItems: 1 1 is already the minimum. Drop. > + maxItems: 1 > + clock-names: > + items: > + - const: ufs > + > examples: > - | > #include > -- > 2.45.2 >