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From: "Khem Raj" <raj.khem@gmail.com>
To: Ross Burton <ross@burtonini.com>
Cc: OE-core <openembedded-core@lists.openembedded.org>
Subject: Re: [OE-core] [PATCH] riscv: Add configure cache entries for libidl
Date: Tue, 21 Sep 2021 13:19:33 -0700	[thread overview]
Message-ID: <3403acbe-e902-e983-4a6a-08fe700be4fa@gmail.com> (raw)
In-Reply-To: <CAMKF1so96B-gVjQ=BEJCio2mJJSZoo5kyyxCDyswgUVbJxhcMA@mail.gmail.com>



On 9/21/21 12:05 PM, Khem Raj wrote:
> 
> 
> On Tue, Sep 21, 2021 at 11:16 AM Ross Burton <ross@burtonini.com 
> <mailto:ross@burtonini.com>> wrote:
> 
>     libidl was removed long ago, along with ORBit.  Can we just drop
>     these entirely?
> 
> 
> Check layer index if it does not appear there then I am fine with 
> dropping it entirely

I dont see this recipe on layer index so I think it should be safe to 
delete these cached vars. I will send a v2 to remove it from other site 
files too.

> 
> 
> 
>     Ross
> 
>     On Tue, 21 Sept 2021 at 18:02, Khem Raj <raj.khem@gmail.com
>     <mailto:raj.khem@gmail.com>> wrote:
>      >
>      > These were hidden in meta-networking
>      >
>      > Signed-off-by: Khem Raj <raj.khem@gmail.com
>     <mailto:raj.khem@gmail.com>>
>      > ---
>      >  meta/site/riscv32-linux | 3 +++
>      >  meta/site/riscv64-linux | 3 +++
>      >  2 files changed, 6 insertions(+)
>      >
>      > diff --git a/meta/site/riscv32-linux b/meta/site/riscv32-linux
>      > index 97de628e22..acc32fd03c 100644
>      > --- a/meta/site/riscv32-linux
>      > +++ b/meta/site/riscv32-linux
>      > @@ -9,3 +9,6 @@ glib_cv_uscore=${glib_cv_uscore=no}
>      >
>      >  # startup-notification
>      >  lf_cv_sane_realloc=${lf_cv_sane_realloc=yes}
>      > +
>      > +# libidl
>      > +libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll}
>      > diff --git a/meta/site/riscv64-linux b/meta/site/riscv64-linux
>      > index 38bc5f044d..cf78133ee0 100644
>      > --- a/meta/site/riscv64-linux
>      > +++ b/meta/site/riscv64-linux
>      > @@ -9,3 +9,6 @@ glib_cv_uscore=${glib_cv_uscore=no}
>      >
>      >  # startup-notification
>      >  lf_cv_sane_realloc=${lf_cv_sane_realloc=yes}
>      > +
>      > +# libidl
>      > +libIDL_cv_long_long_format=${libIDL_cv_long_long_format=ll}
>      > --
>      > 2.33.0
>      >
>      >
>      > 
>      >
> 

      reply	other threads:[~2021-09-21 20:19 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21 17:02 [PATCH] riscv: Add configure cache entries for libidl Khem Raj
2021-09-21 18:16 ` [OE-core] " Ross Burton
2021-09-21 19:05   ` Khem Raj
2021-09-21 20:19     ` Khem Raj [this message]

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