From: Khem Raj <raj.khem@gmail.com>
To: openembedded-core@lists.openembedded.org
Subject: [PATCH 00/10] Add foundation for riscv architecture
Date: Thu, 5 Oct 2017 17:50:36 -0700 [thread overview]
Message-ID: <cover.1507250774.git.raj.khem@gmail.com> (raw)
riscv is new cool kid in town. This pull request enables
base infrastructure to support riscv32 and riscv64 profiles
full architecture and qemu port is in meta-riscv
https://github.com/kraj/meta-riscv
These changes are being rapidly upstreamed, eventually we
might have a very thin layer
The following changes since commit abf2e9526a11bcb51b71b90a7b76bd33af656494:
systemd-serialtty: allow empty package (2017-09-26 11:07:36 +0100)
are available in the git repository at:
git://git.openembedded.org/openembedded-core-contrib kraj/riscv
http://cgit.openembedded.org/openembedded-core-contrib/log/?h=kraj/riscv
Khem Raj (10):
site: Add riscv32 and riscv64
insane: Add entries for riscv 32bit/64bit
siteinfo: Define data for riscv32 and riscv64
kernel-arch.bbclass: Add riscv to kernel arch map
runqemu: Add riscv support for qemu machines
binutils: Convert SRC_URI and SRCREV to weak defines
gcc: Backport fix for a segfault on riscv
gcc-runtime: Disable libitm on riscv
elfutils: Fix missing library on linker cmdline
openssl: Add support for riscv32/riscv64
meta/classes/insane.bbclass | 4 ++
meta/classes/kernel-arch.bbclass | 3 +-
meta/classes/siteinfo.bbclass | 6 +++
meta/recipes-connectivity/openssl/openssl10.inc | 6 +++
.../recipes-connectivity/openssl/openssl_1.1.0f.bb | 6 +++
meta/recipes-devtools/binutils/binutils-2.29.inc | 5 ++-
meta/recipes-devtools/elfutils/elfutils_0.170.bb | 1 +
...0001-libasm-may-link-with-libbz2-if-found.patch | 39 +++++++++++++++++
meta/recipes-devtools/gcc/gcc-7.2.inc | 1 +
...le-non-legitimate-address-in-riscv_legiti.patch | 50 ++++++++++++++++++++++
meta/recipes-devtools/gcc/gcc-runtime.inc | 2 +
meta/site/riscv32-linux | 4 ++
meta/site/riscv64-linux | 4 ++
scripts/runqemu | 4 ++
14 files changed, 132 insertions(+), 3 deletions(-)
create mode 100644 meta/recipes-devtools/elfutils/files/0001-libasm-may-link-with-libbz2-if-found.patch
create mode 100644 meta/recipes-devtools/gcc/gcc-7.2/0050-RISC-V-Handle-non-legitimate-address-in-riscv_legiti.patch
create mode 100644 meta/site/riscv32-linux
create mode 100644 meta/site/riscv64-linux
--
2.14.2
next reply other threads:[~2017-10-06 0:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-06 0:50 Khem Raj [this message]
2017-10-06 0:50 ` [PATCH 01/10] site: Add riscv32 and riscv64 Khem Raj
2017-10-06 0:50 ` [PATCH 02/10] insane: Add entries for riscv 32bit/64bit Khem Raj
2017-10-06 0:50 ` [PATCH 03/10] siteinfo: Define data for riscv32 and riscv64 Khem Raj
2017-10-06 0:50 ` [PATCH 04/10] kernel-arch.bbclass: Add riscv to kernel arch map Khem Raj
2017-10-06 0:50 ` [PATCH 05/10] runqemu: Add riscv support for qemu machines Khem Raj
2017-10-06 0:50 ` [PATCH 06/10] binutils: Convert SRC_URI and SRCREV to weak defines Khem Raj
2017-10-06 10:22 ` Burton, Ross
2017-10-06 13:23 ` Khem Raj
2017-10-06 0:50 ` [PATCH 07/10] gcc: Backport fix for a segfault on riscv Khem Raj
2017-10-06 0:50 ` [PATCH 08/10] gcc-runtime: Disable libitm " Khem Raj
2017-10-06 0:50 ` [PATCH 09/10] elfutils: Fix missing library on linker cmdline Khem Raj
2017-10-06 0:50 ` [PATCH 10/10] openssl: Add support for riscv32/riscv64 Khem Raj
2017-10-06 1:00 ` ✗ patchtest: failure for Add foundation for riscv architecture Patchwork
2017-10-15 20:36 ` [PATCH 00/10] " Trevor Woerner
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