From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v2 5/5] or1k: only force reg for immediates
Date: Wed, 3 Jul 2019 12:33:51 +0900 [thread overview]
Message-ID: <20190703033351.11924-6-shorne@gmail.com> (raw)
In-Reply-To: <20190703033351.11924-1-shorne@gmail.com>
The force_reg in or1k_expand_compare is hard coded for SImode, which is fine as
this used to only be used on SI expands. However, with FP support this will
cause issues. In general we should only force the right hand operand to a
register if its an immediate. This patch adds an condition to check for that.
gcc/ChangeLog:
* config/or1k/or1k.c (or1k_expand_compare): Check for int before
force_reg.
---
Changes since v1:
- none
gcc/config/or1k/or1k.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/gcc/config/or1k/or1k.c b/gcc/config/or1k/or1k.c
index d90826b75ca..e4aff83cec7 100644
--- a/gcc/config/or1k/or1k.c
+++ b/gcc/config/or1k/or1k.c
@@ -1446,13 +1446,15 @@ void
or1k_expand_compare (rtx *operands)
{
rtx sr_f = gen_rtx_REG (BImode, SR_F_REGNUM);
+ rtx righthand_op = XEXP (operands[0], 1);
rtx_code cmp_code = GET_CODE (operands[0]);
bool flag_check_ne = true;
- /* The RTL may receive an immediate in argument 1 of the compare, this is not
- supported unless we have l.sf*i instructions, force them into registers. */
- if (!TARGET_SFIMM)
- XEXP (operands[0], 1) = force_reg (SImode, XEXP (operands[0], 1));
+ /* Integer RTL may receive an immediate in argument 1 of the compare, this is
+ not supported unless we have l.sf*i instructions, force them into
+ registers. */
+ if (!TARGET_SFIMM && CONST_INT_P (righthand_op))
+ XEXP (operands[0], 1) = force_reg (SImode, righthand_op);
/* Normalize comparison operators to ones OpenRISC support. */
switch (cmp_code)
--
2.21.0
prev parent reply other threads:[~2019-07-03 3:33 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-03 3:33 [OpenRISC] [PATCH v2 0/5] OpenRISC updates for 10 (fpu, fixes) Stafford Horne
2019-07-03 3:33 ` [OpenRISC] [PATCH v2 1/5] or1k: Fix code quality for volatile memory loads Stafford Horne
2019-07-03 3:33 ` [OpenRISC] [PATCH v2 2/5] or1k: Fix issues with msoft-div Stafford Horne
2019-07-03 3:33 ` [OpenRISC] [PATCH v2 3/5] or1k: Add mrori option, fix option docs Stafford Horne
2019-07-03 14:49 ` Segher Boessenkool
2019-07-03 21:49 ` Stafford Horne
2019-07-03 22:26 ` Segher Boessenkool
2019-07-03 22:39 ` Stafford Horne
2019-07-03 3:33 ` [OpenRISC] [PATCH v2 4/5] or1k: Initial support for FPU Stafford Horne
2019-07-03 15:43 ` Segher Boessenkool
2019-07-03 19:09 ` Richard Henderson
2019-07-03 22:19 ` Stafford Horne
2019-07-03 22:35 ` Segher Boessenkool
2019-07-03 22:09 ` Stafford Horne
2019-07-03 3:33 ` Stafford Horne [this message]
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