* [OpenRISC] [PATCH 1/2] or1k: dts: Fix ethoc network configuration in or1ksim devicetree [not found] <20190831030348.6920-1-shorne@gmail.com> @ 2019-08-31 3:03 ` Stafford Horne 2019-08-31 3:03 ` [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree Stafford Horne 1 sibling, 0 replies; 3+ messages in thread From: Stafford Horne @ 2019-08-31 3:03 UTC (permalink / raw) To: openrisc This fixes several issues with the ethoc network device config. Fisrt off, the compatible property used an obsolete compatibility string; this caused the initialization to be skipped. Next, the register map was not given enough space to allocate ring descriptors, this caused module initialization to abort. Finally, we need to mark this device as big-endian as needed by openrisc. This was tested by me in qemu, the setup is documented on the qemu wiki: https://wiki.qemu.org/Documentation/Platforms/OpenRISC Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/boot/dts/or1ksim.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/openrisc/boot/dts/or1ksim.dts b/arch/openrisc/boot/dts/or1ksim.dts index d8aa8309c9d3..c0cb74e52f95 100644 --- a/arch/openrisc/boot/dts/or1ksim.dts +++ b/arch/openrisc/boot/dts/or1ksim.dts @@ -49,8 +49,9 @@ }; enet0: ethoc at 92000000 { - compatible = "opencores,ethmac-rtlsvn338"; - reg = <0x92000000 0x100>; + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; interrupts = <4>; + big-endian; }; }; -- 2.21.0 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree [not found] <20190831030348.6920-1-shorne@gmail.com> 2019-08-31 3:03 ` [OpenRISC] [PATCH 1/2] or1k: dts: Fix ethoc network configuration in or1ksim devicetree Stafford Horne @ 2019-08-31 3:03 ` Stafford Horne 2019-09-02 18:01 ` BAndViG 1 sibling, 1 reply; 3+ messages in thread From: Stafford Horne @ 2019-08-31 3:03 UTC (permalink / raw) To: openrisc This patch adds the ethoc device configuration to the OpenRISC basic SMP device tree config. This was tested with qemu. Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple_smp.dts index defbb92714ec..71af0e117bfe 100644 --- a/arch/openrisc/boot/dts/simple_smp.dts +++ b/arch/openrisc/boot/dts/simple_smp.dts @@ -60,4 +60,10 @@ clock-frequency = <20000000>; }; + enet0: ethoc at 92000000 { + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; + interrupts = <4>; + big-endian; + }; }; -- 2.21.0 ^ permalink raw reply related [flat|nested] 3+ messages in thread
* [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree 2019-08-31 3:03 ` [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree Stafford Horne @ 2019-09-02 18:01 ` BAndViG 0 siblings, 0 replies; 3+ messages in thread From: BAndViG @ 2019-09-02 18:01 UTC (permalink / raw) To: openrisc Hello All. I've ported these ethernet description for my Atlys-based SoC. Prior to it Linux were not able even to detect Marvell's PHY. With the modifications Marvell's PHY is detected correctly. However, I still can not use ethernet connection. For example, If I try to execute "ping {ip-of-my-pc}" it reports "net eth0: TX: carrier sense lost". Perhaps, I have to configure correctly MDIO bus and PHY itself. Have anybody got an recommendation? WBR Andrey -----Исходное сообщение----- From: Stafford Horne Sent: Saturday, August 31, 2019 6:03 AM To: LKML Cc: Mark Rutland ; Jonas Bonn ; devicetree at vger.kernel.org ; Rob Herring ; openrisc at lists.librecores.org Subject: [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree This patch adds the ethoc device configuration to the OpenRISC basic SMP device tree config. This was tested with qemu. Signed-off-by: Stafford Horne <shorne@gmail.com> --- arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple_smp.dts index defbb92714ec..71af0e117bfe 100644 --- a/arch/openrisc/boot/dts/simple_smp.dts +++ b/arch/openrisc/boot/dts/simple_smp.dts @@ -60,4 +60,10 @@ clock-frequency = <20000000>; }; + enet0: ethoc at 92000000 { + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; + interrupts = <4>; + big-endian; + }; }; -- 2.21.0 _______________________________________________ OpenRISC mailing list OpenRISC at lists.librecores.org https://lists.librecores.org/listinfo/openrisc ^ permalink raw reply related [flat|nested] 3+ messages in thread
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[not found] <20190831030348.6920-1-shorne@gmail.com>
2019-08-31 3:03 ` [OpenRISC] [PATCH 1/2] or1k: dts: Fix ethoc network configuration in or1ksim devicetree Stafford Horne
2019-08-31 3:03 ` [OpenRISC] [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree Stafford Horne
2019-09-02 18:01 ` BAndViG
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