From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.librecores.org (lists.librecores.org [88.198.125.70]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5C36C3DA7C for ; Fri, 23 Dec 2022 07:17:44 +0000 (UTC) Received: from [172.31.1.100] (localhost.localdomain [127.0.0.1]) by mail.librecores.org (Postfix) with ESMTP id 5DC69247C8; Fri, 23 Dec 2022 08:17:44 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mail.librecores.org (Postfix) with ESMTPS id 2B94B25BA5 for ; Thu, 22 Dec 2022 12:49:08 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671709748; x=1703245748; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xrva1eFk6Np1Bm1YmRwegqhZeY1WwhPNk9Drl9WzrJI=; b=LjiV1XjWu0ori7uc3kaPBKwUNwyjfI1u7JxaJ6wFDGO73LlM9NOlwXZx oZyjhViWGPlfKm2fZaP9PyulwdVw5zTVMqv0aes62Do4lfJdydM2FWGB0 TwNe/ETXXgOJWNJAiTF9lOkMXpWTXcwwgYxHw3SciUJgjAZoOKYgOM05g BRV6aU2nH2M83MRWudU2WenFuk2OTvyIvpPbRnQq88HixDEIlPA3XxhtU QxvaDdae+1fzpjmAgfJPyZLe4h0Ep9LezweQkBD6+CJ7jWUORtJYXaX7A mgzxlpS3v6TX6Kz+JOO59MAhR1BnlAx5j7egI1IkN4THl5flJkDW0CvS+ A==; X-IronPort-AV: E=McAfee;i="6500,9779,10568"; a="318804901" X-IronPort-AV: E=Sophos;i="5.96,265,1665471600"; d="scan'208";a="318804901" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Dec 2022 03:49:06 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10568"; a="629504931" X-IronPort-AV: E=Sophos;i="5.96,265,1665471600"; d="scan'208";a="629504931" Received: from lab-ah.igk.intel.com ([10.91.215.196]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Dec 2022 03:49:00 -0800 From: Andrzej Hajda To: linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org, linux-snps-arc@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, loongarch@lists.linux.dev, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linux-parisc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-xtensa@linux-xtensa.org, intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH 17/19] arch/xtensa: rename internal name __xchg to __arch_xchg Date: Thu, 22 Dec 2022 12:46:33 +0100 Message-Id: <20221222114635.1251934-18-andrzej.hajda@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221222114635.1251934-1-andrzej.hajda@intel.com> References: <20221222114635.1251934-1-andrzej.hajda@intel.com> MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: 8bit X-Mailman-Approved-At: Fri, 23 Dec 2022 08:17:29 +0100 X-BeenThere: openrisc@lists.librecores.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Discussion around the OpenRISC processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Arnd Bergmann , Peter Zijlstra , Boqun Feng , Andrzej Hajda , Rodrigo Vivi , Andrew Morton , Andy Shevchenko Errors-To: openrisc-bounces@lists.librecores.org Sender: "OpenRISC" __xchg will be used for non-atomic xchg macro. Signed-off-by: Andrzej Hajda --- arch/xtensa/include/asm/cmpxchg.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/xtensa/include/asm/cmpxchg.h b/arch/xtensa/include/asm/cmpxchg.h index eb87810357ad88..675a11ea8de76b 100644 --- a/arch/xtensa/include/asm/cmpxchg.h +++ b/arch/xtensa/include/asm/cmpxchg.h @@ -170,7 +170,7 @@ static inline unsigned long xchg_u32(volatile int * m, unsigned long val) } #define arch_xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + ((__typeof__(*(ptr)))__arch_xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) static inline u32 xchg_small(volatile void *ptr, u32 x, int size) { @@ -203,7 +203,7 @@ static inline u32 xchg_small(volatile void *ptr, u32 x, int size) extern void __xchg_called_with_bad_pointer(void); static __inline__ unsigned long -__xchg(unsigned long x, volatile void * ptr, int size) +__arch_xchg(unsigned long x, volatile void * ptr, int size) { switch (size) { case 1: -- 2.34.1