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[86.9.131.95]) by smtp.gmail.com with ESMTPSA id p11-20020a05600c358b00b0041408af4b34sm107553wmq.10.2024.03.19.14.42.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Mar 2024 14:42:54 -0700 (PDT) From: Stafford Horne To: GLIBC patches Cc: Linux OpenRISC , Stafford Horne Subject: [PATCH 3/4] or1k: Only define fpu rouding and exceptions with hard-float Date: Tue, 19 Mar 2024 21:42:43 +0000 Message-ID: <20240319214244.736981-4-shorne@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240319214244.736981-1-shorne@gmail.com> References: <20240319214244.736981-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-openrisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This test failure: math/test-fenv If rounding mode and exception macros are defined then the fenv tests run and always fail. This patch adds an ifdef using the __or1k_hard_float__ macro provided by gcc to avoid defining these fenv macros when they cnnot be used. This is similar to what is done in csky. Note, I will post the or1k hard-float support soon. So, I prefer to leave the hard-float bits here for now. --- sysdeps/or1k/bits/fenv.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/sysdeps/or1k/bits/fenv.h b/sysdeps/or1k/bits/fenv.h index 587039ca03..01267805e6 100644 --- a/sysdeps/or1k/bits/fenv.h +++ b/sysdeps/or1k/bits/fenv.h @@ -21,6 +21,7 @@ # error "Never use directly; include instead." #endif +#ifdef __or1k_hard_float__ /* Define bits representing exceptions in the FPCSR status word. */ enum { @@ -51,6 +52,24 @@ enum #define FE_UPWARD (0x2 << 1) #define FE_DOWNWARD (0x3 << 1) +#else + +/* In the soft-float case only rounding to nearest is supported, with + no exceptions. */ + +enum + { + __FE_UNDEFINED = -1, + + FE_TONEAREST = +# define FE_TONEAREST 0x0 + FE_TONEAREST + }; + +# define FE_ALL_EXCEPT 0 + +#endif /* __or1k_hard_float__ */ + /* Type representing exception flags. */ typedef unsigned int fexcept_t; -- 2.44.0