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From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v3 2/5] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN
Date: Fri, 17 Mar 2017 14:39:08 +0900	[thread overview]
Message-ID: <2b8e80d1edda828c3a11e1ffec5bfbb0a329e526.1489728533.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1489728532.git.shorne@gmail.com>

From: Peter Gavin <pgavin@gmail.com>

* sim/common/ChangeLog
2012-03-14  Peter Gavin  <pgavin@gmail.com>

	* add mul-o1flag (1's complement unsigned multiply overflow flag)
	and mul-o2flag (2's complement signed multiply overflow flag)
	* cgen-ops.h:
	(MUL1OFSI) new function: 1's complement
	(MUL2OFSI) new function: 2's complement
---
 sim/common/cgen-ops.h | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/sim/common/cgen-ops.h b/sim/common/cgen-ops.h
index 97585d7..ffbdf3f 100644
--- a/sim/common/cgen-ops.h
+++ b/sim/common/cgen-ops.h
@@ -631,6 +631,22 @@ SUBOFQI (QI a, QI b, BI c)
   return res;
 }
 
+SEMOPS_INLINE BI
+MUL2OFSI (SI a, SI b)
+{
+  DI tmp = MULDI (EXTSIDI(a), EXTSIDI(b));
+  BI res = tmp < -0x80000000LL || tmp > 0x7fffffffLL;
+  return res;
+}
+
+SEMOPS_INLINE BI
+MUL1OFSI (USI a, USI b)
+{
+  UDI tmp = MULDI (ZEXTSIDI(a), ZEXTSIDI(b));
+  BI res = (tmp > 0xFFFFFFFFULL);
+  return res;
+}
+
 #else
 
 SI ADDCSI (SI, SI, BI);
@@ -651,6 +667,8 @@ UBI ADDOFQI (QI, QI, BI);
 QI SUBCQI (QI, QI, BI);
 UBI SUBCFQI (QI, QI, BI);
 UBI SUBOFQI (QI, QI, BI);
+BI MUL1OFSI (SI a, SI b);
+BI MUL2OFSI (SI a, SI b);
 
 #endif
 
-- 
2.9.3


  parent reply	other threads:[~2017-03-17  5:39 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-17  5:39 [OpenRISC] [PATCH v3 0/5] sim port for OpenRISC Stafford Horne
2017-03-17  5:39 ` [OpenRISC] [PATCH v3 1/5] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd]) Stafford Horne
2017-03-17  5:39 ` Stafford Horne [this message]
2017-03-17  5:39 ` [OpenRISC] [PATCH v3 3/5] sim: or1k: add or1k target to sim Stafford Horne
2017-03-17  5:39 ` [OpenRISC] [PATCH v3 4/5] sim: or1k: Add generated files Stafford Horne
2017-03-17  5:39 ` [OpenRISC] [PATCH v3 5/5] sim: testsuite: add testsuite for or1k sim Stafford Horne
2017-03-17  5:58 ` [OpenRISC] [PATCH v3 0/5] sim port for OpenRISC Stafford Horne

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