From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v2 3/6] sim: cgen: allow suffix on generated arch.[ch] and cpuall.h
Date: Sat, 21 Jan 2017 12:03:52 +0900 [thread overview]
Message-ID: <97fcce284b71d38403654d5b65216f1922a37e11.1484967575.git.shorne@gmail.com> (raw)
In-Reply-To: <cover.1484967575.git.shorne@gmail.com>
From: Peter Gavin <pgavin@gmail.com>
sim/ChangeLog:
* Make-common.in: pass $(SUFFIX) to cgen.sh in cgen-arch target
* cgen.sh: append suffix to names of arch.[ch] and cpuall.h
---
sim/common/Make-common.in | 2 +-
sim/common/cgen.sh | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/sim/common/Make-common.in b/sim/common/Make-common.in
index 9075b9c..a4f8988 100644
--- a/sim/common/Make-common.in
+++ b/sim/common/Make-common.in
@@ -566,7 +566,7 @@ CGEN_FLAGS_TO_PASS = \
cgen-arch: force
$(SHELL) $(srccom)/cgen.sh arch $(srcdir) \
$(CGEN) $(CGENDIR) "$(CGENFLAGS)" \
- $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) ignored \
+ $(arch) "$(FLAGS)" ignored "$(isa)" $(mach) "$(SUFFIX)" \
$(archfile) ignored
cgen-cpu: force
diff --git a/sim/common/cgen.sh b/sim/common/cgen.sh
index 394ef2d..c03a4a7 100755
--- a/sim/common/cgen.sh
+++ b/sim/common/cgen.sh
@@ -70,11 +70,11 @@ arch)
-B ${tmp}-arch.c1 \
-N ${tmp}-all.h1
sed $sedscript < ${tmp}-arch.h1 > ${tmp}-arch.h
- ${rootdir}/move-if-change ${tmp}-arch.h ${srcdir}/arch.h
+ ${rootdir}/move-if-change ${tmp}-arch.h ${srcdir}/arch${suffix}.h
sed $sedscript < ${tmp}-arch.c1 > ${tmp}-arch.c
- ${rootdir}/move-if-change ${tmp}-arch.c ${srcdir}/arch.c
+ ${rootdir}/move-if-change ${tmp}-arch.c ${srcdir}/arch${suffix}.c
sed $sedscript < ${tmp}-all.h1 > ${tmp}-all.h
- ${rootdir}/move-if-change ${tmp}-all.h ${srcdir}/cpuall.h
+ ${rootdir}/move-if-change ${tmp}-all.h ${srcdir}/cpuall${suffix}.h
rm -f ${tmp}-arch.h1 ${tmp}-arch.c1 ${tmp}-all.h1
;;
--
2.9.3
next prev parent reply other threads:[~2017-01-21 3:03 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-21 3:03 [OpenRISC] [PATCH v2 0/6] sim: Port for OpenRISC Stafford Horne
2017-01-21 3:03 ` [OpenRISC] [PATCH v2 1/6] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd]) Stafford Horne
2017-01-21 3:03 ` [OpenRISC] [PATCH v2 2/6] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN Stafford Horne
2017-01-21 3:03 ` Stafford Horne [this message]
2017-01-21 3:03 ` [OpenRISC] [PATCH v2 4/6] sim: or1k: add or1k target to sim Stafford Horne
2017-02-14 18:52 ` Mike Frysinger
2017-02-15 13:24 ` Stafford Horne
2017-02-15 15:42 ` Mike Frysinger
2017-02-28 11:07 ` Stafford Horne
2017-01-21 3:03 ` [OpenRISC] [PATCH v2 5/6] sim: or1k: Add generated files Stafford Horne
2017-01-21 3:03 ` [OpenRISC] [PATCH v2 6/6] sim: testsuite: add testsuite for or1k sim Stafford Horne
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