messages from 2017-02-24 04:32:26 to 2017-06-13 10:15:49 UTC [more...]
[OpenRISC] [PATCH v4 0/5] sim port for OpenRISC
2017-06-13 10:15 UTC (7+ messages)
` [OpenRISC] [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
` [OpenRISC] [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u])
` [OpenRISC] [PATCH v4 3/5] sim: or1k: add or1k target to sim
` [OpenRISC] [PATCH v4 4/5] sim: or1k: Add generated files
` [OpenRISC] [PATCH v4 5/5] sim: testsuite: add testsuite for or1k sim
[OpenRISC] [PATCH v7 0/4] OpenRISC gdb port
2017-06-13 10:14 UTC (12+ messages)
` [OpenRISC] [PATCH v7 1/4] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v7 2/4] gdb: testsuite: Add or1k l.nop instruction
` [OpenRISC] [PATCH v7 3/4] gdb: testsuite: Add or1k tdesc-regs.exp test support
` [OpenRISC] [PATCH v7 4/4] Add gdb for or1k build
[OpenRISC] [PATCH 18/27] openrisc: move generic-y of exported headers to uapi/asm/Kbuild
2017-06-12 3:27 UTC
[OpenRISC] [PATCH 20/35] openrisc: defconfig: Cleanup from old Kconfig options
2017-06-10 23:35 UTC (2+ messages)
[OpenRISC] [PATCH] kthread: fix boot hang (regression) on MIPS/OpenRISC
2017-05-29 16:40 UTC (4+ messages)
[OpenRISC] [PATCH] openrisc: Change toolchain from or32- to or1k-
2017-05-29 14:56 UTC
[OpenRISC] [PATCH] openrisc: Switch to use export.h instead of module.h
2017-05-29 14:55 UTC
[OpenRISC] [PATCH 1/1] futex: remove duplicated code
2017-05-26 6:54 UTC (7+ messages)
[OpenRISC] [PATCH v6 0/5] OpenRISC gdb port
2017-05-20 6:42 UTC (20+ messages)
` [OpenRISC] [PATCH v6 1/5] tdesc: handle arbitrary strings in tdesc_register_in_reggroup_p
` [OpenRISC] [PATCH v6 2/5] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v6 3/5] gdb: testsuite: Add or1k l.nop instruction
` [OpenRISC] [PATCH v6 4/5] gdb: testsuite: Add or1k tdesc-regs.exp test support
` [OpenRISC] [PATCH v6 5/5] Add gdb for or1k build
[OpenRISC] [PATCH] openrisc: explicitly include linux/bug.h in asm/fixmap.h
2017-05-15 13:31 UTC (2+ messages)
[OpenRISC] ORConf 2017 registration now open
2017-05-08 11:38 UTC
[OpenRISC] My book on computer architecture
2017-05-05 19:02 UTC
[OpenRISC] IRC logs for #openrisc Sunday, 2017-04-30
2017-05-05 12:12 UTC (3+ messages)
[OpenRISC] [PATCH 0/7] Openrisc misc features / fixes
2017-04-25 14:51 UTC (28+ messages)
` [OpenRISC] [PATCH 1/7] target/openrisc: Fixes for memory debugging
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 2/7] target/openrisc: add shutdown logic
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH PMR] target/openrisc: Support non-busy idle state using PMR SPR
` [OpenRISC] [PATCH RFC] "
` [OpenRISC] [PATCH RFC v2] "
` [OpenRISC] [PATCH 3/7] target/openrisc: add numcores and coreid support
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 4/7] target/openrisc: implement shadow registers
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 5/7] migration: Add VMSTATE_UINTTL_2DARRAY()
` [OpenRISC] [PATCH 6/7] migration: Add VMSTATE_STRUCT_2DARRAY()
` [OpenRISC] [PATCH 7/7] target/openrisc: Implement full vmstate serialization
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [Qemu-devel] [PATCH 0/7] Openrisc misc features / fixes
[OpenRISC] [PATCH v2 0/9] Openrisc misc features / fixes
2017-04-24 0:09 UTC (11+ messages)
` [OpenRISC] [PATCH v2 1/9] target/openrisc: Implement EVBAR register
` [OpenRISC] [PATCH v2 2/9] target/openrisc: Implement EPH bit
` [OpenRISC] [PATCH v2 3/9] target/openrisc: Fixes for memory debugging
` [OpenRISC] [PATCH v2 4/9] target/openrisc: add numcores and coreid support
` [OpenRISC] [PATCH v2 5/9] migration: Add VMSTATE_UINTTL_2DARRAY()
` [OpenRISC] [PATCH v2 6/9] target/openrisc: implement shadow registers
` [OpenRISC] [PATCH v2 7/9] migration: Add VMSTATE_STRUCT_2DARRAY()
` [OpenRISC] [PATCH v2 8/9] target/openrisc: Implement full vmstate serialization
` [OpenRISC] [PATCH v2 9/9] target/openrisc: Remove duplicate features property
` [OpenRISC] [Qemu-devel] [PATCH v2 0/9] Openrisc misc features / fixes
[OpenRISC] ORConf 2017 call for participation
2017-04-12 4:16 UTC
[OpenRISC] [PATCH v5 0/4] OpenRISC gdb port
2017-04-08 9:38 UTC (17+ messages)
` [OpenRISC] [PATCH v5 1/4] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v5 2/4] gdb: provide openrisc target description XML files
` [OpenRISC] [PATCH v5 3/4] gdb: testsuite: Add or1k l.nop inscruction
` [OpenRISC] [PATCH v5 4/4] Add gdb for or1k build
[OpenRISC] [PATCH] cpu: or1k: Set ppc on pc change
2017-03-20 21:20 UTC (3+ messages)
[OpenRISC] Linux kernel upstreaming status
2017-03-20 14:12 UTC (3+ messages)
[OpenRISC] [PATCH v3 0/5] sim port for OpenRISC
2017-03-17 5:58 UTC (7+ messages)
` [OpenRISC] [PATCH v3 1/5] sim: cgen: add rem (remainder) function (needed for OR1K lf.rem.[sd])
` [OpenRISC] [PATCH v3 2/5] sim: cgen: add mul-o1flag, mul-o2flag RTL functions to CGEN
` [OpenRISC] [PATCH v3 3/5] sim: or1k: add or1k target to sim
` [OpenRISC] [PATCH v3 4/5] sim: or1k: Add generated files
` [OpenRISC] [PATCH v3 5/5] sim: testsuite: add testsuite for or1k sim
[OpenRISC] [PATCH 0/3] openrisc: various fixes
2017-03-15 22:10 UTC (4+ messages)
[OpenRISC] [PATCH 0/3] Openrisc fixes for 4.11
2017-03-14 22:17 UTC (6+ messages)
` [OpenRISC] [PATCH 1/3] openrisc: xchg: fix `computed is not used` warning
` [OpenRISC] [PATCH 2/3] openrisc: fix issue handling 8 byte get_user calls
` [OpenRISC] [PATCH 3/3] openrisc: Export symbols needed by modules
[OpenRISC] [PATCH v3 00/25] OpenRISC patches for 4.11 final call
2017-03-14 15:55 UTC (7+ messages)
` [OpenRISC] [PATCH v3 02/25] openrisc: add cache way information to cpuinfo
[OpenRISC] Build regressions/improvements in v4.11-rc2
2017-03-14 12:54 UTC (5+ messages)
[OpenRISC] [PATCH] target/openrisc: Fixes for memory debugging
2017-03-13 15:01 UTC
[OpenRISC] [PATCH 1/3] futex: remove duplicated code
2017-03-04 21:38 UTC (2+ messages)
[OpenRISC] gcc7 port and improvements
2017-03-03 4:50 UTC (4+ messages)
[OpenRISC] [PATCH v2 0/6] sim: Port for OpenRISC
2017-02-28 11:07 UTC (4+ messages)
` [OpenRISC] [PATCH v2 4/6] sim: or1k: add or1k target to sim
[OpenRISC] [PATCH] kbuild: avoid unrecognized option error for external DTC
2017-02-28 10:21 UTC (3+ messages)
[OpenRISC] [Qemu-devel] [PATCH 00/22] target/openrisc updates
2017-02-25 6:17 UTC (6+ messages)
[OpenRISC] [GIT PULL] OpenRISC updates for 4.11 merge
2017-02-24 23:29 UTC
[OpenRISC] [PATCH v4 00/24] OpenRISC patches for 4.11
2017-02-24 20:31 UTC (39+ messages)
` [OpenRISC] [PATCH v4 05/24] openrisc: head: refactor out tlb flush into it's own function
` [OpenRISC] [PATCH v4 06/24] openrisc: add l.lwa/l.swa emulation
` [OpenRISC] [PATCH v4 07/24] openrisc: add atomic bitops
` [OpenRISC] [PATCH v4 08/24] openrisc: add cmpxchg and xchg implementations
` [OpenRISC] [PATCH v4 09/24] openrisc: add optimized atomic operations
` [OpenRISC] [PATCH v4 10/24] openrisc: add futex_atomic_* implementations
` [OpenRISC] [PATCH v4 11/24] openrisc: remove unnecessary stddef.h include
` [OpenRISC] [PATCH v4 12/24] openrisc: Fix the bitmask for the unit present register
` [OpenRISC] [PATCH v4 13/24] openrisc: Initial support for the idle state
` [OpenRISC] [PATCH v4 14/24] openrisc: Add optimized memset
` [OpenRISC] [PATCH v4 15/24] openrisc: Add optimized memcpy routine
` [OpenRISC] [PATCH v4 16/24] openrisc: Add .gitignore
` [OpenRISC] [PATCH v4 17/24] MAINTAINERS: Add the openrisc official repository
` [OpenRISC] [PATCH v4 18/24] scripts/checkstack.pl: Add openrisc support
` [OpenRISC] [PATCH v4 19/24] openrisc: entry: Whitespace and comment cleanups
` [OpenRISC] [PATCH v4 20/24] openrisc: entry: Fix delay slot detection
` [OpenRISC] [PATCH v4 21/24] openrisc: head: Move init strings to rodata section
` [OpenRISC] [PATCH v4 22/24] arch/openrisc/lib/memcpy.c: use correct OR1200 option
` [OpenRISC] [PATCH v4 23/24] openrisc: Export ioremap symbols used by modules
` [OpenRISC] [PATCH v4 24/24] openrisc: head: Init r0 to 0 on start
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