messages from 2017-03-17 05:39:10 to 2017-09-10 06:49:13 UTC [more...]
[OpenRISC] [PATCH v2 00/14] OpenRISC SMP Support
2017-09-10 6:49 UTC (2+ messages)
` [OpenRISC] [PATCH v2 01/14] openrisc: use shadow registers to save regs on exception
[OpenRISC] [PATCH] openrisc: add forward declaration for struct vm_area_struct
2017-09-08 15:29 UTC (2+ messages)
[OpenRISC] [PATCH v4 0/5] sim port for OpenRISC
2017-09-05 18:52 UTC (20+ messages)
` [OpenRISC] [PATCH v4 1/5] sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
` [OpenRISC] [PATCH v4 2/5] sim: cgen: add MUL2OFSI and MUL1OFSI macros (needed for OR1K l.mul[u])
` [OpenRISC] [PATCH v4 3/5] sim: or1k: add or1k target to sim
` [OpenRISC] [PATCH v4 4/5] sim: or1k: Add generated files
` [OpenRISC] [PATCH v4 5/5] sim: testsuite: add testsuite for or1k sim
[OpenRISC] difference between mor1Kx and or1200
2017-09-04 11:04 UTC
[OpenRISC] [PATCH 00/13] OpenRISC SMP Support
2017-09-04 7:35 UTC (30+ messages)
` [OpenRISC] [PATCH 01/13] openrisc: use shadow registers to save regs on exception
` [OpenRISC] [PATCH 02/13] openrisc: define CPU_BIG_ENDIAN as true
` [OpenRISC] [PATCH 03/13] openrisc: add 1 and 2 byte cmpxchg support
` [OpenRISC] [PATCH 04/13] openrisc: use qspinlocks and qrwlocks
` [OpenRISC] [PATCH 05/13] irqchip: add initial support for ompic
` [OpenRISC] [PATCH 06/13] openrisc: initial SMP support
` [OpenRISC] [PATCH 07/13] openrisc: fix initial preempt state for secondary cpu tasks
` [OpenRISC] [PATCH 08/13] openrisc: sleep instead of spin on secondary wait
` [OpenRISC] [PATCH 09/13] openrisc: add cacheflush support to fix icache aliasing
` [OpenRISC] [PATCH 10/13] openrisc: add simple_smp dts and defconfig for simulators
` [OpenRISC] [PATCH 11/13] openrisc: support framepointers and STACKTRACE_SUPPORT
` [OpenRISC] [PATCH 12/13] openrisc: enable LOCKDEP_SUPPORT and irqflags tracing
` [OpenRISC] [PATCH 13/13] openrisc: add tick timer multicore sync logic
[OpenRISC] makefile and openrisctoolchain
2017-08-26 14:11 UTC
[OpenRISC] (no subject)
2017-08-24 21:36 UTC
[OpenRISC] [PATCH 0/5] OpenRISC SMP Support
2017-08-23 5:57 UTC (6+ messages)
` [OpenRISC] [PATCH 1/5] openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC)
` [OpenRISC] [PATCH 2/5] target/openrisc: Make coreid and numcores configurable in state
` [OpenRISC] [PATCH 3/5] openrisc/cputimer: Perparation for Multicore
` [OpenRISC] [PATCH 4/5] openrisc: Initial SMP support
` [OpenRISC] [PATCH 5/5] openrisc: Only kick cpu on timeout, not on update
[OpenRISC] (no subject)
2017-08-23 5:36 UTC (2+ messages)
[OpenRISC] OpenRISC Specification updates for Multicore
2017-08-21 7:28 UTC (2+ messages)
[OpenRISC] ORConf 2017 update
2017-08-15 23:49 UTC
[OpenRISC] OpenRISC Digest, Vol 17, Issue 6
2017-08-05 22:32 UTC
[OpenRISC] OpenRISC Digest, Vol 17, Issue 4
2017-07-19 11:39 UTC (2+ messages)
[OpenRISC] Dev Digest, Vol 14, Issue 5
2017-07-19 8:47 UTC (3+ messages)
[OpenRISC] OpenRISC Digest, Vol 17, Issue 3
2017-07-18 10:31 UTC
[OpenRISC] [Librecores Developers] OpenRISC or1200
2017-07-17 21:45 UTC
[OpenRISC] OR1200
2017-07-15 11:55 UTC
[OpenRISC] [PATCH] irqchip: or1k-pic: Fix interrupt system
2017-06-30 13:45 UTC (3+ messages)
[OpenRISC] [PATCH v7 0/4] OpenRISC gdb port
2017-06-13 10:14 UTC (12+ messages)
` [OpenRISC] [PATCH v7 1/4] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v7 2/4] gdb: testsuite: Add or1k l.nop instruction
` [OpenRISC] [PATCH v7 3/4] gdb: testsuite: Add or1k tdesc-regs.exp test support
` [OpenRISC] [PATCH v7 4/4] Add gdb for or1k build
[OpenRISC] [PATCH 18/27] openrisc: move generic-y of exported headers to uapi/asm/Kbuild
2017-06-12 3:27 UTC
[OpenRISC] [PATCH 20/35] openrisc: defconfig: Cleanup from old Kconfig options
2017-06-10 23:35 UTC (2+ messages)
[OpenRISC] [PATCH] kthread: fix boot hang (regression) on MIPS/OpenRISC
2017-05-29 16:40 UTC (4+ messages)
[OpenRISC] [PATCH] openrisc: Change toolchain from or32- to or1k-
2017-05-29 14:56 UTC
[OpenRISC] [PATCH] openrisc: Switch to use export.h instead of module.h
2017-05-29 14:55 UTC
[OpenRISC] [PATCH 1/1] futex: remove duplicated code
2017-05-26 6:54 UTC (7+ messages)
[OpenRISC] [PATCH v6 0/5] OpenRISC gdb port
2017-05-20 6:42 UTC (20+ messages)
` [OpenRISC] [PATCH v6 1/5] tdesc: handle arbitrary strings in tdesc_register_in_reggroup_p
` [OpenRISC] [PATCH v6 2/5] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v6 3/5] gdb: testsuite: Add or1k l.nop instruction
` [OpenRISC] [PATCH v6 4/5] gdb: testsuite: Add or1k tdesc-regs.exp test support
` [OpenRISC] [PATCH v6 5/5] Add gdb for or1k build
[OpenRISC] [PATCH] openrisc: explicitly include linux/bug.h in asm/fixmap.h
2017-05-15 13:31 UTC (2+ messages)
[OpenRISC] ORConf 2017 registration now open
2017-05-08 11:38 UTC
[OpenRISC] My book on computer architecture
2017-05-05 19:02 UTC
[OpenRISC] IRC logs for #openrisc Sunday, 2017-04-30
2017-05-05 12:12 UTC (3+ messages)
[OpenRISC] [PATCH 0/7] Openrisc misc features / fixes
2017-04-25 14:51 UTC (28+ messages)
` [OpenRISC] [PATCH 1/7] target/openrisc: Fixes for memory debugging
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 2/7] target/openrisc: add shutdown logic
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH PMR] target/openrisc: Support non-busy idle state using PMR SPR
` [OpenRISC] [PATCH RFC] "
` [OpenRISC] [PATCH RFC v2] "
` [OpenRISC] [PATCH 3/7] target/openrisc: add numcores and coreid support
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 4/7] target/openrisc: implement shadow registers
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [PATCH 5/7] migration: Add VMSTATE_UINTTL_2DARRAY()
` [OpenRISC] [PATCH 6/7] migration: Add VMSTATE_STRUCT_2DARRAY()
` [OpenRISC] [PATCH 7/7] target/openrisc: Implement full vmstate serialization
` [OpenRISC] [Qemu-devel] "
` [OpenRISC] [Qemu-devel] [PATCH 0/7] Openrisc misc features / fixes
[OpenRISC] [PATCH v2 0/9] Openrisc misc features / fixes
2017-04-24 0:09 UTC (11+ messages)
` [OpenRISC] [PATCH v2 1/9] target/openrisc: Implement EVBAR register
` [OpenRISC] [PATCH v2 2/9] target/openrisc: Implement EPH bit
` [OpenRISC] [PATCH v2 3/9] target/openrisc: Fixes for memory debugging
` [OpenRISC] [PATCH v2 4/9] target/openrisc: add numcores and coreid support
` [OpenRISC] [PATCH v2 5/9] migration: Add VMSTATE_UINTTL_2DARRAY()
` [OpenRISC] [PATCH v2 6/9] target/openrisc: implement shadow registers
` [OpenRISC] [PATCH v2 7/9] migration: Add VMSTATE_STRUCT_2DARRAY()
` [OpenRISC] [PATCH v2 8/9] target/openrisc: Implement full vmstate serialization
` [OpenRISC] [PATCH v2 9/9] target/openrisc: Remove duplicate features property
` [OpenRISC] [Qemu-devel] [PATCH v2 0/9] Openrisc misc features / fixes
[OpenRISC] ORConf 2017 call for participation
2017-04-12 4:16 UTC
[OpenRISC] [PATCH v5 0/4] OpenRISC gdb port
2017-04-08 9:38 UTC (17+ messages)
` [OpenRISC] [PATCH v5 1/4] gdb: Add OpenRISC or1k and or1knd target support
` [OpenRISC] [PATCH v5 2/4] gdb: provide openrisc target description XML files
` [OpenRISC] [PATCH v5 3/4] gdb: testsuite: Add or1k l.nop inscruction
` [OpenRISC] [PATCH v5 4/4] Add gdb for or1k build
[OpenRISC] [PATCH] cpu: or1k: Set ppc on pc change
2017-03-20 21:20 UTC (3+ messages)
[OpenRISC] Linux kernel upstreaming status
2017-03-20 14:12 UTC (3+ messages)
[OpenRISC] [PATCH v3 0/5] sim port for OpenRISC
2017-03-17 5:58 UTC (4+ messages)
` [OpenRISC] [PATCH v3 4/5] sim: or1k: Add generated files
` [OpenRISC] [PATCH v3 5/5] sim: testsuite: add testsuite for or1k sim
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