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[94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4324eab257asm88770406f8f.38.2026.01.02.22.17.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Jan 2026 22:17:00 -0800 (PST) Date: Sat, 3 Jan 2026 06:16:59 +0000 From: Stafford Horne To: Geert Uytterhoeven Cc: LKML , Linux OpenRISC , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonas Bonn , Stefan Kristiansson , devicetree@vger.kernel.org Subject: Re: [PATCH v2 2/5] openrisc: dts: Add de0 nano config and devicetree Message-ID: References: <20251217080843.70621-1-shorne@gmail.com> <20251217080843.70621-3-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-openrisc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Thu, Dec 18, 2025 at 07:36:08PM +0100, Geert Uytterhoeven wrote: > Hi Stafford, > > On Wed, 17 Dec 2025 at 09:23, Stafford Horne wrote: > > The de0 nano from Terasic is an FPGA board that we use in the OpenRISC > > community to test OpenRISC configurations. Add a base configuration for > > the board that runs an OpenRISC CPU at 50Mhz with 32MB ram, UART for > > console and some GPIOs for LEDs and switches. > > > > There is an older version of this floating around that defines all of > > the hardware on the board including SPI's, flash devices, sram, ADCs > > etc. Eventually it would be good to get the full version upstream > > but for now I think a minimal board is good to start with. > > > > Link: https://openrisc.io/tutorials/de0_nano/ > > Link: https://github.com/olofk/de0_nano > > > > Signed-off-by: Stafford Horne > > Thanks for your patch! > > > --- /dev/null > > +++ b/arch/openrisc/boot/dts/de0-nano-common.dtsi > > @@ -0,0 +1,41 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > + > > +#include > > +#include > > + > > +/ { > > + memory@0 { > > + device_type = "memory"; > > + reg = <0x00000000 0x02000000>; > > + }; > > + > > + leds: leds { > > Move this up (or down), before (or after) all nodes with unit addresses? OK. > > + compatible = "gpio-leds"; > > + status = "okay"; > > Missing blank line. OK, also I can remove the "okay" line as well. > > + led-heartbeat { > > + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; > > + color = ; > > + function = LED_FUNCTION_HEARTBEAT; > > + linux,default-trigger = "heartbeat"; > > + label = "heartbeat"; > > + }; > > + }; > > + > > + gpio0: gpio@91000000 { > > + compatible = "opencores,gpio", "brcm,bcm6345-gpio"; > > + reg = <0x91000000 0x1>, <0x91000001 0x1>; > > + reg-names = "dat", "dirout"; > > + gpio-controller; > > + #gpio-cells = <2>; > > + status = "okay"; > > "okay" is the default, so you could drop this line. OK. > > + }; > > + > > + gpio1: gpio@92000000 { > > + compatible = "opencores,gpio", "brcm,bcm6345-gpio"; > > + reg = <0x92000000 0x1>, <0x92000001 0x1>; > > + reg-names = "dat", "dirout"; > > + gpio-controller; > > + #gpio-cells = <2>; > > + status = "disabled"; > > + }; > > +}; > > > --- /dev/null > > +++ b/arch/openrisc/boot/dts/de0-nano.dts > > @@ -0,0 +1,54 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > + > > +/dts-v1/; > > + > > +#include "de0-nano-common.dtsi" > > + > > +/ { > > + model = "Terasic DE0 Nano"; > > + compatible = "opencores,or1ksim"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + interrupt-parent = <&pic>; > > + > > + aliases { > > + uart0 = &serial0; > > + }; > > + > > + chosen { > > + bootargs = "earlycon"; > > Do you need this? What do you mean here? I want to keep "earlycon", and it is not supplied in de0-nano-common.dtsi. > > + stdout-path = "uart0:115200"; > > + }; > > + > > + cpus { > > + #address-cells = <1>; > > + #size-cells = <0>; > > Missing blank line. OK. > > + cpu@0 { > > + compatible = "opencores,or1200-rtlsvn481"; > > + reg = <0>; > > + clock-frequency = <50000000>; > > + }; > > + }; > > + > > + /* > > + * OR1K PIC is built into CPU and accessed via special purpose > > + * registers. It is not addressable and, hence, has no 'reg' > > + * property. > > + */ > > + pic: pic { > > + compatible = "opencores,or1k-pic"; > > + #interrupt-cells = <1>; > > + interrupt-controller; > > + }; > > + > > + serial0: serial@90000000 { > > + compatible = "opencores,uart16550-rtlsvn105", "ns16550a"; > > + reg = <0x90000000 0x100>; > > + interrupts = <2>; > > + clock-frequency = <50000000>; > > + }; > > +}; -Stafford