From: Sahil Siddiq <icegambit91@gmail.com>
To: Stafford Horne <shorne@gmail.com>
Cc: jonas@southpole.se, stefan.kristiansson@saunalahti.fi,
sahilcdq@proton.me, linux-openrisc@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel test robot <lkp@intel.com>
Subject: Re: [PATCH] openrisc: Fix build warning in cache.c
Date: Fri, 4 Apr 2025 10:39:22 +0530 [thread overview]
Message-ID: <af85b465-13e5-44e5-a0af-c7c68af7d43e@gmail.com> (raw)
In-Reply-To: <Z-6VyRhGdInVidsw@antec>
Hi Stafford,
On 4/3/25 7:36 PM, Stafford Horne wrote:
> [...]
> I will just take this fix and apply it to the series (git fixup) rather than
> take this patch as is. Also, as registers should be unsigned short, I think
> we should change the type to that.
>
> I will fixup patches in place.
>
Sure thing. Will you be changing the register types as well in place with this
fix? Let me know if I should send v2 of this patch so the changes are together.
Also, should the types used in mfspr also be changed?
Thanks,
Sahil
next prev parent reply other threads:[~2025-04-04 5:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-01 20:01 [PATCH] openrisc: Fix build warning in cache.c Sahil Siddiq
2025-04-03 14:06 ` Stafford Horne
2025-04-04 5:09 ` Sahil Siddiq [this message]
2025-04-18 7:47 ` Stafford Horne
2025-04-18 9:12 ` Sahil Siddiq
2025-04-18 10:00 ` Stafford Horne
2025-04-18 12:34 ` Sahil Siddiq
2025-04-19 5:12 ` Stafford Horne
2025-04-19 15:55 ` Sahil Siddiq
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