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From: Raymond Mao <raymondmaoca@gmail.com>
To: Anup Patel <anup.patel@oss.qualcomm.com>
Cc: Atish Patra <atish.patra@linux.dev>,
	Andrew Jones <andrew.jones@oss.qualcomm.com>,
	Dave Patel <dave.patel@riscstar.com>,
	Samuel Holland <samuel.holland@sifive.com>,
	Anup Patel <anup@brainfault.org>,
	opensbi@lists.infradead.org,
	Anup Patel <anup.patel@oss.qualcomm.com>
Subject: Re: [PATCH 5/8] lib: sbi_irqchip: Support irqchip device targetting subset of harts
Date: Mon, 9 Feb 2026 15:25:40 -0500	[thread overview]
Message-ID: <0f55c5db-929f-4192-994a-8432c5bda1b4@gmail.com> (raw)
In-Reply-To: <20260207102602.2917520-6-anup.patel@oss.qualcomm.com>

Hi Anup,

On 2026-02-07 5:25 a.m., anup.patel at oss.qualcomm.com (Anup Patel) wrote:
> It is possible to have platform where an irqchip device targets
> a subset of harts and there are multiple irqchip devices to cover
> all harts.
>
> To support this scenario:
> 1) Add target_harts hartmask to struct sbi_irqchip_device which
>     represents the set of harts targetted by the irqchip device
> 2) Call warm_init() and irq_handle() callbacks of an irqchip device
>     on a hart only if irqchip device targets that particular hart
>
> Signed-off-by: Anup Patel <anup.patel at oss.qualcomm.com>
> ---
>   include/sbi/sbi_irqchip.h |  8 +++++--
>   lib/sbi/sbi_irqchip.c     | 48 ++++++++++++++++++++++++++++-----------
>   lib/utils/irqchip/aplic.c | 12 +++++++++-
>   lib/utils/irqchip/imsic.c |  7 ++++--
>   lib/utils/irqchip/plic.c  |  5 ++--
>   5 files changed, 59 insertions(+), 21 deletions(-)
>
> diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
> index cda1e50f..c3ded271 100644
> --- a/include/sbi/sbi_irqchip.h
> +++ b/include/sbi/sbi_irqchip.h
> @@ -10,6 +10,7 @@
>   #ifndef __SBI_IRQCHIP_H__
>   #define __SBI_IRQCHIP_H__
>   
> +#include <sbi/sbi_hartmask.h>
>   #include <sbi/sbi_list.h>
>   #include <sbi/sbi_types.h>
>   
> @@ -20,11 +21,14 @@ struct sbi_irqchip_device {
>   	/** Node in the list of irqchip devices */
>   	struct sbi_dlist node;
>   
> +	/** Set of harts targetted by this irqchip */
> +	struct sbi_hartmask target_harts;
> +
>   	/** Initialize per-hart state for the current hart */
>   	int (*warm_init)(struct sbi_irqchip_device *chip);
>   
>   	/** Process hardware interrupts from this irqchip */
> -	int (*process_hwirqs)(void);
> +	int (*process_hwirqs)(struct sbi_irqchip_device *chip);
>   };
>   
>   /**
> @@ -38,7 +42,7 @@ struct sbi_irqchip_device {
>   int sbi_irqchip_process(void);
>   
>   /** Register an irqchip device to receive callbacks */
> -void sbi_irqchip_add_device(struct sbi_irqchip_device *chip);
> +int sbi_irqchip_add_device(struct sbi_irqchip_device *chip);
>   
>   /** Initialize interrupt controllers */
>   int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
> diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
> index 3b970527..77ec05af 100644
> --- a/lib/sbi/sbi_irqchip.c
> +++ b/lib/sbi/sbi_irqchip.c
> @@ -13,24 +13,44 @@
>   
>   static SBI_LIST_HEAD(irqchip_list);
>   
> -static int default_irqfn(void)
> +int sbi_irqchip_process(void)
>   {
> -	return SBI_ENODEV;
> -}
> +	struct sbi_irqchip_device *chip;
> +	int rc = SBI_ENODEV;
>   
> -static int (*ext_irqfn)(void) = default_irqfn;
> +	sbi_list_for_each_entry(chip, &irqchip_list, node) {
> +		if (!chip->process_hwirqs)
> +			continue;
> +		if (!sbi_hartmask_test_hartindex(current_hartindex(), &chip->target_harts))
> +			continue;
> +		rc = chip->process_hwirqs(chip);
> +		if (rc)
> +			break;
> +	}
>   
> -int sbi_irqchip_process(void)
> -{
> -	return ext_irqfn();
> +	return rc;
>   }
>   
> -void sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
> +int sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
>   {
> -	sbi_list_add_tail(&chip->node, &irqchip_list);
> +	struct sbi_irqchip_device *c;
> +	struct sbi_hartmask hm;
> +
> +	if (!chip || !sbi_hartmask_weight(&chip->target_harts))
> +		return SBI_EINVAL;
> +
> +	if (chip->process_hwirqs) {
> +		sbi_list_for_each_entry(c, &irqchip_list, node) {
> +			if (!c->process_hwirqs)
> +				continue;
> +			sbi_hartmask_and(&hm, &c->target_harts, &chip->target_harts);
> +			if (sbi_hartmask_weight(&hm))
> +				return SBI_EINVAL;

I tested this by registering a 'process_hwirqs' hook, but 
'sbi_hartmask_weight' returns errors.

Regards,
Raymond

> +		}
> +	}
>   
> -	if (chip->process_hwirqs)
> -		ext_irqfn = chip->process_hwirqs;
> +	sbi_list_add_tail(&chip->node, &irqchip_list);
> +	return 0;
>   }
>   
>   int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
> @@ -48,12 +68,14 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
>   	sbi_list_for_each_entry(chip, &irqchip_list, node) {
>   		if (!chip->warm_init)
>   			continue;
> +		if (!sbi_hartmask_test_hartindex(current_hartindex(), &chip->target_harts))
> +			continue;
>   		rc = chip->warm_init(chip);
>   		if (rc)
>   			return rc;
>   	}
>   
> -	if (ext_irqfn != default_irqfn)
> +	if (!sbi_list_empty(&irqchip_list))
>   		csr_set(CSR_MIE, MIP_MEIP);
>   
>   	return 0;
> @@ -61,6 +83,6 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
>   
>   void sbi_irqchip_exit(struct sbi_scratch *scratch)
>   {
> -	if (ext_irqfn != default_irqfn)
> +	if (!sbi_list_empty(&irqchip_list))
>   		csr_clear(CSR_MIE, MIP_MEIP);
>   }
> diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c
> index 8d0db168..ea5cb7c4 100644
> --- a/lib/utils/irqchip/aplic.c
> +++ b/lib/utils/irqchip/aplic.c
> @@ -297,8 +297,18 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)
>   			return rc;
>   	}
>   
> +	if (aplic->num_idc) {
> +		for (i = 0; i < aplic->num_idc; i++)
> +			sbi_hartmask_set_hartindex(aplic->idc_map[i],
> +						   &aplic->irqchip.target_harts);
> +	} else {
> +		sbi_hartmask_set_all(&aplic->irqchip.target_harts);
> +	}
> +
>   	/* Register irqchip device */
> -	sbi_irqchip_add_device(&aplic->irqchip);
> +	rc = sbi_irqchip_add_device(&aplic->irqchip);
> +	if (rc)
> +		return rc;
>   
>   	/* Attach to the aplic list */
>   	sbi_list_add_tail(&aplic->node, &aplic_list);
> diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c
> index 0e9917da..5ec9dff4 100644
> --- a/lib/utils/irqchip/imsic.c
> +++ b/lib/utils/irqchip/imsic.c
> @@ -147,7 +147,7 @@ int imsic_get_target_file(u32 hartindex)
>   	return imsic_get_hart_file(scratch);
>   }
>   
> -static int imsic_process_hwirqs(void)
> +static int imsic_process_hwirqs(struct sbi_irqchip_device *chip)
>   {
>   	ulong mirq;
>   
> @@ -391,7 +391,10 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)
>   	}
>   
>   	/* Register irqchip device */
> -	sbi_irqchip_add_device(&imsic_device);
> +	sbi_hartmask_set_all(&imsic_device.target_harts);
> +	rc = sbi_irqchip_add_device(&imsic_device);
> +	if (rc)
> +		return rc;
>   
>   	/* Register IPI device */
>   	sbi_ipi_add_device(&imsic_ipi_device);
> diff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c
> index 7989a962..25cc2787 100644
> --- a/lib/utils/irqchip/plic.c
> +++ b/lib/utils/irqchip/plic.c
> @@ -276,11 +276,10 @@ int plic_cold_irqchip_init(struct plic_data *plic)
>   			continue;
>   
>   		plic_set_hart_data_ptr(sbi_hartindex_to_scratch(i), plic);
> +		sbi_hartmask_set_hartindex(i, &plic->irqchip.target_harts);
>   	}
>   
>   	/* Register irqchip device */
>   	plic->irqchip.warm_init = plic_warm_irqchip_init;
> -	sbi_irqchip_add_device(&plic->irqchip);
> -
> -	return 0;
> +	return sbi_irqchip_add_device(&plic->irqchip);
>   }

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  parent reply	other threads:[~2026-02-09 20:25 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-07 10:25 [PATCH 0/8] Extend irqchip framework for M-mode interrupts Anup Patel
2026-02-07 10:25 ` [PATCH 1/8] lib: sbi_irqchip: Use chip as variable name for irqchip device Anup Patel
2026-02-07 10:25 ` [PATCH 2/8] lib: sbi_irqchip: Rename irq_handle() callback to process_hwirqs() Anup Patel
2026-02-07 10:25 ` [PATCH 3/8] lib: utils/irqchip: Fix context_map init in irqchip_plic_update_context_map() Anup Patel
2026-02-07 10:25 ` [PATCH 4/8] lib: utils/irqchip: Add IDC to hartindex map in struct aplic_data Anup Patel
2026-02-09 16:50   ` Andrew Jones
2026-02-13  3:57     ` Anup Patel
2026-02-07 10:25 ` [PATCH 5/8] lib: sbi_irqchip: Support irqchip device targetting subset of harts Anup Patel
2026-02-09 16:50   ` Andrew Jones
2026-02-13  3:59     ` Anup Patel
2026-02-09 17:03   ` Samuel Holland
2026-02-13  4:01     ` Anup Patel
2026-02-09 20:25   ` Raymond Mao [this message]
2026-02-10 16:09     ` Anup Patel
2026-02-11 15:02       ` Raymond Mao
2026-02-11 15:43         ` Anup Patel
2026-02-11 17:49           ` Raymond Mao
2026-02-07 10:26 ` [PATCH 6/8] lib: utils/irqchip: Add unique_id to plic, aplic, and imsic data Anup Patel
2026-02-07 10:26 ` [PATCH 7/8] lib: sbi_irqchip: Associate 32-bit unique ID for each irqchip device Anup Patel
2026-02-07 10:26 ` [PATCH 8/8] lib: sbi_irqchip: Allow registering interrupt handlers Anup Patel
2026-02-09 16:52   ` Andrew Jones
2026-02-09 17:19   ` Samuel Holland
2026-02-09 20:34   ` Raymond Mao
     [not found]   ` <CAMkFH19feRsme6Mfr1vQ7hSnr2yhFMivNpGkwfTT2uSV3ojnjg@mail.gmail.com>
2026-02-10 16:39     ` Anup Patel
2026-02-10 16:57       ` Raymond Mao
2026-02-11 17:30         ` Anup Patel

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