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From: Yu-Chien Peter Lin <peter.lin@sifive.com>
To: opensbi@lists.infradead.org
Cc: zong.li@sifive.com, greentime.hu@sifive.com,
	Yu-Chien Peter Lin <peter.lin@sifive.com>
Subject: [PATCH] lib: serial: sifive-uart: add shared memory region for SiFive UART
Date: Thu, 14 Aug 2025 19:10:12 +0800	[thread overview]
Message-ID: <20250814111012.20151-1-peter.lin@sifive.com> (raw)

Add shared memory region so the driver has permission
to access it in OpenSBI.

Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
---
 lib/utils/serial/sifive-uart.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/lib/utils/serial/sifive-uart.c b/lib/utils/serial/sifive-uart.c
index 3581d47a..55637137 100644
--- a/lib/utils/serial/sifive-uart.c
+++ b/lib/utils/serial/sifive-uart.c
@@ -9,6 +9,7 @@
 
 #include <sbi/riscv_io.h>
 #include <sbi/sbi_console.h>
+#include <sbi/sbi_domain.h>
 #include <sbi_utils/serial/sifive-uart.h>
 
 /* clang-format off */
@@ -111,5 +112,7 @@ int sifive_uart_init(unsigned long base, u32 in_freq, u32 baudrate)
 
 	sbi_console_set_device(&sifive_console);
 
-	return 0;
+	return sbi_domain_root_add_memrange(base, PAGE_SIZE, PAGE_SIZE,
+					    (SBI_DOMAIN_MEMREGION_MMIO |
+					    SBI_DOMAIN_MEMREGION_SHARED_SURW_MRW));
 }
-- 
2.48.0


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             reply	other threads:[~2025-08-14 13:16 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-14 11:10 Yu-Chien Peter Lin [this message]
2025-10-06  8:54 ` [PATCH] lib: serial: sifive-uart: add shared memory region for SiFive UART Anup Patel

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