[PATCH v7 08/12] lib: sbi: Extends sbi_ipi_raw_send() to use all available IPI devices

From: Nick Hu <nick.hu@sifive.com>
To: opensbi@lists.infradead.org
Cc: Anup Patel <anup@brainfault.org>, Nick Hu <nick.hu@sifive.com>
Subject: [PATCH v7 08/12] lib: sbi: Extends sbi_ipi_raw_send() to use all available IPI devices
Date: Mon, 20 Oct 2025 14:34:10 +0800	[thread overview]
Message-ID: <20251020-cache-upstream-v7-8-69a132447d8a@sifive.com> (raw)
In-Reply-To: <20251020-cache-upstream-v7-0-69a132447d8a@sifive.com>

A platform may contain multiple IPI devices. In certain use cases,
such as power management, it may be necessary to send an IPI through a
specific device to wake up a CPU. For example, if an IMSIC is powered
down and reset, the core cannot receive IPIs from it, so the wake-up must
instead be triggered through the CLINT.

Suggested-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Nick Hu <nick.hu@sifive.com>
---
 include/sbi/sbi_ipi.h          |  2 +-
 lib/sbi/sbi_hsm.c              |  2 +-
 lib/sbi/sbi_ipi.c              | 16 +++++++++++++---
 platform/generic/andes/ae350.c |  2 +-
 4 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/include/sbi/sbi_ipi.h b/include/sbi/sbi_ipi.h
index 26d1b66b7cfffbaa6f7cadd0fab8c810adfb1811..2c231041662bfb55b2f962ca48d724cf6aa53f6d 100644
--- a/include/sbi/sbi_ipi.h
+++ b/include/sbi/sbi_ipi.h
@@ -88,7 +88,7 @@ int sbi_ipi_send_halt(ulong hmask, ulong hbase);
 
 void sbi_ipi_process(void);
 
-int sbi_ipi_raw_send(u32 hartindex);
+int sbi_ipi_raw_send(u32 hartindex, bool all_devices);
 
 void sbi_ipi_raw_clear(bool all_devices);
 
diff --git a/lib/sbi/sbi_hsm.c b/lib/sbi/sbi_hsm.c
index bb274b33d6ee5e3db9953f4b591502e4522d99d1..0d97b43e0cd8f7b4fc97407ef01007485e3f5a24 100644
--- a/lib/sbi/sbi_hsm.c
+++ b/lib/sbi/sbi_hsm.c
@@ -364,7 +364,7 @@ int sbi_hsm_hart_start(struct sbi_scratch *scratch,
 	   (hsm_device_has_hart_secondary_boot() && !init_count)) {
 		rc = hsm_device_hart_start(hartid, scratch->warmboot_addr);
 	} else {
-		rc = sbi_ipi_raw_send(hartindex);
+		rc = sbi_ipi_raw_send(hartindex, true);
 	}
 
 	if (!rc)
diff --git a/lib/sbi/sbi_ipi.c b/lib/sbi/sbi_ipi.c
index ed9ccffb6c96cdfa1151a22d07c2bfc8181769bd..5b2d2f72eeb918a8877b4b8fbf201f2b9628f069 100644
--- a/lib/sbi/sbi_ipi.c
+++ b/lib/sbi/sbi_ipi.c
@@ -88,7 +88,7 @@ static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartindex,
 	 */
 	if (!__atomic_fetch_or(&ipi_data->ipi_type,
 				BIT(event), __ATOMIC_RELAXED))
-		ret = sbi_ipi_raw_send(remote_hartindex);
+		ret = sbi_ipi_raw_send(remote_hartindex, false);
 
 	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
 
@@ -271,8 +271,10 @@ void sbi_ipi_process(void)
 	}
 }
 
-int sbi_ipi_raw_send(u32 hartindex)
+int sbi_ipi_raw_send(u32 hartindex, bool all_devices)
 {
+	struct sbi_ipi_device_node *entry;
+
 	if (!ipi_dev || !ipi_dev->ipi_send)
 		return SBI_EINVAL;
 
@@ -287,7 +289,15 @@ int sbi_ipi_raw_send(u32 hartindex)
 	 */
 	wmb();
 
-	ipi_dev->ipi_send(hartindex);
+	if (all_devices) {
+		sbi_list_for_each_entry(entry, &ipi_dev_node_list, head) {
+			if (entry->dev->ipi_send)
+				entry->dev->ipi_send(hartindex);
+		}
+	} else {
+		ipi_dev->ipi_send(hartindex);
+	}
+
 	return 0;
 }
 
diff --git a/platform/generic/andes/ae350.c b/platform/generic/andes/ae350.c
index f06e207d80f58703098ef805a14e1f8764c2cb16..0808065745af21f5d65f0114ca33a23949280296 100644
--- a/platform/generic/andes/ae350.c
+++ b/platform/generic/andes/ae350.c
@@ -35,7 +35,7 @@ static int ae350_hart_start(u32 hartid, ulong saddr)
 	 * 2) the target hart is non-sleepable 25-series hart0
 	 */
 	if (!sbi_init_count(hartindex) || (is_andes(25) && hartid == 0))
-		return sbi_ipi_raw_send(hartindex);
+		return sbi_ipi_raw_send(hartindex, false);
 
 	/* Write wakeup command to the sleep hart */
 	smu_set_command(&smu, WAKEUP_CMD, hartid);

-- 
2.34.1


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