From: cp0613@linux.alibaba.com
To: opensbi@lists.infradead.org
Cc: anup@brainfault.org, guoren@kernel.org,
Chen Pei <cp0613@linux.alibaba.com>
Subject: [PATCH v2] lib: sbi: Enable Ssqosid Ext using mstateen0
Date: Thu, 6 Nov 2025 20:13:57 +0800 [thread overview]
Message-ID: <20251106121357.1353-1-cp0613@linux.alibaba.com> (raw)
From: Chen Pei <cp0613@linux.alibaba.com>
The QoS Identifiers extension (Ssqosid) introduces the srmcfg register,
which configures a hart with two identifiers: a Resource Control ID
(RCID) and a Monitoring Counter ID (MCID). These identifiers accompany
each request issued by the hart to shared resource controllers.
If extension Smstateen is implemented together with Ssqosid, then
Ssqosid also requires the SRMCFG bit in mstateen0 to be implemented. If
mstateen0.SRMCFG is 0, attempts to access srmcfg in privilege modes less
privileged than M-mode raise an illegal-instruction exception. If
mstateen0.SRMCFG is 1 or if extension Smstateen is not implemented,
attempts to access srmcfg when V=1 raise a virtual-instruction exception.
This extension can be found in the RISC-V Instruction Set Manual:
https://github.com/riscv/riscv-isa-manual
Signed-off-by: Chen Pei <cp0613@linux.alibaba.com>
---
include/sbi/riscv_encoding.h | 5 +++++
include/sbi/sbi_hart.h | 2 ++
lib/sbi/sbi_domain_context.c | 6 +++++-
lib/sbi/sbi_hart.c | 6 ++++++
4 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h
index 61e4b635..b738e209 100644
--- a/include/sbi/riscv_encoding.h
+++ b/include/sbi/riscv_encoding.h
@@ -378,6 +378,9 @@
#define CSR_SSTATEEN2 0x10E
#define CSR_SSTATEEN3 0x10F
+/* Supervisor Resource Management Configuration CSRs */
+#define CSR_SRMCFG 0x181
+
/* Machine-Level Control transfer records CSRs */
#define CSR_MCTRCTL 0x34e
@@ -849,6 +852,8 @@
#define SMSTATEEN0_FCSR (_ULL(1) << SMSTATEEN0_FCSR_SHIFT)
#define SMSTATEEN0_CTR_SHIFT 54
#define SMSTATEEN0_CTR (_ULL(1) << SMSTATEEN0_CTR_SHIFT)
+#define SMSTATEEN0_SRMCFG_SHIFT 55
+#define SMSTATEEN0_SRMCFG (_ULL(1) << SMSTATEEN0_SRMCFG_SHIFT)
#define SMSTATEEN0_CONTEXT_SHIFT 57
#define SMSTATEEN0_CONTEXT (_ULL(1) << SMSTATEEN0_CONTEXT_SHIFT)
#define SMSTATEEN0_IMSIC_SHIFT 58
diff --git a/include/sbi/sbi_hart.h b/include/sbi/sbi_hart.h
index e66dd52f..c51b0689 100644
--- a/include/sbi/sbi_hart.h
+++ b/include/sbi/sbi_hart.h
@@ -79,6 +79,8 @@ enum sbi_hart_extensions {
SBI_HART_EXT_SMCTR,
/** HART has CTR S-mode CSRs */
SBI_HART_EXT_SSCTR,
+ /** Hart has Ssqosid extension */
+ SBI_HART_EXT_SSQOSID,
/** HART has Ssstateen extension **/
SBI_HART_EXT_SSSTATEEN,
/** Hart has Xsfcflushdlone extension */
diff --git a/lib/sbi/sbi_domain_context.c b/lib/sbi/sbi_domain_context.c
index 74ad25e8..b1b1c258 100644
--- a/lib/sbi/sbi_domain_context.c
+++ b/lib/sbi/sbi_domain_context.c
@@ -45,6 +45,8 @@ struct hart_context {
unsigned long scounteren;
/** Supervisor environment configuration register */
unsigned long senvcfg;
+ /** Supervisor resource management configuration register */
+ unsigned long srmcfg;
/** Reference to the owning domain */
struct sbi_domain *dom;
@@ -143,8 +145,10 @@ static int switch_to_next_domain_context(struct hart_context *ctx,
ctx->satp = csr_swap(CSR_SATP, dom_ctx->satp);
if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_10)
ctx->scounteren = csr_swap(CSR_SCOUNTEREN, dom_ctx->scounteren);
- if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12)
+ if (sbi_hart_priv_version(scratch) >= SBI_HART_PRIV_VER_1_12) {
ctx->senvcfg = csr_swap(CSR_SENVCFG, dom_ctx->senvcfg);
+ ctx->srmcfg = csr_swap(CSR_SRMCFG, dom_ctx->srmcfg);
+ }
/* Save current trap state and restore target domain's trap state */
trap_ctx = sbi_trap_get_context(scratch);
diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index a91703b4..549906f6 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -112,6 +112,11 @@ static void mstatus_init(struct sbi_scratch *scratch)
else
mstateen_val &= ~SMSTATEEN0_CTR;
+ if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSQOSID))
+ mstateen_val |= (SMSTATEEN0_SRMCFG);
+ else
+ mstateen_val &= ~(SMSTATEEN0_SRMCFG);
+
csr_write64(CSR_MSTATEEN0, mstateen_val);
csr_write64(CSR_MSTATEEN1, SMSTATEEN_STATEN);
csr_write64(CSR_MSTATEEN2, SMSTATEEN_STATEN);
@@ -685,6 +690,7 @@ const struct sbi_hart_ext_data sbi_hart_ext[] = {
__SBI_HART_EXT_DATA(ssdbltrp, SBI_HART_EXT_SSDBLTRP),
__SBI_HART_EXT_DATA(smctr, SBI_HART_EXT_SMCTR),
__SBI_HART_EXT_DATA(ssctr, SBI_HART_EXT_SSCTR),
+ __SBI_HART_EXT_DATA(ssqosid, SBI_HART_EXT_SSQOSID),
__SBI_HART_EXT_DATA(ssstateen, SBI_HART_EXT_SSSTATEEN),
__SBI_HART_EXT_DATA(xsfcflushdlone, SBI_HART_EXT_XSIFIVE_CFLUSH_D_L1),
__SBI_HART_EXT_DATA(xsfcease, SBI_HART_EXT_XSIFIVE_CEASE),
--
2.50.1
--
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next reply other threads:[~2025-11-06 12:14 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-06 12:13 cp0613 [this message]
2025-11-06 13:09 ` [PATCH v2] lib: sbi: Enable Ssqosid Ext using mstateen0 Anup Patel
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