* [PATCH] platform: ariane: parse dtb for getting some initial parameters
@ 2025-11-07 7:54 Manuel Hernández | OPENCHIP
2025-12-01 5:08 ` Anup Patel
0 siblings, 1 reply; 2+ messages in thread
From: Manuel Hernández | OPENCHIP @ 2025-11-07 7:54 UTC (permalink / raw)
To: opensbi@lists.infradead.org; +Cc: Manuel Hernández | OPENCHIP
From: Manuel Hernández Méndez <manuel.hernandez@openchip.com>
Add code for getting some uart, clint and plic parameters from
device tree.
Signed-off-by: Manuel Hernández Méndez <manuel.hernandez@openchip.com>
---
platform/generic/openhwgroup/ariane.c | 39 ++++++++++++++++-----------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/platform/generic/openhwgroup/ariane.c b/platform/generic/openhwgroup/ariane.c
index 6931e3f0..70a97f38 100644
--- a/platform/generic/openhwgroup/ariane.c
+++ b/platform/generic/openhwgroup/ariane.c
@@ -9,16 +9,8 @@
#include <sbi_utils/fdt/fdt_fixup.h>
#include <sbi_utils/ipi/aclint_mswi.h>
#include <sbi_utils/irqchip/plic.h>
-#include <sbi_utils/serial/uart8250.h>
#include <sbi_utils/timer/aclint_mtimer.h>
-#define ARIANE_UART_ADDR 0x10000000
-#define ARIANE_UART_FREQ 50000000
-#define ARIANE_UART_BAUDRATE 115200
-#define ARIANE_UART_REG_SHIFT 2
-#define ARIANE_UART_REG_WIDTH 4
-#define ARIANE_UART_REG_OFFSET 0
-#define ARIANE_UART_CAPS 0
#define ARIANE_PLIC_ADDR 0xc000000
#define ARIANE_PLIC_SIZE (0x200000 + \
(ARIANE_HART_COUNT * 0x1000))
@@ -66,21 +58,38 @@ static struct aclint_mtimer_data mtimer = {
*/
static int ariane_early_init(bool cold_boot)
{
+ const void *fdt;
+ struct plic_data plic_data = plic;
+ unsigned long aclint_freq;
+ uint64_t clint_addr;
int rc;
if (!cold_boot)
return 0;
- rc = uart8250_init(ARIANE_UART_ADDR,
- ARIANE_UART_FREQ,
- ARIANE_UART_BAUDRATE,
- ARIANE_UART_REG_SHIFT,
- ARIANE_UART_REG_WIDTH,
- ARIANE_UART_REG_OFFSET,
- ARIANE_UART_CAPS);
+ rc = generic_early_init(cold_boot);
if (rc)
return rc;
+ fdt = fdt_get_address();
+
+ rc = fdt_parse_timebase_frequency(fdt, &aclint_freq);
+ if (!rc)
+ mtimer.mtime_freq = aclint_freq;
+
+ rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
+ if (!rc) {
+ mswi.addr = clint_addr;
+ mtimer.mtime_addr = clint_addr + CLINT_MTIMER_OFFSET +
+ ACLINT_DEFAULT_MTIME_OFFSET;
+ mtimer.mtimecmp_addr = clint_addr + CLINT_MTIMER_OFFSET +
+ ACLINT_DEFAULT_MTIMECMP_OFFSET;
+ }
+
+ rc = fdt_parse_plic(fdt, &plic_data, "riscv,plic0");
+ if (!rc)
+ plic = plic_data;
+
return aclint_mswi_cold_init(&mswi);
}
--
2.34.1
--
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] platform: ariane: parse dtb for getting some initial parameters
2025-11-07 7:54 [PATCH] platform: ariane: parse dtb for getting some initial parameters Manuel Hernández | OPENCHIP
@ 2025-12-01 5:08 ` Anup Patel
0 siblings, 0 replies; 2+ messages in thread
From: Anup Patel @ 2025-12-01 5:08 UTC (permalink / raw)
To: Manuel Hernández | OPENCHIP; +Cc: opensbi@lists.infradead.org
On Fri, Nov 7, 2025 at 1:24 PM Manuel Hernández | OPENCHIP
<manuel.hernandez@openchip.com> wrote:
>
> From: Manuel Hernández Méndez <manuel.hernandez@openchip.com>
>
> Add code for getting some uart, clint and plic parameters from
> device tree.
>
> Signed-off-by: Manuel Hernández Méndez <manuel.hernandez@openchip.com>
LGTM.
Reviewed-by: Anup Patel <anup@brainfault.org>
Applied this patch to the riscv/opensbi repo.
Thanks,
Anup
> ---
> platform/generic/openhwgroup/ariane.c | 39 ++++++++++++++++-----------
> 1 file changed, 24 insertions(+), 15 deletions(-)
>
> diff --git a/platform/generic/openhwgroup/ariane.c b/platform/generic/openhwgroup/ariane.c
> index 6931e3f0..70a97f38 100644
> --- a/platform/generic/openhwgroup/ariane.c
> +++ b/platform/generic/openhwgroup/ariane.c
> @@ -9,16 +9,8 @@
> #include <sbi_utils/fdt/fdt_fixup.h>
> #include <sbi_utils/ipi/aclint_mswi.h>
> #include <sbi_utils/irqchip/plic.h>
> -#include <sbi_utils/serial/uart8250.h>
> #include <sbi_utils/timer/aclint_mtimer.h>
>
> -#define ARIANE_UART_ADDR 0x10000000
> -#define ARIANE_UART_FREQ 50000000
> -#define ARIANE_UART_BAUDRATE 115200
> -#define ARIANE_UART_REG_SHIFT 2
> -#define ARIANE_UART_REG_WIDTH 4
> -#define ARIANE_UART_REG_OFFSET 0
> -#define ARIANE_UART_CAPS 0
> #define ARIANE_PLIC_ADDR 0xc000000
> #define ARIANE_PLIC_SIZE (0x200000 + \
> (ARIANE_HART_COUNT * 0x1000))
> @@ -66,21 +58,38 @@ static struct aclint_mtimer_data mtimer = {
> */
> static int ariane_early_init(bool cold_boot)
> {
> + const void *fdt;
> + struct plic_data plic_data = plic;
> + unsigned long aclint_freq;
> + uint64_t clint_addr;
> int rc;
>
> if (!cold_boot)
> return 0;
>
> - rc = uart8250_init(ARIANE_UART_ADDR,
> - ARIANE_UART_FREQ,
> - ARIANE_UART_BAUDRATE,
> - ARIANE_UART_REG_SHIFT,
> - ARIANE_UART_REG_WIDTH,
> - ARIANE_UART_REG_OFFSET,
> - ARIANE_UART_CAPS);
> + rc = generic_early_init(cold_boot);
> if (rc)
> return rc;
>
> + fdt = fdt_get_address();
> +
> + rc = fdt_parse_timebase_frequency(fdt, &aclint_freq);
> + if (!rc)
> + mtimer.mtime_freq = aclint_freq;
> +
> + rc = fdt_parse_compat_addr(fdt, &clint_addr, "riscv,clint0");
> + if (!rc) {
> + mswi.addr = clint_addr;
> + mtimer.mtime_addr = clint_addr + CLINT_MTIMER_OFFSET +
> + ACLINT_DEFAULT_MTIME_OFFSET;
> + mtimer.mtimecmp_addr = clint_addr + CLINT_MTIMER_OFFSET +
> + ACLINT_DEFAULT_MTIMECMP_OFFSET;
> + }
> +
> + rc = fdt_parse_plic(fdt, &plic_data, "riscv,plic0");
> + if (!rc)
> + plic = plic_data;
> +
> return aclint_mswi_cold_init(&mswi);
> }
>
> --
> 2.34.1
>
> --
> opensbi mailing list
> opensbi@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/opensbi
--
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